1/* 2 * This file was generated automatically by gen-mterp.py for 'x86'. 3 * 4 * --> DO NOT EDIT <-- 5 */ 6 7/* File: x86/header.S */ 8/* 9 * Copyright (C) 2016 The Android Open Source Project 10 * 11 * Licensed under the Apache License, Version 2.0 (the "License"); 12 * you may not use this file except in compliance with the License. 13 * You may obtain a copy of the License at 14 * 15 * http://www.apache.org/licenses/LICENSE-2.0 16 * 17 * Unless required by applicable law or agreed to in writing, software 18 * distributed under the License is distributed on an "AS IS" BASIS, 19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 * See the License for the specific language governing permissions and 21 * limitations under the License. 22 */ 23 24/* 25 Art assembly interpreter notes: 26 27 First validate assembly code by implementing ExecuteXXXImpl() style body (doesn't 28 handle invoke, allows higher-level code to create frame & shadow frame. 29 30 Once that's working, support direct entry code & eliminate shadow frame (and 31 excess locals allocation. 32 33 Some (hopefully) temporary ugliness. We'll treat rFP as pointing to the 34 base of the vreg array within the shadow frame. Access the other fields, 35 dex_pc_, method_ and number_of_vregs_ via negative offsets. For now, we'll continue 36 the shadow frame mechanism of double-storing object references - via rFP & 37 number_of_vregs_. 38 39 */ 40 41/* 42x86 ABI general notes: 43 44Caller save set: 45 eax, edx, ecx, st(0)-st(7) 46Callee save set: 47 ebx, esi, edi, ebp 48Return regs: 49 32-bit in eax 50 64-bit in edx:eax (low-order 32 in eax) 51 fp on top of fp stack st(0) 52 53Parameters passed on stack, pushed right-to-left. On entry to target, first 54parm is at 4(%esp). Traditional entry code is: 55 56functEntry: 57 push %ebp # save old frame pointer 58 mov %ebp,%esp # establish new frame pointer 59 sub FrameSize,%esp # Allocate storage for spill, locals & outs 60 61Once past the prologue, arguments are referenced at ((argno + 2)*4)(%ebp) 62 63Stack must be 16-byte aligned to support SSE in native code. 64 65If we're not doing variable stack allocation (alloca), the frame pointer can be 66eliminated and all arg references adjusted to be esp relative. 67*/ 68 69/* 70Mterp and x86 notes: 71 72Some key interpreter variables will be assigned to registers. 73 74 nick reg purpose 75 rPC esi interpreted program counter, used for fetching instructions 76 rFP edi interpreted frame pointer, used for accessing locals and args 77 rINSTw bx first 16-bit code of current instruction 78 rINSTbl bl opcode portion of instruction word 79 rINSTbh bh high byte of inst word, usually contains src/tgt reg names 80 rIBASE edx base of instruction handler table 81 rREFS ebp base of object references in shadow frame. 82 83Notes: 84 o High order 16 bits of ebx must be zero on entry to handler 85 o rPC, rFP, rINSTw/rINSTbl valid on handler entry and exit 86 o eax and ecx are scratch, rINSTw/ebx sometimes scratch 87 88Macros are provided for common operations. Each macro MUST emit only 89one instruction to make instruction-counting easier. They MUST NOT alter 90unspecified registers or condition codes. 91*/ 92 93/* 94 * This is a #include, not a %include, because we want the C pre-processor 95 * to expand the macros into assembler assignment statements. 96 */ 97#include "asm_support.h" 98 99/* 100 * Handle mac compiler specific 101 */ 102#if defined(__APPLE__) 103 #define MACRO_LITERAL(value) $(value) 104 #define FUNCTION_TYPE(name) 105 #define SIZE(start,end) 106 // Mac OS' symbols have an _ prefix. 107 #define SYMBOL(name) _ ## name 108#else 109 #define MACRO_LITERAL(value) $value 110 #define FUNCTION_TYPE(name) .type name, @function 111 #define SIZE(start,end) .size start, .-end 112 #define SYMBOL(name) name 113#endif 114 115.macro PUSH _reg 116 pushl \_reg 117 .cfi_adjust_cfa_offset 4 118 .cfi_rel_offset \_reg, 0 119.endm 120 121.macro POP _reg 122 popl \_reg 123 .cfi_adjust_cfa_offset -4 124 .cfi_restore \_reg 125.endm 126 127/* 128 * Instead of holding a pointer to the shadow frame, we keep rFP at the base of the vregs. So, 129 * to access other shadow frame fields, we need to use a backwards offset. Define those here. 130 */ 131#define OFF_FP(a) (a - SHADOWFRAME_VREGS_OFFSET) 132#define OFF_FP_NUMBER_OF_VREGS OFF_FP(SHADOWFRAME_NUMBER_OF_VREGS_OFFSET) 133#define OFF_FP_DEX_PC OFF_FP(SHADOWFRAME_DEX_PC_OFFSET) 134#define OFF_FP_LINK OFF_FP(SHADOWFRAME_LINK_OFFSET) 135#define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) 136#define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) 137#define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) 138#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) 139#define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET) 140#define OFF_FP_SHADOWFRAME OFF_FP(0) 141 142/* Frame size must be 16-byte aligned. 143 * Remember about 4 bytes for return address + 4 * 4 for spills 144 */ 145#define FRAME_SIZE 28 146 147/* Frame diagram while executing ExecuteMterpImpl, high to low addresses */ 148#define IN_ARG3 (FRAME_SIZE + 16 + 16) 149#define IN_ARG2 (FRAME_SIZE + 16 + 12) 150#define IN_ARG1 (FRAME_SIZE + 16 + 8) 151#define IN_ARG0 (FRAME_SIZE + 16 + 4) 152/* Spill offsets relative to %esp */ 153#define LOCAL0 (FRAME_SIZE - 4) 154#define LOCAL1 (FRAME_SIZE - 8) 155#define LOCAL2 (FRAME_SIZE - 12) 156/* Out Arg offsets, relative to %esp */ 157#define OUT_ARG3 ( 12) 158#define OUT_ARG2 ( 8) 159#define OUT_ARG1 ( 4) 160#define OUT_ARG0 ( 0) /* <- ExecuteMterpImpl esp + 0 */ 161 162/* During bringup, we'll use the shadow frame model instead of rFP */ 163/* single-purpose registers, given names for clarity */ 164#define rSELF IN_ARG0(%esp) 165#define rPC %esi 166#define rFP %edi 167#define rINST %ebx 168#define rINSTw %bx 169#define rINSTbh %bh 170#define rINSTbl %bl 171#define rIBASE %edx 172#define rREFS %ebp 173#define rPROFILE OFF_FP_COUNTDOWN_OFFSET(rFP) 174 175#define MTERP_LOGGING 0 176 177/* 178 * "export" the PC to dex_pc field in the shadow frame, f/b/o future exception objects. Must 179 * be done *before* something throws. 180 * 181 * It's okay to do this more than once. 182 * 183 * NOTE: the fast interpreter keeps track of dex pc as a direct pointer to the mapped 184 * dex byte codes. However, the rest of the runtime expects dex pc to be an instruction 185 * offset into the code_items_[] array. For effiency, we will "export" the 186 * current dex pc as a direct pointer using the EXPORT_PC macro, and rely on GetDexPC 187 * to convert to a dex pc when needed. 188 */ 189.macro EXPORT_PC 190 movl rPC, OFF_FP_DEX_PC_PTR(rFP) 191.endm 192 193/* 194 * Refresh handler table. 195 */ 196.macro REFRESH_IBASE 197 movl rSELF, rIBASE 198 movl THREAD_CURRENT_IBASE_OFFSET(rIBASE), rIBASE 199.endm 200 201/* 202 * Refresh handler table. 203 * IBase handles uses the caller save register so we must restore it after each call. 204 * Also it is used as a result of some 64-bit operations (like imul) and we should 205 * restore it in such cases also. 206 * 207 * TODO: Consider spilling the IBase instead of restoring it from Thread structure. 208 */ 209.macro RESTORE_IBASE 210 movl rSELF, rIBASE 211 movl THREAD_CURRENT_IBASE_OFFSET(rIBASE), rIBASE 212.endm 213 214/* 215 * If rSELF is already loaded then we can use it from known reg. 216 */ 217.macro RESTORE_IBASE_FROM_SELF _reg 218 movl THREAD_CURRENT_IBASE_OFFSET(\_reg), rIBASE 219.endm 220 221/* 222 * Refresh rINST. 223 * At enter to handler rINST does not contain the opcode number. 224 * However some utilities require the full value, so this macro 225 * restores the opcode number. 226 */ 227.macro REFRESH_INST _opnum 228 movb rINSTbl, rINSTbh 229 movb MACRO_LITERAL(\_opnum), rINSTbl 230.endm 231 232/* 233 * Fetch the next instruction from rPC into rINSTw. Does not advance rPC. 234 */ 235.macro FETCH_INST 236 movzwl (rPC), rINST 237.endm 238 239/* 240 * Remove opcode from rINST, compute the address of handler and jump to it. 241 */ 242.macro GOTO_NEXT 243 movzx rINSTbl,%eax 244 movzbl rINSTbh,rINST 245 shll MACRO_LITERAL(7), %eax 246 addl rIBASE, %eax 247 jmp *%eax 248.endm 249 250/* 251 * Advance rPC by instruction count. 252 */ 253.macro ADVANCE_PC _count 254 leal 2*\_count(rPC), rPC 255.endm 256 257/* 258 * Advance rPC by instruction count, fetch instruction and jump to handler. 259 */ 260.macro ADVANCE_PC_FETCH_AND_GOTO_NEXT _count 261 ADVANCE_PC \_count 262 FETCH_INST 263 GOTO_NEXT 264.endm 265 266/* 267 * Get/set the 32-bit value from a Dalvik register. 268 */ 269#define VREG_ADDRESS(_vreg) (rFP,_vreg,4) 270#define VREG_HIGH_ADDRESS(_vreg) 4(rFP,_vreg,4) 271#define VREG_REF_ADDRESS(_vreg) (rREFS,_vreg,4) 272#define VREG_REF_HIGH_ADDRESS(_vreg) 4(rREFS,_vreg,4) 273 274.macro GET_VREG _reg _vreg 275 movl (rFP,\_vreg,4), \_reg 276.endm 277 278/* Read wide value to xmm. */ 279.macro GET_WIDE_FP_VREG _reg _vreg 280 movq (rFP,\_vreg,4), \_reg 281.endm 282 283.macro SET_VREG _reg _vreg 284 movl \_reg, (rFP,\_vreg,4) 285 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 286.endm 287 288/* Write wide value from xmm. xmm is clobbered. */ 289.macro SET_WIDE_FP_VREG _reg _vreg 290 movq \_reg, (rFP,\_vreg,4) 291 pxor \_reg, \_reg 292 movq \_reg, (rREFS,\_vreg,4) 293.endm 294 295.macro SET_VREG_OBJECT _reg _vreg 296 movl \_reg, (rFP,\_vreg,4) 297 movl \_reg, (rREFS,\_vreg,4) 298.endm 299 300.macro GET_VREG_HIGH _reg _vreg 301 movl 4(rFP,\_vreg,4), \_reg 302.endm 303 304.macro SET_VREG_HIGH _reg _vreg 305 movl \_reg, 4(rFP,\_vreg,4) 306 movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4) 307.endm 308 309.macro CLEAR_REF _vreg 310 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 311.endm 312 313.macro CLEAR_WIDE_REF _vreg 314 movl MACRO_LITERAL(0), (rREFS,\_vreg,4) 315 movl MACRO_LITERAL(0), 4(rREFS,\_vreg,4) 316.endm 317 318/* File: x86/entry.S */ 319/* 320 * Copyright (C) 2016 The Android Open Source Project 321 * 322 * Licensed under the Apache License, Version 2.0 (the "License"); 323 * you may not use this file except in compliance with the License. 324 * You may obtain a copy of the License at 325 * 326 * http://www.apache.org/licenses/LICENSE-2.0 327 * 328 * Unless required by applicable law or agreed to in writing, software 329 * distributed under the License is distributed on an "AS IS" BASIS, 330 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 331 * See the License for the specific language governing permissions and 332 * limitations under the License. 333 */ 334/* 335 * Interpreter entry point. 336 */ 337 338 .text 339 .global SYMBOL(ExecuteMterpImpl) 340 FUNCTION_TYPE(ExecuteMterpImpl) 341 342/* 343 * On entry: 344 * 0 Thread* self 345 * 1 code_item 346 * 2 ShadowFrame 347 * 3 JValue* result_register 348 * 349 */ 350 351SYMBOL(ExecuteMterpImpl): 352 .cfi_startproc 353 .cfi_def_cfa esp, 4 354 355 /* Spill callee save regs */ 356 PUSH %ebp 357 PUSH %edi 358 PUSH %esi 359 PUSH %ebx 360 361 /* Allocate frame */ 362 subl $FRAME_SIZE, %esp 363 .cfi_adjust_cfa_offset FRAME_SIZE 364 365 /* Load ShadowFrame pointer */ 366 movl IN_ARG2(%esp), %edx 367 368 /* Remember the return register */ 369 movl IN_ARG3(%esp), %eax 370 movl %eax, SHADOWFRAME_RESULT_REGISTER_OFFSET(%edx) 371 372 /* Remember the code_item */ 373 movl IN_ARG1(%esp), %ecx 374 movl %ecx, SHADOWFRAME_CODE_ITEM_OFFSET(%edx) 375 376 /* set up "named" registers */ 377 movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(%edx), %eax 378 leal SHADOWFRAME_VREGS_OFFSET(%edx), rFP 379 leal (rFP, %eax, 4), rREFS 380 movl SHADOWFRAME_DEX_PC_OFFSET(%edx), %eax 381 lea CODEITEM_INSNS_OFFSET(%ecx), rPC 382 lea (rPC, %eax, 2), rPC 383 EXPORT_PC 384 385 /* Set up for backwards branches & osr profiling */ 386 movl OFF_FP_METHOD(rFP), %eax 387 movl %eax, OUT_ARG0(%esp) 388 leal OFF_FP_SHADOWFRAME(rFP), %ecx 389 movl %ecx, OUT_ARG1(%esp) 390 call SYMBOL(MterpSetUpHotnessCountdown) 391 392 /* Starting ibase */ 393 REFRESH_IBASE 394 395 /* start executing the instruction at rPC */ 396 FETCH_INST 397 GOTO_NEXT 398 /* NOTE: no fallthrough */ 399 400 401 .global SYMBOL(artMterpAsmInstructionStart) 402 FUNCTION_TYPE(SYMBOL(artMterpAsmInstructionStart)) 403SYMBOL(artMterpAsmInstructionStart) = .L_op_nop 404 .text 405 406/* ------------------------------ */ 407 .balign 128 408.L_op_nop: /* 0x00 */ 409/* File: x86/op_nop.S */ 410 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 411 412/* ------------------------------ */ 413 .balign 128 414.L_op_move: /* 0x01 */ 415/* File: x86/op_move.S */ 416 /* for move, move-object, long-to-int */ 417 /* op vA, vB */ 418 movzbl rINSTbl, %eax # eax <- BA 419 andb $0xf, %al # eax <- A 420 shrl $4, rINST # rINST <- B 421 GET_VREG rINST, rINST 422 .if 0 423 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 424 .else 425 SET_VREG rINST, %eax # fp[A] <- fp[B] 426 .endif 427 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 428 429/* ------------------------------ */ 430 .balign 128 431.L_op_move_from16: /* 0x02 */ 432/* File: x86/op_move_from16.S */ 433 /* for: move/from16, move-object/from16 */ 434 /* op vAA, vBBBB */ 435 movzx rINSTbl, %eax # eax <- AA 436 movw 2(rPC), rINSTw # rINSTw <- BBBB 437 GET_VREG rINST, rINST # rINST <- fp[BBBB] 438 .if 0 439 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 440 .else 441 SET_VREG rINST, %eax # fp[A] <- fp[B] 442 .endif 443 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 444 445/* ------------------------------ */ 446 .balign 128 447.L_op_move_16: /* 0x03 */ 448/* File: x86/op_move_16.S */ 449 /* for: move/16, move-object/16 */ 450 /* op vAAAA, vBBBB */ 451 movzwl 4(rPC), %ecx # ecx <- BBBB 452 movzwl 2(rPC), %eax # eax <- AAAA 453 GET_VREG rINST, %ecx 454 .if 0 455 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 456 .else 457 SET_VREG rINST, %eax # fp[A] <- fp[B] 458 .endif 459 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 460 461/* ------------------------------ */ 462 .balign 128 463.L_op_move_wide: /* 0x04 */ 464/* File: x86/op_move_wide.S */ 465 /* move-wide vA, vB */ 466 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 467 movzbl rINSTbl, %ecx # ecx <- BA 468 sarl $4, rINST # rINST <- B 469 andb $0xf, %cl # ecx <- A 470 GET_WIDE_FP_VREG %xmm0, rINST # xmm0 <- v[B] 471 SET_WIDE_FP_VREG %xmm0, %ecx # v[A] <- xmm0 472 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 473 474/* ------------------------------ */ 475 .balign 128 476.L_op_move_wide_from16: /* 0x05 */ 477/* File: x86/op_move_wide_from16.S */ 478 /* move-wide/from16 vAA, vBBBB */ 479 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 480 movzwl 2(rPC), %ecx # ecx <- BBBB 481 movzbl rINSTbl, %eax # eax <- AAAA 482 GET_WIDE_FP_VREG %xmm0, %ecx # xmm0 <- v[B] 483 SET_WIDE_FP_VREG %xmm0, %eax # v[A] <- xmm0 484 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 485 486/* ------------------------------ */ 487 .balign 128 488.L_op_move_wide_16: /* 0x06 */ 489/* File: x86/op_move_wide_16.S */ 490 /* move-wide/16 vAAAA, vBBBB */ 491 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 492 movzwl 4(rPC), %ecx # ecx<- BBBB 493 movzwl 2(rPC), %eax # eax<- AAAA 494 GET_WIDE_FP_VREG %xmm0, %ecx # xmm0 <- v[B] 495 SET_WIDE_FP_VREG %xmm0, %eax # v[A] <- xmm0 496 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 497 498/* ------------------------------ */ 499 .balign 128 500.L_op_move_object: /* 0x07 */ 501/* File: x86/op_move_object.S */ 502/* File: x86/op_move.S */ 503 /* for move, move-object, long-to-int */ 504 /* op vA, vB */ 505 movzbl rINSTbl, %eax # eax <- BA 506 andb $0xf, %al # eax <- A 507 shrl $4, rINST # rINST <- B 508 GET_VREG rINST, rINST 509 .if 1 510 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 511 .else 512 SET_VREG rINST, %eax # fp[A] <- fp[B] 513 .endif 514 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 515 516 517/* ------------------------------ */ 518 .balign 128 519.L_op_move_object_from16: /* 0x08 */ 520/* File: x86/op_move_object_from16.S */ 521/* File: x86/op_move_from16.S */ 522 /* for: move/from16, move-object/from16 */ 523 /* op vAA, vBBBB */ 524 movzx rINSTbl, %eax # eax <- AA 525 movw 2(rPC), rINSTw # rINSTw <- BBBB 526 GET_VREG rINST, rINST # rINST <- fp[BBBB] 527 .if 1 528 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 529 .else 530 SET_VREG rINST, %eax # fp[A] <- fp[B] 531 .endif 532 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 533 534 535/* ------------------------------ */ 536 .balign 128 537.L_op_move_object_16: /* 0x09 */ 538/* File: x86/op_move_object_16.S */ 539/* File: x86/op_move_16.S */ 540 /* for: move/16, move-object/16 */ 541 /* op vAAAA, vBBBB */ 542 movzwl 4(rPC), %ecx # ecx <- BBBB 543 movzwl 2(rPC), %eax # eax <- AAAA 544 GET_VREG rINST, %ecx 545 .if 1 546 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 547 .else 548 SET_VREG rINST, %eax # fp[A] <- fp[B] 549 .endif 550 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 551 552 553/* ------------------------------ */ 554 .balign 128 555.L_op_move_result: /* 0x0a */ 556/* File: x86/op_move_result.S */ 557 /* for: move-result, move-result-object */ 558 /* op vAA */ 559 movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType. 560 movl (%eax), %eax # r0 <- result.i. 561 .if 0 562 SET_VREG_OBJECT %eax, rINST # fp[A] <- fp[B] 563 .else 564 SET_VREG %eax, rINST # fp[A] <- fp[B] 565 .endif 566 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 567 568/* ------------------------------ */ 569 .balign 128 570.L_op_move_result_wide: /* 0x0b */ 571/* File: x86/op_move_result_wide.S */ 572 /* move-result-wide vAA */ 573 movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType. 574 movl 4(%eax), %ecx # Get high 575 movl (%eax), %eax # Get low 576 SET_VREG %eax, rINST # v[AA+0] <- eax 577 SET_VREG_HIGH %ecx, rINST # v[AA+1] <- ecx 578 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 579 580/* ------------------------------ */ 581 .balign 128 582.L_op_move_result_object: /* 0x0c */ 583/* File: x86/op_move_result_object.S */ 584/* File: x86/op_move_result.S */ 585 /* for: move-result, move-result-object */ 586 /* op vAA */ 587 movl OFF_FP_RESULT_REGISTER(rFP), %eax # get pointer to result JType. 588 movl (%eax), %eax # r0 <- result.i. 589 .if 1 590 SET_VREG_OBJECT %eax, rINST # fp[A] <- fp[B] 591 .else 592 SET_VREG %eax, rINST # fp[A] <- fp[B] 593 .endif 594 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 595 596 597/* ------------------------------ */ 598 .balign 128 599.L_op_move_exception: /* 0x0d */ 600/* File: x86/op_move_exception.S */ 601 /* move-exception vAA */ 602 movl rSELF, %ecx 603 movl THREAD_EXCEPTION_OFFSET(%ecx), %eax 604 SET_VREG_OBJECT %eax, rINST # fp[AA] <- exception object 605 movl $0, THREAD_EXCEPTION_OFFSET(%ecx) 606 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 607 608/* ------------------------------ */ 609 .balign 128 610.L_op_return_void: /* 0x0e */ 611/* File: x86/op_return_void.S */ 612 .extern MterpThreadFenceForConstructor 613 call SYMBOL(MterpThreadFenceForConstructor) 614 movl rSELF, %eax 615 testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 616 jz 1f 617 movl %eax, OUT_ARG0(%esp) 618 call SYMBOL(MterpSuspendCheck) 6191: 620 xorl %eax, %eax 621 xorl %ecx, %ecx 622 jmp MterpReturn 623 624/* ------------------------------ */ 625 .balign 128 626.L_op_return: /* 0x0f */ 627/* File: x86/op_return.S */ 628/* 629 * Return a 32-bit value. 630 * 631 * for: return, return-object 632 */ 633 /* op vAA */ 634 .extern MterpThreadFenceForConstructor 635 call SYMBOL(MterpThreadFenceForConstructor) 636 movl rSELF, %eax 637 testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 638 jz 1f 639 movl %eax, OUT_ARG0(%esp) 640 call SYMBOL(MterpSuspendCheck) 6411: 642 GET_VREG %eax, rINST # eax <- vAA 643 xorl %ecx, %ecx 644 jmp MterpReturn 645 646/* ------------------------------ */ 647 .balign 128 648.L_op_return_wide: /* 0x10 */ 649/* File: x86/op_return_wide.S */ 650/* 651 * Return a 64-bit value. 652 */ 653 /* return-wide vAA */ 654 .extern MterpThreadFenceForConstructor 655 call SYMBOL(MterpThreadFenceForConstructor) 656 movl rSELF, %eax 657 testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 658 jz 1f 659 movl %eax, OUT_ARG0(%esp) 660 call SYMBOL(MterpSuspendCheck) 6611: 662 GET_VREG %eax, rINST # eax <- v[AA+0] 663 GET_VREG_HIGH %ecx, rINST # ecx <- v[AA+1] 664 jmp MterpReturn 665 666/* ------------------------------ */ 667 .balign 128 668.L_op_return_object: /* 0x11 */ 669/* File: x86/op_return_object.S */ 670/* File: x86/op_return.S */ 671/* 672 * Return a 32-bit value. 673 * 674 * for: return, return-object 675 */ 676 /* op vAA */ 677 .extern MterpThreadFenceForConstructor 678 call SYMBOL(MterpThreadFenceForConstructor) 679 movl rSELF, %eax 680 testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 681 jz 1f 682 movl %eax, OUT_ARG0(%esp) 683 call SYMBOL(MterpSuspendCheck) 6841: 685 GET_VREG %eax, rINST # eax <- vAA 686 xorl %ecx, %ecx 687 jmp MterpReturn 688 689 690/* ------------------------------ */ 691 .balign 128 692.L_op_const_4: /* 0x12 */ 693/* File: x86/op_const_4.S */ 694 /* const/4 vA, #+B */ 695 movsx rINSTbl, %eax # eax <-ssssssBx 696 movl $0xf, rINST 697 andl %eax, rINST # rINST <- A 698 sarl $4, %eax 699 SET_VREG %eax, rINST 700 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 701 702/* ------------------------------ */ 703 .balign 128 704.L_op_const_16: /* 0x13 */ 705/* File: x86/op_const_16.S */ 706 /* const/16 vAA, #+BBBB */ 707 movswl 2(rPC), %ecx # ecx <- ssssBBBB 708 SET_VREG %ecx, rINST # vAA <- ssssBBBB 709 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 710 711/* ------------------------------ */ 712 .balign 128 713.L_op_const: /* 0x14 */ 714/* File: x86/op_const.S */ 715 /* const vAA, #+BBBBbbbb */ 716 movl 2(rPC), %eax # grab all 32 bits at once 717 SET_VREG %eax, rINST # vAA<- eax 718 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 719 720/* ------------------------------ */ 721 .balign 128 722.L_op_const_high16: /* 0x15 */ 723/* File: x86/op_const_high16.S */ 724 /* const/high16 vAA, #+BBBB0000 */ 725 movzwl 2(rPC), %eax # eax <- 0000BBBB 726 sall $16, %eax # eax <- BBBB0000 727 SET_VREG %eax, rINST # vAA <- eax 728 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 729 730/* ------------------------------ */ 731 .balign 128 732.L_op_const_wide_16: /* 0x16 */ 733/* File: x86/op_const_wide_16.S */ 734 /* const-wide/16 vAA, #+BBBB */ 735 movswl 2(rPC), %eax # eax <- ssssBBBB 736 movl rIBASE, %ecx # preserve rIBASE (cltd trashes it) 737 cltd # rIBASE:eax <- ssssssssssssBBBB 738 SET_VREG_HIGH rIBASE, rINST # store msw 739 SET_VREG %eax, rINST # store lsw 740 movl %ecx, rIBASE # restore rIBASE 741 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 742 743/* ------------------------------ */ 744 .balign 128 745.L_op_const_wide_32: /* 0x17 */ 746/* File: x86/op_const_wide_32.S */ 747 /* const-wide/32 vAA, #+BBBBbbbb */ 748 movl 2(rPC), %eax # eax <- BBBBbbbb 749 movl rIBASE, %ecx # preserve rIBASE (cltd trashes it) 750 cltd # rIBASE:eax <- ssssssssssssBBBB 751 SET_VREG_HIGH rIBASE, rINST # store msw 752 SET_VREG %eax, rINST # store lsw 753 movl %ecx, rIBASE # restore rIBASE 754 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 755 756/* ------------------------------ */ 757 .balign 128 758.L_op_const_wide: /* 0x18 */ 759/* File: x86/op_const_wide.S */ 760 /* const-wide vAA, #+HHHHhhhhBBBBbbbb */ 761 movl 2(rPC), %eax # eax <- lsw 762 movzbl rINSTbl, %ecx # ecx <- AA 763 movl 6(rPC), rINST # rINST <- msw 764 SET_VREG %eax, %ecx 765 SET_VREG_HIGH rINST, %ecx 766 ADVANCE_PC_FETCH_AND_GOTO_NEXT 5 767 768/* ------------------------------ */ 769 .balign 128 770.L_op_const_wide_high16: /* 0x19 */ 771/* File: x86/op_const_wide_high16.S */ 772 /* const-wide/high16 vAA, #+BBBB000000000000 */ 773 movzwl 2(rPC), %eax # eax <- 0000BBBB 774 sall $16, %eax # eax <- BBBB0000 775 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 776 xorl %eax, %eax 777 SET_VREG %eax, rINST # v[AA+0] <- eax 778 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 779 780/* ------------------------------ */ 781 .balign 128 782.L_op_const_string: /* 0x1a */ 783/* File: x86/op_const_string.S */ 784 /* const/string vAA, String@BBBB */ 785 EXPORT_PC 786 movzwl 2(rPC), %eax # eax <- BBBB 787 movl %eax, OUT_ARG0(%esp) 788 movl rINST, OUT_ARG1(%esp) 789 leal OFF_FP_SHADOWFRAME(rFP), %eax 790 movl %eax, OUT_ARG2(%esp) 791 movl rSELF, %eax 792 movl %eax, OUT_ARG3(%esp) 793 call SYMBOL(MterpConstString) # (index, tgt_reg, shadow_frame, self) 794 RESTORE_IBASE 795 testb %al, %al 796 jnz MterpPossibleException 797 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 798 799/* ------------------------------ */ 800 .balign 128 801.L_op_const_string_jumbo: /* 0x1b */ 802/* File: x86/op_const_string_jumbo.S */ 803 /* const/string vAA, String@BBBBBBBB */ 804 EXPORT_PC 805 movl 2(rPC), %eax # eax <- BBBB 806 movl %eax, OUT_ARG0(%esp) 807 movl rINST, OUT_ARG1(%esp) 808 leal OFF_FP_SHADOWFRAME(rFP), %eax 809 movl %eax, OUT_ARG2(%esp) 810 movl rSELF, %eax 811 movl %eax, OUT_ARG3(%esp) 812 call SYMBOL(MterpConstString) # (index, tgt_reg, shadow_frame, self) 813 RESTORE_IBASE 814 testb %al, %al 815 jnz MterpPossibleException 816 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 817 818/* ------------------------------ */ 819 .balign 128 820.L_op_const_class: /* 0x1c */ 821/* File: x86/op_const_class.S */ 822 /* const/class vAA, Class@BBBB */ 823 EXPORT_PC 824 movzwl 2(rPC), %eax # eax<- BBBB 825 movl %eax, OUT_ARG0(%esp) 826 movl rINST, OUT_ARG1(%esp) 827 leal OFF_FP_SHADOWFRAME(rFP), %eax 828 movl %eax, OUT_ARG2(%esp) 829 movl rSELF, %eax 830 movl %eax, OUT_ARG3(%esp) 831 call SYMBOL(MterpConstClass) # (index, tgt_reg, shadow_frame, self) 832 RESTORE_IBASE 833 testb %al, %al 834 jnz MterpPossibleException 835 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 836 837/* ------------------------------ */ 838 .balign 128 839.L_op_monitor_enter: /* 0x1d */ 840/* File: x86/op_monitor_enter.S */ 841/* 842 * Synchronize on an object. 843 */ 844 /* monitor-enter vAA */ 845 EXPORT_PC 846 GET_VREG %ecx, rINST 847 movl %ecx, OUT_ARG0(%esp) 848 movl rSELF, %eax 849 movl %eax, OUT_ARG1(%esp) 850 call SYMBOL(artLockObjectFromCode) # (object, self) 851 RESTORE_IBASE 852 testb %al, %al 853 jnz MterpException 854 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 855 856/* ------------------------------ */ 857 .balign 128 858.L_op_monitor_exit: /* 0x1e */ 859/* File: x86/op_monitor_exit.S */ 860/* 861 * Unlock an object. 862 * 863 * Exceptions that occur when unlocking a monitor need to appear as 864 * if they happened at the following instruction. See the Dalvik 865 * instruction spec. 866 */ 867 /* monitor-exit vAA */ 868 EXPORT_PC 869 GET_VREG %ecx, rINST 870 movl %ecx, OUT_ARG0(%esp) 871 movl rSELF, %eax 872 movl %eax, OUT_ARG1(%esp) 873 call SYMBOL(artUnlockObjectFromCode) # (object, self) 874 RESTORE_IBASE 875 testb %al, %al 876 jnz MterpException 877 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 878 879/* ------------------------------ */ 880 .balign 128 881.L_op_check_cast: /* 0x1f */ 882/* File: x86/op_check_cast.S */ 883/* 884 * Check to see if a cast from one class to another is allowed. 885 */ 886 /* check-cast vAA, class@BBBB */ 887 EXPORT_PC 888 movzwl 2(rPC), %eax # eax <- BBBB 889 movl %eax, OUT_ARG0(%esp) 890 leal VREG_ADDRESS(rINST), %ecx 891 movl %ecx, OUT_ARG1(%esp) 892 movl OFF_FP_METHOD(rFP),%eax 893 movl %eax, OUT_ARG2(%esp) 894 movl rSELF, %ecx 895 movl %ecx, OUT_ARG3(%esp) 896 call SYMBOL(MterpCheckCast) # (index, &obj, method, self) 897 RESTORE_IBASE 898 testb %al, %al 899 jnz MterpPossibleException 900 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 901 902/* ------------------------------ */ 903 .balign 128 904.L_op_instance_of: /* 0x20 */ 905/* File: x86/op_instance_of.S */ 906/* 907 * Check to see if an object reference is an instance of a class. 908 * 909 * Most common situation is a non-null object, being compared against 910 * an already-resolved class. 911 */ 912 /* instance-of vA, vB, class@CCCC */ 913 EXPORT_PC 914 movzwl 2(rPC), %eax # eax <- BBBB 915 movl %eax, OUT_ARG0(%esp) 916 movl rINST, %eax # eax <- BA 917 sarl $4, %eax # eax <- B 918 leal VREG_ADDRESS(%eax), %ecx # Get object address 919 movl %ecx, OUT_ARG1(%esp) 920 movl OFF_FP_METHOD(rFP),%eax 921 movl %eax, OUT_ARG2(%esp) 922 movl rSELF, %ecx 923 movl %ecx, OUT_ARG3(%esp) 924 call SYMBOL(MterpInstanceOf) # (index, &obj, method, self) 925 movl rSELF, %ecx 926 RESTORE_IBASE_FROM_SELF %ecx 927 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 928 jnz MterpException 929 andb $0xf, rINSTbl # rINSTbl <- A 930 SET_VREG %eax, rINST 931 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 932 933/* ------------------------------ */ 934 .balign 128 935.L_op_array_length: /* 0x21 */ 936/* File: x86/op_array_length.S */ 937/* 938 * Return the length of an array. 939 */ 940 mov rINST, %eax # eax <- BA 941 sarl $4, rINST # rINST <- B 942 GET_VREG %ecx, rINST # ecx <- vB (object ref) 943 testl %ecx, %ecx # is null? 944 je common_errNullObject 945 andb $0xf, %al # eax <- A 946 movl MIRROR_ARRAY_LENGTH_OFFSET(%ecx), rINST 947 SET_VREG rINST, %eax 948 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 949 950/* ------------------------------ */ 951 .balign 128 952.L_op_new_instance: /* 0x22 */ 953/* File: x86/op_new_instance.S */ 954/* 955 * Create a new instance of a class. 956 */ 957 /* new-instance vAA, class@BBBB */ 958 EXPORT_PC 959 leal OFF_FP_SHADOWFRAME(rFP), %eax 960 movl %eax, OUT_ARG0(%esp) 961 movl rSELF, %ecx 962 movl %ecx, OUT_ARG1(%esp) 963 REFRESH_INST 34 964 movl rINST, OUT_ARG2(%esp) 965 call SYMBOL(MterpNewInstance) 966 RESTORE_IBASE 967 testb %al, %al # 0 means an exception is thrown 968 jz MterpPossibleException 969 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 970 971/* ------------------------------ */ 972 .balign 128 973.L_op_new_array: /* 0x23 */ 974/* File: x86/op_new_array.S */ 975/* 976 * Allocate an array of objects, specified with the array class 977 * and a count. 978 * 979 * The verifier guarantees that this is an array class, so we don't 980 * check for it here. 981 */ 982 /* new-array vA, vB, class@CCCC */ 983 EXPORT_PC 984 leal OFF_FP_SHADOWFRAME(rFP), %eax 985 movl %eax, OUT_ARG0(%esp) 986 movl rPC, OUT_ARG1(%esp) 987 REFRESH_INST 35 988 movl rINST, OUT_ARG2(%esp) 989 movl rSELF, %ecx 990 movl %ecx, OUT_ARG3(%esp) 991 call SYMBOL(MterpNewArray) 992 RESTORE_IBASE 993 testb %al, %al # 0 means an exception is thrown 994 jz MterpPossibleException 995 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 996 997/* ------------------------------ */ 998 .balign 128 999.L_op_filled_new_array: /* 0x24 */ 1000/* File: x86/op_filled_new_array.S */ 1001/* 1002 * Create a new array with elements filled from registers. 1003 * 1004 * for: filled-new-array, filled-new-array/range 1005 */ 1006 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 1007 /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ 1008 .extern MterpFilledNewArray 1009 EXPORT_PC 1010 leal OFF_FP_SHADOWFRAME(rFP), %eax 1011 movl %eax, OUT_ARG0(%esp) 1012 movl rPC, OUT_ARG1(%esp) 1013 movl rSELF, %ecx 1014 movl %ecx, OUT_ARG2(%esp) 1015 call SYMBOL(MterpFilledNewArray) 1016 REFRESH_IBASE 1017 testb %al, %al # 0 means an exception is thrown 1018 jz MterpPossibleException 1019 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 1020 1021/* ------------------------------ */ 1022 .balign 128 1023.L_op_filled_new_array_range: /* 0x25 */ 1024/* File: x86/op_filled_new_array_range.S */ 1025/* File: x86/op_filled_new_array.S */ 1026/* 1027 * Create a new array with elements filled from registers. 1028 * 1029 * for: filled-new-array, filled-new-array/range 1030 */ 1031 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 1032 /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ 1033 .extern MterpFilledNewArrayRange 1034 EXPORT_PC 1035 leal OFF_FP_SHADOWFRAME(rFP), %eax 1036 movl %eax, OUT_ARG0(%esp) 1037 movl rPC, OUT_ARG1(%esp) 1038 movl rSELF, %ecx 1039 movl %ecx, OUT_ARG2(%esp) 1040 call SYMBOL(MterpFilledNewArrayRange) 1041 REFRESH_IBASE 1042 testb %al, %al # 0 means an exception is thrown 1043 jz MterpPossibleException 1044 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 1045 1046 1047/* ------------------------------ */ 1048 .balign 128 1049.L_op_fill_array_data: /* 0x26 */ 1050/* File: x86/op_fill_array_data.S */ 1051 /* fill-array-data vAA, +BBBBBBBB */ 1052 EXPORT_PC 1053 movl 2(rPC), %ecx # ecx <- BBBBbbbb 1054 leal (rPC,%ecx,2), %ecx # ecx <- PC + BBBBbbbb*2 1055 GET_VREG %eax, rINST # eax <- vAA (array object) 1056 movl %eax, OUT_ARG0(%esp) 1057 movl %ecx, OUT_ARG1(%esp) 1058 call SYMBOL(MterpFillArrayData) # (obj, payload) 1059 REFRESH_IBASE 1060 testb %al, %al # 0 means an exception is thrown 1061 jz MterpPossibleException 1062 ADVANCE_PC_FETCH_AND_GOTO_NEXT 3 1063 1064/* ------------------------------ */ 1065 .balign 128 1066.L_op_throw: /* 0x27 */ 1067/* File: x86/op_throw.S */ 1068/* 1069 * Throw an exception object in the current thread. 1070 */ 1071 /* throw vAA */ 1072 EXPORT_PC 1073 GET_VREG %eax, rINST # eax<- vAA (exception object) 1074 testl %eax, %eax 1075 jz common_errNullObject 1076 movl rSELF,%ecx 1077 movl %eax, THREAD_EXCEPTION_OFFSET(%ecx) 1078 jmp MterpException 1079 1080/* ------------------------------ */ 1081 .balign 128 1082.L_op_goto: /* 0x28 */ 1083/* File: x86/op_goto.S */ 1084/* 1085 * Unconditional branch, 8-bit offset. 1086 * 1087 * The branch distance is a signed code-unit offset, which we need to 1088 * double to get a byte offset. 1089 */ 1090 /* goto +AA */ 1091 movsbl rINSTbl, rINST # rINST <- ssssssAA 1092 testl rINST, rINST 1093 jmp MterpCommonTakenBranch 1094 1095/* ------------------------------ */ 1096 .balign 128 1097.L_op_goto_16: /* 0x29 */ 1098/* File: x86/op_goto_16.S */ 1099/* 1100 * Unconditional branch, 16-bit offset. 1101 * 1102 * The branch distance is a signed code-unit offset, which we need to 1103 * double to get a byte offset. 1104 */ 1105 /* goto/16 +AAAA */ 1106 movswl 2(rPC), rINST # rINST <- ssssAAAA 1107 testl rINST, rINST 1108 jmp MterpCommonTakenBranch 1109 1110/* ------------------------------ */ 1111 .balign 128 1112.L_op_goto_32: /* 0x2a */ 1113/* File: x86/op_goto_32.S */ 1114/* 1115 * Unconditional branch, 32-bit offset. 1116 * 1117 * The branch distance is a signed code-unit offset, which we need to 1118 * double to get a byte offset. 1119 * 1120 * Unlike most opcodes, this one is allowed to branch to itself, so 1121 * our "backward branch" test must be "<=0" instead of "<0". Because 1122 * we need the V bit set, we'll use an adds to convert from Dalvik 1123 * offset to byte offset. 1124 */ 1125 /* goto/32 +AAAAAAAA */ 1126 movl 2(rPC), rINST # rINST <- AAAAAAAA 1127 testl rINST, rINST 1128 jmp MterpCommonTakenBranch 1129 1130/* ------------------------------ */ 1131 .balign 128 1132.L_op_packed_switch: /* 0x2b */ 1133/* File: x86/op_packed_switch.S */ 1134/* 1135 * Handle a packed-switch or sparse-switch instruction. In both cases 1136 * we decode it and hand it off to a helper function. 1137 * 1138 * We don't really expect backward branches in a switch statement, but 1139 * they're perfectly legal, so we check for them here. 1140 * 1141 * for: packed-switch, sparse-switch 1142 */ 1143 /* op vAA, +BBBB */ 1144 movl 2(rPC), %ecx # ecx <- BBBBbbbb 1145 GET_VREG %eax, rINST # eax <- vAA 1146 leal (rPC,%ecx,2), %ecx # ecx <- PC + BBBBbbbb*2 1147 movl %eax, OUT_ARG1(%esp) # ARG1 <- vAA 1148 movl %ecx, OUT_ARG0(%esp) # ARG0 <- switchData 1149 call SYMBOL(MterpDoPackedSwitch) 1150 REFRESH_IBASE 1151 testl %eax, %eax 1152 movl %eax, rINST 1153 jmp MterpCommonTakenBranch 1154 1155/* ------------------------------ */ 1156 .balign 128 1157.L_op_sparse_switch: /* 0x2c */ 1158/* File: x86/op_sparse_switch.S */ 1159/* File: x86/op_packed_switch.S */ 1160/* 1161 * Handle a packed-switch or sparse-switch instruction. In both cases 1162 * we decode it and hand it off to a helper function. 1163 * 1164 * We don't really expect backward branches in a switch statement, but 1165 * they're perfectly legal, so we check for them here. 1166 * 1167 * for: packed-switch, sparse-switch 1168 */ 1169 /* op vAA, +BBBB */ 1170 movl 2(rPC), %ecx # ecx <- BBBBbbbb 1171 GET_VREG %eax, rINST # eax <- vAA 1172 leal (rPC,%ecx,2), %ecx # ecx <- PC + BBBBbbbb*2 1173 movl %eax, OUT_ARG1(%esp) # ARG1 <- vAA 1174 movl %ecx, OUT_ARG0(%esp) # ARG0 <- switchData 1175 call SYMBOL(MterpDoSparseSwitch) 1176 REFRESH_IBASE 1177 testl %eax, %eax 1178 movl %eax, rINST 1179 jmp MterpCommonTakenBranch 1180 1181 1182/* ------------------------------ */ 1183 .balign 128 1184.L_op_cmpl_float: /* 0x2d */ 1185/* File: x86/op_cmpl_float.S */ 1186/* File: x86/fpcmp.S */ 1187/* 1188 * Compare two floating-point values. Puts 0, 1, or -1 into the 1189 * destination register based on the results of the comparison. 1190 * 1191 * int compare(x, y) { 1192 * if (x == y) { 1193 * return 0; 1194 * } else if (x < y) { 1195 * return -1; 1196 * } else if (x > y) { 1197 * return 1; 1198 * } else { 1199 * return nanval ? 1 : -1; 1200 * } 1201 * } 1202 */ 1203 /* op vAA, vBB, vCC */ 1204 movzbl 3(rPC), %ecx # ecx<- CC 1205 movzbl 2(rPC), %eax # eax<- BB 1206 movss VREG_ADDRESS(%eax), %xmm0 1207 xor %eax, %eax 1208 ucomiss VREG_ADDRESS(%ecx), %xmm0 1209 jp .Lop_cmpl_float_nan_is_neg 1210 je .Lop_cmpl_float_finish 1211 jb .Lop_cmpl_float_less 1212.Lop_cmpl_float_nan_is_pos: 1213 incl %eax 1214 jmp .Lop_cmpl_float_finish 1215.Lop_cmpl_float_nan_is_neg: 1216.Lop_cmpl_float_less: 1217 decl %eax 1218.Lop_cmpl_float_finish: 1219 SET_VREG %eax, rINST 1220 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1221 1222 1223/* ------------------------------ */ 1224 .balign 128 1225.L_op_cmpg_float: /* 0x2e */ 1226/* File: x86/op_cmpg_float.S */ 1227/* File: x86/fpcmp.S */ 1228/* 1229 * Compare two floating-point values. Puts 0, 1, or -1 into the 1230 * destination register based on the results of the comparison. 1231 * 1232 * int compare(x, y) { 1233 * if (x == y) { 1234 * return 0; 1235 * } else if (x < y) { 1236 * return -1; 1237 * } else if (x > y) { 1238 * return 1; 1239 * } else { 1240 * return nanval ? 1 : -1; 1241 * } 1242 * } 1243 */ 1244 /* op vAA, vBB, vCC */ 1245 movzbl 3(rPC), %ecx # ecx<- CC 1246 movzbl 2(rPC), %eax # eax<- BB 1247 movss VREG_ADDRESS(%eax), %xmm0 1248 xor %eax, %eax 1249 ucomiss VREG_ADDRESS(%ecx), %xmm0 1250 jp .Lop_cmpg_float_nan_is_pos 1251 je .Lop_cmpg_float_finish 1252 jb .Lop_cmpg_float_less 1253.Lop_cmpg_float_nan_is_pos: 1254 incl %eax 1255 jmp .Lop_cmpg_float_finish 1256.Lop_cmpg_float_nan_is_neg: 1257.Lop_cmpg_float_less: 1258 decl %eax 1259.Lop_cmpg_float_finish: 1260 SET_VREG %eax, rINST 1261 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1262 1263 1264/* ------------------------------ */ 1265 .balign 128 1266.L_op_cmpl_double: /* 0x2f */ 1267/* File: x86/op_cmpl_double.S */ 1268/* File: x86/fpcmp.S */ 1269/* 1270 * Compare two floating-point values. Puts 0, 1, or -1 into the 1271 * destination register based on the results of the comparison. 1272 * 1273 * int compare(x, y) { 1274 * if (x == y) { 1275 * return 0; 1276 * } else if (x < y) { 1277 * return -1; 1278 * } else if (x > y) { 1279 * return 1; 1280 * } else { 1281 * return nanval ? 1 : -1; 1282 * } 1283 * } 1284 */ 1285 /* op vAA, vBB, vCC */ 1286 movzbl 3(rPC), %ecx # ecx<- CC 1287 movzbl 2(rPC), %eax # eax<- BB 1288 movsd VREG_ADDRESS(%eax), %xmm0 1289 xor %eax, %eax 1290 ucomisd VREG_ADDRESS(%ecx), %xmm0 1291 jp .Lop_cmpl_double_nan_is_neg 1292 je .Lop_cmpl_double_finish 1293 jb .Lop_cmpl_double_less 1294.Lop_cmpl_double_nan_is_pos: 1295 incl %eax 1296 jmp .Lop_cmpl_double_finish 1297.Lop_cmpl_double_nan_is_neg: 1298.Lop_cmpl_double_less: 1299 decl %eax 1300.Lop_cmpl_double_finish: 1301 SET_VREG %eax, rINST 1302 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1303 1304 1305/* ------------------------------ */ 1306 .balign 128 1307.L_op_cmpg_double: /* 0x30 */ 1308/* File: x86/op_cmpg_double.S */ 1309/* File: x86/fpcmp.S */ 1310/* 1311 * Compare two floating-point values. Puts 0, 1, or -1 into the 1312 * destination register based on the results of the comparison. 1313 * 1314 * int compare(x, y) { 1315 * if (x == y) { 1316 * return 0; 1317 * } else if (x < y) { 1318 * return -1; 1319 * } else if (x > y) { 1320 * return 1; 1321 * } else { 1322 * return nanval ? 1 : -1; 1323 * } 1324 * } 1325 */ 1326 /* op vAA, vBB, vCC */ 1327 movzbl 3(rPC), %ecx # ecx<- CC 1328 movzbl 2(rPC), %eax # eax<- BB 1329 movsd VREG_ADDRESS(%eax), %xmm0 1330 xor %eax, %eax 1331 ucomisd VREG_ADDRESS(%ecx), %xmm0 1332 jp .Lop_cmpg_double_nan_is_pos 1333 je .Lop_cmpg_double_finish 1334 jb .Lop_cmpg_double_less 1335.Lop_cmpg_double_nan_is_pos: 1336 incl %eax 1337 jmp .Lop_cmpg_double_finish 1338.Lop_cmpg_double_nan_is_neg: 1339.Lop_cmpg_double_less: 1340 decl %eax 1341.Lop_cmpg_double_finish: 1342 SET_VREG %eax, rINST 1343 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1344 1345 1346/* ------------------------------ */ 1347 .balign 128 1348.L_op_cmp_long: /* 0x31 */ 1349/* File: x86/op_cmp_long.S */ 1350/* 1351 * Compare two 64-bit values. Puts 0, 1, or -1 into the destination 1352 * register based on the results of the comparison. 1353 */ 1354 /* cmp-long vAA, vBB, vCC */ 1355 movzbl 2(rPC), %eax # eax <- BB 1356 movzbl 3(rPC), %ecx # ecx <- CC 1357 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1], BB is clobbered 1358 cmpl VREG_HIGH_ADDRESS(%ecx), %eax 1359 jl .Lop_cmp_long_smaller 1360 jg .Lop_cmp_long_bigger 1361 movzbl 2(rPC), %eax # eax <- BB, restore BB 1362 GET_VREG %eax, %eax # eax <- v[BB] 1363 sub VREG_ADDRESS(%ecx), %eax 1364 ja .Lop_cmp_long_bigger 1365 jb .Lop_cmp_long_smaller 1366.Lop_cmp_long_finish: 1367 SET_VREG %eax, rINST 1368 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1369 1370.Lop_cmp_long_bigger: 1371 movl $1, %eax 1372 jmp .Lop_cmp_long_finish 1373 1374.Lop_cmp_long_smaller: 1375 movl $-1, %eax 1376 jmp .Lop_cmp_long_finish 1377 1378/* ------------------------------ */ 1379 .balign 128 1380.L_op_if_eq: /* 0x32 */ 1381/* File: x86/op_if_eq.S */ 1382/* File: x86/bincmp.S */ 1383/* 1384 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1385 * fragment that specifies the *reverse* comparison to perform, e.g. 1386 * for "if-le" you would use "gt". 1387 * 1388 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1389 */ 1390 /* if-cmp vA, vB, +CCCC */ 1391 movzx rINSTbl, %ecx # ecx <- A+ 1392 andb $0xf, %cl # ecx <- A 1393 GET_VREG %eax, %ecx # eax <- vA 1394 sarl $4, rINST # rINST <- B 1395 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1396 jne 1f 1397 movswl 2(rPC), rINST # Get signed branch offset 1398 testl rINST, rINST 1399 jmp MterpCommonTakenBranch 14001: 1401 cmpw $JIT_CHECK_OSR, rPROFILE 1402 je .L_check_not_taken_osr 1403 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1404 1405 1406/* ------------------------------ */ 1407 .balign 128 1408.L_op_if_ne: /* 0x33 */ 1409/* File: x86/op_if_ne.S */ 1410/* File: x86/bincmp.S */ 1411/* 1412 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1413 * fragment that specifies the *reverse* comparison to perform, e.g. 1414 * for "if-le" you would use "gt". 1415 * 1416 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1417 */ 1418 /* if-cmp vA, vB, +CCCC */ 1419 movzx rINSTbl, %ecx # ecx <- A+ 1420 andb $0xf, %cl # ecx <- A 1421 GET_VREG %eax, %ecx # eax <- vA 1422 sarl $4, rINST # rINST <- B 1423 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1424 je 1f 1425 movswl 2(rPC), rINST # Get signed branch offset 1426 testl rINST, rINST 1427 jmp MterpCommonTakenBranch 14281: 1429 cmpw $JIT_CHECK_OSR, rPROFILE 1430 je .L_check_not_taken_osr 1431 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1432 1433 1434/* ------------------------------ */ 1435 .balign 128 1436.L_op_if_lt: /* 0x34 */ 1437/* File: x86/op_if_lt.S */ 1438/* File: x86/bincmp.S */ 1439/* 1440 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1441 * fragment that specifies the *reverse* comparison to perform, e.g. 1442 * for "if-le" you would use "gt". 1443 * 1444 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1445 */ 1446 /* if-cmp vA, vB, +CCCC */ 1447 movzx rINSTbl, %ecx # ecx <- A+ 1448 andb $0xf, %cl # ecx <- A 1449 GET_VREG %eax, %ecx # eax <- vA 1450 sarl $4, rINST # rINST <- B 1451 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1452 jge 1f 1453 movswl 2(rPC), rINST # Get signed branch offset 1454 testl rINST, rINST 1455 jmp MterpCommonTakenBranch 14561: 1457 cmpw $JIT_CHECK_OSR, rPROFILE 1458 je .L_check_not_taken_osr 1459 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1460 1461 1462/* ------------------------------ */ 1463 .balign 128 1464.L_op_if_ge: /* 0x35 */ 1465/* File: x86/op_if_ge.S */ 1466/* File: x86/bincmp.S */ 1467/* 1468 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1469 * fragment that specifies the *reverse* comparison to perform, e.g. 1470 * for "if-le" you would use "gt". 1471 * 1472 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1473 */ 1474 /* if-cmp vA, vB, +CCCC */ 1475 movzx rINSTbl, %ecx # ecx <- A+ 1476 andb $0xf, %cl # ecx <- A 1477 GET_VREG %eax, %ecx # eax <- vA 1478 sarl $4, rINST # rINST <- B 1479 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1480 jl 1f 1481 movswl 2(rPC), rINST # Get signed branch offset 1482 testl rINST, rINST 1483 jmp MterpCommonTakenBranch 14841: 1485 cmpw $JIT_CHECK_OSR, rPROFILE 1486 je .L_check_not_taken_osr 1487 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1488 1489 1490/* ------------------------------ */ 1491 .balign 128 1492.L_op_if_gt: /* 0x36 */ 1493/* File: x86/op_if_gt.S */ 1494/* File: x86/bincmp.S */ 1495/* 1496 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1497 * fragment that specifies the *reverse* comparison to perform, e.g. 1498 * for "if-le" you would use "gt". 1499 * 1500 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1501 */ 1502 /* if-cmp vA, vB, +CCCC */ 1503 movzx rINSTbl, %ecx # ecx <- A+ 1504 andb $0xf, %cl # ecx <- A 1505 GET_VREG %eax, %ecx # eax <- vA 1506 sarl $4, rINST # rINST <- B 1507 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1508 jle 1f 1509 movswl 2(rPC), rINST # Get signed branch offset 1510 testl rINST, rINST 1511 jmp MterpCommonTakenBranch 15121: 1513 cmpw $JIT_CHECK_OSR, rPROFILE 1514 je .L_check_not_taken_osr 1515 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1516 1517 1518/* ------------------------------ */ 1519 .balign 128 1520.L_op_if_le: /* 0x37 */ 1521/* File: x86/op_if_le.S */ 1522/* File: x86/bincmp.S */ 1523/* 1524 * Generic two-operand compare-and-branch operation. Provide a "revcmp" 1525 * fragment that specifies the *reverse* comparison to perform, e.g. 1526 * for "if-le" you would use "gt". 1527 * 1528 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le 1529 */ 1530 /* if-cmp vA, vB, +CCCC */ 1531 movzx rINSTbl, %ecx # ecx <- A+ 1532 andb $0xf, %cl # ecx <- A 1533 GET_VREG %eax, %ecx # eax <- vA 1534 sarl $4, rINST # rINST <- B 1535 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB) 1536 jg 1f 1537 movswl 2(rPC), rINST # Get signed branch offset 1538 testl rINST, rINST 1539 jmp MterpCommonTakenBranch 15401: 1541 cmpw $JIT_CHECK_OSR, rPROFILE 1542 je .L_check_not_taken_osr 1543 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1544 1545 1546/* ------------------------------ */ 1547 .balign 128 1548.L_op_if_eqz: /* 0x38 */ 1549/* File: x86/op_if_eqz.S */ 1550/* File: x86/zcmp.S */ 1551/* 1552 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1553 * fragment that specifies the *reverse* comparison to perform, e.g. 1554 * for "if-le" you would use "gt". 1555 * 1556 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1557 */ 1558 /* if-cmp vAA, +BBBB */ 1559 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1560 jne 1f 1561 movswl 2(rPC), rINST # fetch signed displacement 1562 testl rINST, rINST 1563 jmp MterpCommonTakenBranch 15641: 1565 cmpw $JIT_CHECK_OSR, rPROFILE 1566 je .L_check_not_taken_osr 1567 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1568 1569 1570/* ------------------------------ */ 1571 .balign 128 1572.L_op_if_nez: /* 0x39 */ 1573/* File: x86/op_if_nez.S */ 1574/* File: x86/zcmp.S */ 1575/* 1576 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1577 * fragment that specifies the *reverse* comparison to perform, e.g. 1578 * for "if-le" you would use "gt". 1579 * 1580 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1581 */ 1582 /* if-cmp vAA, +BBBB */ 1583 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1584 je 1f 1585 movswl 2(rPC), rINST # fetch signed displacement 1586 testl rINST, rINST 1587 jmp MterpCommonTakenBranch 15881: 1589 cmpw $JIT_CHECK_OSR, rPROFILE 1590 je .L_check_not_taken_osr 1591 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1592 1593 1594/* ------------------------------ */ 1595 .balign 128 1596.L_op_if_ltz: /* 0x3a */ 1597/* File: x86/op_if_ltz.S */ 1598/* File: x86/zcmp.S */ 1599/* 1600 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1601 * fragment that specifies the *reverse* comparison to perform, e.g. 1602 * for "if-le" you would use "gt". 1603 * 1604 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1605 */ 1606 /* if-cmp vAA, +BBBB */ 1607 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1608 jge 1f 1609 movswl 2(rPC), rINST # fetch signed displacement 1610 testl rINST, rINST 1611 jmp MterpCommonTakenBranch 16121: 1613 cmpw $JIT_CHECK_OSR, rPROFILE 1614 je .L_check_not_taken_osr 1615 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1616 1617 1618/* ------------------------------ */ 1619 .balign 128 1620.L_op_if_gez: /* 0x3b */ 1621/* File: x86/op_if_gez.S */ 1622/* File: x86/zcmp.S */ 1623/* 1624 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1625 * fragment that specifies the *reverse* comparison to perform, e.g. 1626 * for "if-le" you would use "gt". 1627 * 1628 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1629 */ 1630 /* if-cmp vAA, +BBBB */ 1631 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1632 jl 1f 1633 movswl 2(rPC), rINST # fetch signed displacement 1634 testl rINST, rINST 1635 jmp MterpCommonTakenBranch 16361: 1637 cmpw $JIT_CHECK_OSR, rPROFILE 1638 je .L_check_not_taken_osr 1639 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1640 1641 1642/* ------------------------------ */ 1643 .balign 128 1644.L_op_if_gtz: /* 0x3c */ 1645/* File: x86/op_if_gtz.S */ 1646/* File: x86/zcmp.S */ 1647/* 1648 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1649 * fragment that specifies the *reverse* comparison to perform, e.g. 1650 * for "if-le" you would use "gt". 1651 * 1652 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1653 */ 1654 /* if-cmp vAA, +BBBB */ 1655 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1656 jle 1f 1657 movswl 2(rPC), rINST # fetch signed displacement 1658 testl rINST, rINST 1659 jmp MterpCommonTakenBranch 16601: 1661 cmpw $JIT_CHECK_OSR, rPROFILE 1662 je .L_check_not_taken_osr 1663 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1664 1665 1666/* ------------------------------ */ 1667 .balign 128 1668.L_op_if_lez: /* 0x3d */ 1669/* File: x86/op_if_lez.S */ 1670/* File: x86/zcmp.S */ 1671/* 1672 * Generic one-operand compare-and-branch operation. Provide a "revcmp" 1673 * fragment that specifies the *reverse* comparison to perform, e.g. 1674 * for "if-le" you would use "gt". 1675 * 1676 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez 1677 */ 1678 /* if-cmp vAA, +BBBB */ 1679 cmpl $0, VREG_ADDRESS(rINST) # compare (vA, 0) 1680 jg 1f 1681 movswl 2(rPC), rINST # fetch signed displacement 1682 testl rINST, rINST 1683 jmp MterpCommonTakenBranch 16841: 1685 cmpw $JIT_CHECK_OSR, rPROFILE 1686 je .L_check_not_taken_osr 1687 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1688 1689 1690/* ------------------------------ */ 1691 .balign 128 1692.L_op_unused_3e: /* 0x3e */ 1693/* File: x86/op_unused_3e.S */ 1694/* File: x86/unused.S */ 1695/* 1696 * Bail to reference interpreter to throw. 1697 */ 1698 jmp MterpFallback 1699 1700 1701/* ------------------------------ */ 1702 .balign 128 1703.L_op_unused_3f: /* 0x3f */ 1704/* File: x86/op_unused_3f.S */ 1705/* File: x86/unused.S */ 1706/* 1707 * Bail to reference interpreter to throw. 1708 */ 1709 jmp MterpFallback 1710 1711 1712/* ------------------------------ */ 1713 .balign 128 1714.L_op_unused_40: /* 0x40 */ 1715/* File: x86/op_unused_40.S */ 1716/* File: x86/unused.S */ 1717/* 1718 * Bail to reference interpreter to throw. 1719 */ 1720 jmp MterpFallback 1721 1722 1723/* ------------------------------ */ 1724 .balign 128 1725.L_op_unused_41: /* 0x41 */ 1726/* File: x86/op_unused_41.S */ 1727/* File: x86/unused.S */ 1728/* 1729 * Bail to reference interpreter to throw. 1730 */ 1731 jmp MterpFallback 1732 1733 1734/* ------------------------------ */ 1735 .balign 128 1736.L_op_unused_42: /* 0x42 */ 1737/* File: x86/op_unused_42.S */ 1738/* File: x86/unused.S */ 1739/* 1740 * Bail to reference interpreter to throw. 1741 */ 1742 jmp MterpFallback 1743 1744 1745/* ------------------------------ */ 1746 .balign 128 1747.L_op_unused_43: /* 0x43 */ 1748/* File: x86/op_unused_43.S */ 1749/* File: x86/unused.S */ 1750/* 1751 * Bail to reference interpreter to throw. 1752 */ 1753 jmp MterpFallback 1754 1755 1756/* ------------------------------ */ 1757 .balign 128 1758.L_op_aget: /* 0x44 */ 1759/* File: x86/op_aget.S */ 1760/* 1761 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1762 * 1763 * for: aget, aget-boolean, aget-byte, aget-char, aget-short 1764 * 1765 */ 1766 /* op vAA, vBB, vCC */ 1767 movzbl 2(rPC), %eax # eax <- BB 1768 movzbl 3(rPC), %ecx # ecx <- CC 1769 GET_VREG %eax, %eax # eax <- vBB (array object) 1770 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1771 testl %eax, %eax # null array object? 1772 je common_errNullObject # bail if so 1773 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1774 jae common_errArrayIndex # index >= length, bail. 1775 movl MIRROR_INT_ARRAY_DATA_OFFSET(%eax,%ecx,4), %eax 1776 SET_VREG %eax, rINST 1777 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1778 1779/* ------------------------------ */ 1780 .balign 128 1781.L_op_aget_wide: /* 0x45 */ 1782/* File: x86/op_aget_wide.S */ 1783/* 1784 * Array get, 64 bits. vAA <- vBB[vCC]. 1785 */ 1786 /* aget-wide vAA, vBB, vCC */ 1787 movzbl 2(rPC), %eax # eax <- BB 1788 movzbl 3(rPC), %ecx # ecx <- CC 1789 GET_VREG %eax, %eax # eax <- vBB (array object) 1790 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1791 testl %eax, %eax # null array object? 1792 je common_errNullObject # bail if so 1793 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1794 jae common_errArrayIndex # index >= length, bail. 1795 leal MIRROR_WIDE_ARRAY_DATA_OFFSET(%eax,%ecx,8), %eax 1796 movq (%eax), %xmm0 # xmm0 <- vBB[vCC] 1797 SET_WIDE_FP_VREG %xmm0, rINST # vAA <- xmm0 1798 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1799 1800/* ------------------------------ */ 1801 .balign 128 1802.L_op_aget_object: /* 0x46 */ 1803/* File: x86/op_aget_object.S */ 1804/* 1805 * Array object get. vAA <- vBB[vCC]. 1806 * 1807 * for: aget-object 1808 */ 1809 /* op vAA, vBB, vCC */ 1810 movzbl 2(rPC), %eax # eax <- BB 1811 movzbl 3(rPC), %ecx # ecx <- CC 1812 GET_VREG %eax, %eax # eax <- vBB (array object) 1813 GET_VREG %ecx, %ecx # ecs <- vCC (requested index) 1814 EXPORT_PC 1815 movl %eax, OUT_ARG0(%esp) 1816 movl %ecx, OUT_ARG1(%esp) 1817 call SYMBOL(artAGetObjectFromMterp) # (array, index) 1818 movl rSELF, %ecx 1819 RESTORE_IBASE_FROM_SELF %ecx 1820 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 1821 jnz MterpException 1822 SET_VREG_OBJECT %eax, rINST 1823 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1824 1825/* ------------------------------ */ 1826 .balign 128 1827.L_op_aget_boolean: /* 0x47 */ 1828/* File: x86/op_aget_boolean.S */ 1829/* File: x86/op_aget.S */ 1830/* 1831 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1832 * 1833 * for: aget, aget-boolean, aget-byte, aget-char, aget-short 1834 * 1835 */ 1836 /* op vAA, vBB, vCC */ 1837 movzbl 2(rPC), %eax # eax <- BB 1838 movzbl 3(rPC), %ecx # ecx <- CC 1839 GET_VREG %eax, %eax # eax <- vBB (array object) 1840 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1841 testl %eax, %eax # null array object? 1842 je common_errNullObject # bail if so 1843 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1844 jae common_errArrayIndex # index >= length, bail. 1845 movzbl MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%eax,%ecx,1), %eax 1846 SET_VREG %eax, rINST 1847 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1848 1849 1850/* ------------------------------ */ 1851 .balign 128 1852.L_op_aget_byte: /* 0x48 */ 1853/* File: x86/op_aget_byte.S */ 1854/* File: x86/op_aget.S */ 1855/* 1856 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1857 * 1858 * for: aget, aget-boolean, aget-byte, aget-char, aget-short 1859 * 1860 */ 1861 /* op vAA, vBB, vCC */ 1862 movzbl 2(rPC), %eax # eax <- BB 1863 movzbl 3(rPC), %ecx # ecx <- CC 1864 GET_VREG %eax, %eax # eax <- vBB (array object) 1865 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1866 testl %eax, %eax # null array object? 1867 je common_errNullObject # bail if so 1868 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1869 jae common_errArrayIndex # index >= length, bail. 1870 movsbl MIRROR_BYTE_ARRAY_DATA_OFFSET(%eax,%ecx,1), %eax 1871 SET_VREG %eax, rINST 1872 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1873 1874 1875/* ------------------------------ */ 1876 .balign 128 1877.L_op_aget_char: /* 0x49 */ 1878/* File: x86/op_aget_char.S */ 1879/* File: x86/op_aget.S */ 1880/* 1881 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1882 * 1883 * for: aget, aget-boolean, aget-byte, aget-char, aget-short 1884 * 1885 */ 1886 /* op vAA, vBB, vCC */ 1887 movzbl 2(rPC), %eax # eax <- BB 1888 movzbl 3(rPC), %ecx # ecx <- CC 1889 GET_VREG %eax, %eax # eax <- vBB (array object) 1890 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1891 testl %eax, %eax # null array object? 1892 je common_errNullObject # bail if so 1893 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1894 jae common_errArrayIndex # index >= length, bail. 1895 movzwl MIRROR_CHAR_ARRAY_DATA_OFFSET(%eax,%ecx,2), %eax 1896 SET_VREG %eax, rINST 1897 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1898 1899 1900/* ------------------------------ */ 1901 .balign 128 1902.L_op_aget_short: /* 0x4a */ 1903/* File: x86/op_aget_short.S */ 1904/* File: x86/op_aget.S */ 1905/* 1906 * Array get, 32 bits or less. vAA <- vBB[vCC]. 1907 * 1908 * for: aget, aget-boolean, aget-byte, aget-char, aget-short 1909 * 1910 */ 1911 /* op vAA, vBB, vCC */ 1912 movzbl 2(rPC), %eax # eax <- BB 1913 movzbl 3(rPC), %ecx # ecx <- CC 1914 GET_VREG %eax, %eax # eax <- vBB (array object) 1915 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1916 testl %eax, %eax # null array object? 1917 je common_errNullObject # bail if so 1918 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1919 jae common_errArrayIndex # index >= length, bail. 1920 movswl MIRROR_SHORT_ARRAY_DATA_OFFSET(%eax,%ecx,2), %eax 1921 SET_VREG %eax, rINST 1922 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1923 1924 1925/* ------------------------------ */ 1926 .balign 128 1927.L_op_aput: /* 0x4b */ 1928/* File: x86/op_aput.S */ 1929/* 1930 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1931 * 1932 * for: aput, aput-boolean, aput-byte, aput-char, aput-short 1933 * 1934 */ 1935 /* op vAA, vBB, vCC */ 1936 movzbl 2(rPC), %eax # eax <- BB 1937 movzbl 3(rPC), %ecx # ecx <- CC 1938 GET_VREG %eax, %eax # eax <- vBB (array object) 1939 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1940 testl %eax, %eax # null array object? 1941 je common_errNullObject # bail if so 1942 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1943 jae common_errArrayIndex # index >= length, bail. 1944 leal MIRROR_INT_ARRAY_DATA_OFFSET(%eax,%ecx,4), %eax 1945 GET_VREG rINST, rINST 1946 movl rINST, (%eax) 1947 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1948 1949/* ------------------------------ */ 1950 .balign 128 1951.L_op_aput_wide: /* 0x4c */ 1952/* File: x86/op_aput_wide.S */ 1953/* 1954 * Array put, 64 bits. vBB[vCC] <- vAA. 1955 * 1956 */ 1957 /* aput-wide vAA, vBB, vCC */ 1958 movzbl 2(rPC), %eax # eax <- BB 1959 movzbl 3(rPC), %ecx # ecx <- CC 1960 GET_VREG %eax, %eax # eax <- vBB (array object) 1961 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 1962 testl %eax, %eax # null array object? 1963 je common_errNullObject # bail if so 1964 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 1965 jae common_errArrayIndex # index >= length, bail. 1966 leal MIRROR_WIDE_ARRAY_DATA_OFFSET(%eax,%ecx,8), %eax 1967 GET_WIDE_FP_VREG %xmm0, rINST # xmm0 <- vAA 1968 movq %xmm0, (%eax) # vBB[vCC] <- xmm0 1969 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1970 1971/* ------------------------------ */ 1972 .balign 128 1973.L_op_aput_object: /* 0x4d */ 1974/* File: x86/op_aput_object.S */ 1975/* 1976 * Store an object into an array. vBB[vCC] <- vAA. 1977 */ 1978 /* op vAA, vBB, vCC */ 1979 EXPORT_PC 1980 leal OFF_FP_SHADOWFRAME(rFP), %eax 1981 movl %eax, OUT_ARG0(%esp) 1982 movl rPC, OUT_ARG1(%esp) 1983 REFRESH_INST 77 1984 movl rINST, OUT_ARG2(%esp) 1985 call SYMBOL(MterpAputObject) # (array, index) 1986 RESTORE_IBASE 1987 testb %al, %al 1988 jz MterpPossibleException 1989 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 1990 1991/* ------------------------------ */ 1992 .balign 128 1993.L_op_aput_boolean: /* 0x4e */ 1994/* File: x86/op_aput_boolean.S */ 1995/* File: x86/op_aput.S */ 1996/* 1997 * Array put, 32 bits or less. vBB[vCC] <- vAA. 1998 * 1999 * for: aput, aput-boolean, aput-byte, aput-char, aput-short 2000 * 2001 */ 2002 /* op vAA, vBB, vCC */ 2003 movzbl 2(rPC), %eax # eax <- BB 2004 movzbl 3(rPC), %ecx # ecx <- CC 2005 GET_VREG %eax, %eax # eax <- vBB (array object) 2006 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 2007 testl %eax, %eax # null array object? 2008 je common_errNullObject # bail if so 2009 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2010 jae common_errArrayIndex # index >= length, bail. 2011 leal MIRROR_BOOLEAN_ARRAY_DATA_OFFSET(%eax,%ecx,1), %eax 2012 GET_VREG rINST, rINST 2013 movb rINSTbl, (%eax) 2014 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2015 2016 2017/* ------------------------------ */ 2018 .balign 128 2019.L_op_aput_byte: /* 0x4f */ 2020/* File: x86/op_aput_byte.S */ 2021/* File: x86/op_aput.S */ 2022/* 2023 * Array put, 32 bits or less. vBB[vCC] <- vAA. 2024 * 2025 * for: aput, aput-boolean, aput-byte, aput-char, aput-short 2026 * 2027 */ 2028 /* op vAA, vBB, vCC */ 2029 movzbl 2(rPC), %eax # eax <- BB 2030 movzbl 3(rPC), %ecx # ecx <- CC 2031 GET_VREG %eax, %eax # eax <- vBB (array object) 2032 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 2033 testl %eax, %eax # null array object? 2034 je common_errNullObject # bail if so 2035 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2036 jae common_errArrayIndex # index >= length, bail. 2037 leal MIRROR_BYTE_ARRAY_DATA_OFFSET(%eax,%ecx,1), %eax 2038 GET_VREG rINST, rINST 2039 movb rINSTbl, (%eax) 2040 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2041 2042 2043/* ------------------------------ */ 2044 .balign 128 2045.L_op_aput_char: /* 0x50 */ 2046/* File: x86/op_aput_char.S */ 2047/* File: x86/op_aput.S */ 2048/* 2049 * Array put, 32 bits or less. vBB[vCC] <- vAA. 2050 * 2051 * for: aput, aput-boolean, aput-byte, aput-char, aput-short 2052 * 2053 */ 2054 /* op vAA, vBB, vCC */ 2055 movzbl 2(rPC), %eax # eax <- BB 2056 movzbl 3(rPC), %ecx # ecx <- CC 2057 GET_VREG %eax, %eax # eax <- vBB (array object) 2058 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 2059 testl %eax, %eax # null array object? 2060 je common_errNullObject # bail if so 2061 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2062 jae common_errArrayIndex # index >= length, bail. 2063 leal MIRROR_CHAR_ARRAY_DATA_OFFSET(%eax,%ecx,2), %eax 2064 GET_VREG rINST, rINST 2065 movw rINSTw, (%eax) 2066 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2067 2068 2069/* ------------------------------ */ 2070 .balign 128 2071.L_op_aput_short: /* 0x51 */ 2072/* File: x86/op_aput_short.S */ 2073/* File: x86/op_aput.S */ 2074/* 2075 * Array put, 32 bits or less. vBB[vCC] <- vAA. 2076 * 2077 * for: aput, aput-boolean, aput-byte, aput-char, aput-short 2078 * 2079 */ 2080 /* op vAA, vBB, vCC */ 2081 movzbl 2(rPC), %eax # eax <- BB 2082 movzbl 3(rPC), %ecx # ecx <- CC 2083 GET_VREG %eax, %eax # eax <- vBB (array object) 2084 GET_VREG %ecx, %ecx # ecx <- vCC (requested index) 2085 testl %eax, %eax # null array object? 2086 je common_errNullObject # bail if so 2087 cmpl MIRROR_ARRAY_LENGTH_OFFSET(%eax), %ecx 2088 jae common_errArrayIndex # index >= length, bail. 2089 leal MIRROR_SHORT_ARRAY_DATA_OFFSET(%eax,%ecx,2), %eax 2090 GET_VREG rINST, rINST 2091 movw rINSTw, (%eax) 2092 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2093 2094 2095/* ------------------------------ */ 2096 .balign 128 2097.L_op_iget: /* 0x52 */ 2098/* File: x86/op_iget.S */ 2099/* 2100 * General instance field get. 2101 * 2102 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2103 */ 2104 EXPORT_PC 2105 movzwl 2(rPC), %eax # eax <- 0000CCCC 2106 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2107 movzbl rINSTbl, %ecx # ecx <- BA 2108 sarl $4, %ecx # ecx <- B 2109 GET_VREG %ecx, %ecx 2110 movl %ecx, OUT_ARG1(%esp) # the object pointer 2111 movl OFF_FP_METHOD(rFP), %eax 2112 movl %eax, OUT_ARG2(%esp) # referrer 2113 mov rSELF, %ecx 2114 movl %ecx, OUT_ARG3(%esp) # self 2115 call SYMBOL(artGet32InstanceFromCode) 2116 movl rSELF, %ecx 2117 RESTORE_IBASE_FROM_SELF %ecx 2118 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2119 jnz MterpException # bail out 2120 andb $0xf, rINSTbl # rINST <- A 2121 .if 0 2122 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2123 .else 2124 SET_VREG %eax, rINST # fp[A] <-value 2125 .endif 2126 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2127 2128/* ------------------------------ */ 2129 .balign 128 2130.L_op_iget_wide: /* 0x53 */ 2131/* File: x86/op_iget_wide.S */ 2132/* 2133 * 64-bit instance field get. 2134 * 2135 * for: iget-wide 2136 */ 2137 EXPORT_PC 2138 movzwl 2(rPC), %eax # eax <- 0000CCCC 2139 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2140 movzbl rINSTbl, %ecx # ecx <- BA 2141 sarl $4, %ecx # ecx <- B 2142 GET_VREG %ecx, %ecx 2143 movl %ecx, OUT_ARG1(%esp) # the object pointer 2144 movl OFF_FP_METHOD(rFP), %eax 2145 movl %eax, OUT_ARG2(%esp) # referrer 2146 mov rSELF, %ecx 2147 movl %ecx, OUT_ARG3(%esp) # self 2148 call SYMBOL(artGet64InstanceFromCode) 2149 mov rSELF, %ecx 2150 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2151 jnz MterpException # bail out 2152 andb $0xf, rINSTbl # rINST <- A 2153 SET_VREG %eax, rINST 2154 SET_VREG_HIGH %edx, rINST 2155 RESTORE_IBASE_FROM_SELF %ecx 2156 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2157 2158/* ------------------------------ */ 2159 .balign 128 2160.L_op_iget_object: /* 0x54 */ 2161/* File: x86/op_iget_object.S */ 2162/* File: x86/op_iget.S */ 2163/* 2164 * General instance field get. 2165 * 2166 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2167 */ 2168 EXPORT_PC 2169 movzwl 2(rPC), %eax # eax <- 0000CCCC 2170 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2171 movzbl rINSTbl, %ecx # ecx <- BA 2172 sarl $4, %ecx # ecx <- B 2173 GET_VREG %ecx, %ecx 2174 movl %ecx, OUT_ARG1(%esp) # the object pointer 2175 movl OFF_FP_METHOD(rFP), %eax 2176 movl %eax, OUT_ARG2(%esp) # referrer 2177 mov rSELF, %ecx 2178 movl %ecx, OUT_ARG3(%esp) # self 2179 call SYMBOL(artGetObjInstanceFromCode) 2180 movl rSELF, %ecx 2181 RESTORE_IBASE_FROM_SELF %ecx 2182 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2183 jnz MterpException # bail out 2184 andb $0xf, rINSTbl # rINST <- A 2185 .if 1 2186 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2187 .else 2188 SET_VREG %eax, rINST # fp[A] <-value 2189 .endif 2190 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2191 2192 2193/* ------------------------------ */ 2194 .balign 128 2195.L_op_iget_boolean: /* 0x55 */ 2196/* File: x86/op_iget_boolean.S */ 2197/* File: x86/op_iget.S */ 2198/* 2199 * General instance field get. 2200 * 2201 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2202 */ 2203 EXPORT_PC 2204 movzwl 2(rPC), %eax # eax <- 0000CCCC 2205 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2206 movzbl rINSTbl, %ecx # ecx <- BA 2207 sarl $4, %ecx # ecx <- B 2208 GET_VREG %ecx, %ecx 2209 movl %ecx, OUT_ARG1(%esp) # the object pointer 2210 movl OFF_FP_METHOD(rFP), %eax 2211 movl %eax, OUT_ARG2(%esp) # referrer 2212 mov rSELF, %ecx 2213 movl %ecx, OUT_ARG3(%esp) # self 2214 call SYMBOL(artGetBooleanInstanceFromCode) 2215 movl rSELF, %ecx 2216 RESTORE_IBASE_FROM_SELF %ecx 2217 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2218 jnz MterpException # bail out 2219 andb $0xf, rINSTbl # rINST <- A 2220 .if 0 2221 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2222 .else 2223 SET_VREG %eax, rINST # fp[A] <-value 2224 .endif 2225 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2226 2227 2228/* ------------------------------ */ 2229 .balign 128 2230.L_op_iget_byte: /* 0x56 */ 2231/* File: x86/op_iget_byte.S */ 2232/* File: x86/op_iget.S */ 2233/* 2234 * General instance field get. 2235 * 2236 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2237 */ 2238 EXPORT_PC 2239 movzwl 2(rPC), %eax # eax <- 0000CCCC 2240 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2241 movzbl rINSTbl, %ecx # ecx <- BA 2242 sarl $4, %ecx # ecx <- B 2243 GET_VREG %ecx, %ecx 2244 movl %ecx, OUT_ARG1(%esp) # the object pointer 2245 movl OFF_FP_METHOD(rFP), %eax 2246 movl %eax, OUT_ARG2(%esp) # referrer 2247 mov rSELF, %ecx 2248 movl %ecx, OUT_ARG3(%esp) # self 2249 call SYMBOL(artGetByteInstanceFromCode) 2250 movl rSELF, %ecx 2251 RESTORE_IBASE_FROM_SELF %ecx 2252 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2253 jnz MterpException # bail out 2254 andb $0xf, rINSTbl # rINST <- A 2255 .if 0 2256 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2257 .else 2258 SET_VREG %eax, rINST # fp[A] <-value 2259 .endif 2260 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2261 2262 2263/* ------------------------------ */ 2264 .balign 128 2265.L_op_iget_char: /* 0x57 */ 2266/* File: x86/op_iget_char.S */ 2267/* File: x86/op_iget.S */ 2268/* 2269 * General instance field get. 2270 * 2271 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2272 */ 2273 EXPORT_PC 2274 movzwl 2(rPC), %eax # eax <- 0000CCCC 2275 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2276 movzbl rINSTbl, %ecx # ecx <- BA 2277 sarl $4, %ecx # ecx <- B 2278 GET_VREG %ecx, %ecx 2279 movl %ecx, OUT_ARG1(%esp) # the object pointer 2280 movl OFF_FP_METHOD(rFP), %eax 2281 movl %eax, OUT_ARG2(%esp) # referrer 2282 mov rSELF, %ecx 2283 movl %ecx, OUT_ARG3(%esp) # self 2284 call SYMBOL(artGetCharInstanceFromCode) 2285 movl rSELF, %ecx 2286 RESTORE_IBASE_FROM_SELF %ecx 2287 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2288 jnz MterpException # bail out 2289 andb $0xf, rINSTbl # rINST <- A 2290 .if 0 2291 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2292 .else 2293 SET_VREG %eax, rINST # fp[A] <-value 2294 .endif 2295 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2296 2297 2298/* ------------------------------ */ 2299 .balign 128 2300.L_op_iget_short: /* 0x58 */ 2301/* File: x86/op_iget_short.S */ 2302/* File: x86/op_iget.S */ 2303/* 2304 * General instance field get. 2305 * 2306 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short 2307 */ 2308 EXPORT_PC 2309 movzwl 2(rPC), %eax # eax <- 0000CCCC 2310 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2311 movzbl rINSTbl, %ecx # ecx <- BA 2312 sarl $4, %ecx # ecx <- B 2313 GET_VREG %ecx, %ecx 2314 movl %ecx, OUT_ARG1(%esp) # the object pointer 2315 movl OFF_FP_METHOD(rFP), %eax 2316 movl %eax, OUT_ARG2(%esp) # referrer 2317 mov rSELF, %ecx 2318 movl %ecx, OUT_ARG3(%esp) # self 2319 call SYMBOL(artGetShortInstanceFromCode) 2320 movl rSELF, %ecx 2321 RESTORE_IBASE_FROM_SELF %ecx 2322 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2323 jnz MterpException # bail out 2324 andb $0xf, rINSTbl # rINST <- A 2325 .if 0 2326 SET_VREG_OBJECT %eax, rINST # fp[A] <-value 2327 .else 2328 SET_VREG %eax, rINST # fp[A] <-value 2329 .endif 2330 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2331 2332 2333/* ------------------------------ */ 2334 .balign 128 2335.L_op_iput: /* 0x59 */ 2336/* File: x86/op_iput.S */ 2337/* 2338 * General 32-bit instance field put. 2339 * 2340 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2341 */ 2342 /* op vA, vB, field@CCCC */ 2343 .extern artSet32InstanceFromMterp 2344 EXPORT_PC 2345 movzwl 2(rPC), %eax # eax<- 0000CCCC 2346 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2347 movzbl rINSTbl, %ecx # ecx<- BA 2348 sarl $4, %ecx # ecx<- B 2349 GET_VREG %ecx, %ecx 2350 movl %ecx, OUT_ARG1(%esp) # the object pointer 2351 andb $0xf, rINSTbl # rINST<- A 2352 GET_VREG %eax, rINST 2353 movl %eax, OUT_ARG2(%esp) # fp[A] 2354 movl OFF_FP_METHOD(rFP), %eax 2355 movl %eax, OUT_ARG3(%esp) # referrer 2356 call SYMBOL(artSet32InstanceFromMterp) 2357 testb %al, %al 2358 jnz MterpPossibleException 2359 RESTORE_IBASE 2360 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2361 2362/* ------------------------------ */ 2363 .balign 128 2364.L_op_iput_wide: /* 0x5a */ 2365/* File: x86/op_iput_wide.S */ 2366 /* iput-wide vA, vB, field@CCCC */ 2367 .extern artSet64InstanceFromMterp 2368 EXPORT_PC 2369 movzwl 2(rPC), %eax # eax <- 0000CCCC 2370 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2371 movzbl rINSTbl,%ecx # ecx <- BA 2372 sarl $4,%ecx # ecx <- B 2373 GET_VREG %ecx, %ecx 2374 movl %ecx, OUT_ARG1(%esp) # the object pointer 2375 andb $0xf,rINSTbl # rINST <- A 2376 leal VREG_ADDRESS(rINST), %eax 2377 movl %eax, OUT_ARG2(%esp) # &fp[A] 2378 movl OFF_FP_METHOD(rFP), %eax 2379 movl %eax, OUT_ARG3(%esp) # referrer 2380 call SYMBOL(artSet64InstanceFromMterp) 2381 testb %al, %al 2382 jnz MterpPossibleException 2383 RESTORE_IBASE 2384 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2385 2386/* ------------------------------ */ 2387 .balign 128 2388.L_op_iput_object: /* 0x5b */ 2389/* File: x86/op_iput_object.S */ 2390 EXPORT_PC 2391 leal OFF_FP_SHADOWFRAME(rFP), %eax 2392 movl %eax, OUT_ARG0(%esp) 2393 movl rPC, OUT_ARG1(%esp) 2394 REFRESH_INST 91 2395 movl rINST, OUT_ARG2(%esp) 2396 movl rSELF, %eax 2397 movl %eax, OUT_ARG3(%esp) 2398 call SYMBOL(MterpIputObject) 2399 testb %al, %al 2400 jz MterpException 2401 RESTORE_IBASE 2402 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2403 2404/* ------------------------------ */ 2405 .balign 128 2406.L_op_iput_boolean: /* 0x5c */ 2407/* File: x86/op_iput_boolean.S */ 2408/* File: x86/op_iput.S */ 2409/* 2410 * General 32-bit instance field put. 2411 * 2412 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2413 */ 2414 /* op vA, vB, field@CCCC */ 2415 .extern artSet8InstanceFromMterp 2416 EXPORT_PC 2417 movzwl 2(rPC), %eax # eax<- 0000CCCC 2418 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2419 movzbl rINSTbl, %ecx # ecx<- BA 2420 sarl $4, %ecx # ecx<- B 2421 GET_VREG %ecx, %ecx 2422 movl %ecx, OUT_ARG1(%esp) # the object pointer 2423 andb $0xf, rINSTbl # rINST<- A 2424 GET_VREG %eax, rINST 2425 movl %eax, OUT_ARG2(%esp) # fp[A] 2426 movl OFF_FP_METHOD(rFP), %eax 2427 movl %eax, OUT_ARG3(%esp) # referrer 2428 call SYMBOL(artSet8InstanceFromMterp) 2429 testb %al, %al 2430 jnz MterpPossibleException 2431 RESTORE_IBASE 2432 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2433 2434 2435/* ------------------------------ */ 2436 .balign 128 2437.L_op_iput_byte: /* 0x5d */ 2438/* File: x86/op_iput_byte.S */ 2439/* File: x86/op_iput.S */ 2440/* 2441 * General 32-bit instance field put. 2442 * 2443 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2444 */ 2445 /* op vA, vB, field@CCCC */ 2446 .extern artSet8InstanceFromMterp 2447 EXPORT_PC 2448 movzwl 2(rPC), %eax # eax<- 0000CCCC 2449 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2450 movzbl rINSTbl, %ecx # ecx<- BA 2451 sarl $4, %ecx # ecx<- B 2452 GET_VREG %ecx, %ecx 2453 movl %ecx, OUT_ARG1(%esp) # the object pointer 2454 andb $0xf, rINSTbl # rINST<- A 2455 GET_VREG %eax, rINST 2456 movl %eax, OUT_ARG2(%esp) # fp[A] 2457 movl OFF_FP_METHOD(rFP), %eax 2458 movl %eax, OUT_ARG3(%esp) # referrer 2459 call SYMBOL(artSet8InstanceFromMterp) 2460 testb %al, %al 2461 jnz MterpPossibleException 2462 RESTORE_IBASE 2463 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2464 2465 2466/* ------------------------------ */ 2467 .balign 128 2468.L_op_iput_char: /* 0x5e */ 2469/* File: x86/op_iput_char.S */ 2470/* File: x86/op_iput.S */ 2471/* 2472 * General 32-bit instance field put. 2473 * 2474 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2475 */ 2476 /* op vA, vB, field@CCCC */ 2477 .extern artSet16InstanceFromMterp 2478 EXPORT_PC 2479 movzwl 2(rPC), %eax # eax<- 0000CCCC 2480 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2481 movzbl rINSTbl, %ecx # ecx<- BA 2482 sarl $4, %ecx # ecx<- B 2483 GET_VREG %ecx, %ecx 2484 movl %ecx, OUT_ARG1(%esp) # the object pointer 2485 andb $0xf, rINSTbl # rINST<- A 2486 GET_VREG %eax, rINST 2487 movl %eax, OUT_ARG2(%esp) # fp[A] 2488 movl OFF_FP_METHOD(rFP), %eax 2489 movl %eax, OUT_ARG3(%esp) # referrer 2490 call SYMBOL(artSet16InstanceFromMterp) 2491 testb %al, %al 2492 jnz MterpPossibleException 2493 RESTORE_IBASE 2494 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2495 2496 2497/* ------------------------------ */ 2498 .balign 128 2499.L_op_iput_short: /* 0x5f */ 2500/* File: x86/op_iput_short.S */ 2501/* File: x86/op_iput.S */ 2502/* 2503 * General 32-bit instance field put. 2504 * 2505 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short 2506 */ 2507 /* op vA, vB, field@CCCC */ 2508 .extern artSet16InstanceFromMterp 2509 EXPORT_PC 2510 movzwl 2(rPC), %eax # eax<- 0000CCCC 2511 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2512 movzbl rINSTbl, %ecx # ecx<- BA 2513 sarl $4, %ecx # ecx<- B 2514 GET_VREG %ecx, %ecx 2515 movl %ecx, OUT_ARG1(%esp) # the object pointer 2516 andb $0xf, rINSTbl # rINST<- A 2517 GET_VREG %eax, rINST 2518 movl %eax, OUT_ARG2(%esp) # fp[A] 2519 movl OFF_FP_METHOD(rFP), %eax 2520 movl %eax, OUT_ARG3(%esp) # referrer 2521 call SYMBOL(artSet16InstanceFromMterp) 2522 testb %al, %al 2523 jnz MterpPossibleException 2524 RESTORE_IBASE 2525 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2526 2527 2528/* ------------------------------ */ 2529 .balign 128 2530.L_op_sget: /* 0x60 */ 2531/* File: x86/op_sget.S */ 2532/* 2533 * General SGET handler wrapper. 2534 * 2535 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2536 */ 2537 /* op vAA, field@BBBB */ 2538 .extern artGet32StaticFromCode 2539 EXPORT_PC 2540 movzwl 2(rPC), %eax 2541 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2542 movl OFF_FP_METHOD(rFP), %eax 2543 movl %eax, OUT_ARG1(%esp) # referrer 2544 movl rSELF, %ecx 2545 movl %ecx, OUT_ARG2(%esp) # self 2546 call SYMBOL(artGet32StaticFromCode) 2547 movl rSELF, %ecx 2548 RESTORE_IBASE_FROM_SELF %ecx 2549 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2550 jnz MterpException 2551 .if 0 2552 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2553 .else 2554 SET_VREG %eax, rINST # fp[A] <- value 2555 .endif 2556 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2557 2558/* ------------------------------ */ 2559 .balign 128 2560.L_op_sget_wide: /* 0x61 */ 2561/* File: x86/op_sget_wide.S */ 2562/* 2563 * SGET_WIDE handler wrapper. 2564 * 2565 */ 2566 /* sget-wide vAA, field@BBBB */ 2567 .extern artGet64StaticFromCode 2568 EXPORT_PC 2569 movzwl 2(rPC), %eax 2570 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2571 movl OFF_FP_METHOD(rFP), %eax 2572 movl %eax, OUT_ARG1(%esp) # referrer 2573 movl rSELF, %ecx 2574 movl %ecx, OUT_ARG2(%esp) # self 2575 call SYMBOL(artGet64StaticFromCode) 2576 movl rSELF, %ecx 2577 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2578 jnz MterpException 2579 SET_VREG %eax, rINST # fp[A]<- low part 2580 SET_VREG_HIGH %edx, rINST # fp[A+1]<- high part 2581 RESTORE_IBASE_FROM_SELF %ecx 2582 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2583 2584/* ------------------------------ */ 2585 .balign 128 2586.L_op_sget_object: /* 0x62 */ 2587/* File: x86/op_sget_object.S */ 2588/* File: x86/op_sget.S */ 2589/* 2590 * General SGET handler wrapper. 2591 * 2592 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2593 */ 2594 /* op vAA, field@BBBB */ 2595 .extern artGetObjStaticFromCode 2596 EXPORT_PC 2597 movzwl 2(rPC), %eax 2598 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2599 movl OFF_FP_METHOD(rFP), %eax 2600 movl %eax, OUT_ARG1(%esp) # referrer 2601 movl rSELF, %ecx 2602 movl %ecx, OUT_ARG2(%esp) # self 2603 call SYMBOL(artGetObjStaticFromCode) 2604 movl rSELF, %ecx 2605 RESTORE_IBASE_FROM_SELF %ecx 2606 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2607 jnz MterpException 2608 .if 1 2609 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2610 .else 2611 SET_VREG %eax, rINST # fp[A] <- value 2612 .endif 2613 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2614 2615 2616/* ------------------------------ */ 2617 .balign 128 2618.L_op_sget_boolean: /* 0x63 */ 2619/* File: x86/op_sget_boolean.S */ 2620/* File: x86/op_sget.S */ 2621/* 2622 * General SGET handler wrapper. 2623 * 2624 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2625 */ 2626 /* op vAA, field@BBBB */ 2627 .extern artGetBooleanStaticFromCode 2628 EXPORT_PC 2629 movzwl 2(rPC), %eax 2630 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2631 movl OFF_FP_METHOD(rFP), %eax 2632 movl %eax, OUT_ARG1(%esp) # referrer 2633 movl rSELF, %ecx 2634 movl %ecx, OUT_ARG2(%esp) # self 2635 call SYMBOL(artGetBooleanStaticFromCode) 2636 movl rSELF, %ecx 2637 RESTORE_IBASE_FROM_SELF %ecx 2638 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2639 jnz MterpException 2640 .if 0 2641 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2642 .else 2643 SET_VREG %eax, rINST # fp[A] <- value 2644 .endif 2645 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2646 2647 2648/* ------------------------------ */ 2649 .balign 128 2650.L_op_sget_byte: /* 0x64 */ 2651/* File: x86/op_sget_byte.S */ 2652/* File: x86/op_sget.S */ 2653/* 2654 * General SGET handler wrapper. 2655 * 2656 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2657 */ 2658 /* op vAA, field@BBBB */ 2659 .extern artGetByteStaticFromCode 2660 EXPORT_PC 2661 movzwl 2(rPC), %eax 2662 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2663 movl OFF_FP_METHOD(rFP), %eax 2664 movl %eax, OUT_ARG1(%esp) # referrer 2665 movl rSELF, %ecx 2666 movl %ecx, OUT_ARG2(%esp) # self 2667 call SYMBOL(artGetByteStaticFromCode) 2668 movl rSELF, %ecx 2669 RESTORE_IBASE_FROM_SELF %ecx 2670 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2671 jnz MterpException 2672 .if 0 2673 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2674 .else 2675 SET_VREG %eax, rINST # fp[A] <- value 2676 .endif 2677 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2678 2679 2680/* ------------------------------ */ 2681 .balign 128 2682.L_op_sget_char: /* 0x65 */ 2683/* File: x86/op_sget_char.S */ 2684/* File: x86/op_sget.S */ 2685/* 2686 * General SGET handler wrapper. 2687 * 2688 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2689 */ 2690 /* op vAA, field@BBBB */ 2691 .extern artGetCharStaticFromCode 2692 EXPORT_PC 2693 movzwl 2(rPC), %eax 2694 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2695 movl OFF_FP_METHOD(rFP), %eax 2696 movl %eax, OUT_ARG1(%esp) # referrer 2697 movl rSELF, %ecx 2698 movl %ecx, OUT_ARG2(%esp) # self 2699 call SYMBOL(artGetCharStaticFromCode) 2700 movl rSELF, %ecx 2701 RESTORE_IBASE_FROM_SELF %ecx 2702 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2703 jnz MterpException 2704 .if 0 2705 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2706 .else 2707 SET_VREG %eax, rINST # fp[A] <- value 2708 .endif 2709 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2710 2711 2712/* ------------------------------ */ 2713 .balign 128 2714.L_op_sget_short: /* 0x66 */ 2715/* File: x86/op_sget_short.S */ 2716/* File: x86/op_sget.S */ 2717/* 2718 * General SGET handler wrapper. 2719 * 2720 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short 2721 */ 2722 /* op vAA, field@BBBB */ 2723 .extern artGetShortStaticFromCode 2724 EXPORT_PC 2725 movzwl 2(rPC), %eax 2726 movl %eax, OUT_ARG0(%esp) # field ref CCCC 2727 movl OFF_FP_METHOD(rFP), %eax 2728 movl %eax, OUT_ARG1(%esp) # referrer 2729 movl rSELF, %ecx 2730 movl %ecx, OUT_ARG2(%esp) # self 2731 call SYMBOL(artGetShortStaticFromCode) 2732 movl rSELF, %ecx 2733 RESTORE_IBASE_FROM_SELF %ecx 2734 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 2735 jnz MterpException 2736 .if 0 2737 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 2738 .else 2739 SET_VREG %eax, rINST # fp[A] <- value 2740 .endif 2741 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2742 2743 2744/* ------------------------------ */ 2745 .balign 128 2746.L_op_sput: /* 0x67 */ 2747/* File: x86/op_sput.S */ 2748/* 2749 * General SPUT handler wrapper. 2750 * 2751 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2752 */ 2753 /* op vAA, field@BBBB */ 2754 .extern artSet32StaticFromCode 2755 EXPORT_PC 2756 movzwl 2(rPC), %eax 2757 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2758 GET_VREG rINST, rINST 2759 movl rINST, OUT_ARG1(%esp) # fp[AA] 2760 movl OFF_FP_METHOD(rFP), %eax 2761 movl %eax, OUT_ARG2(%esp) # referrer 2762 movl rSELF, %ecx 2763 movl %ecx, OUT_ARG3(%esp) # self 2764 call SYMBOL(artSet32StaticFromCode) 2765 testb %al, %al 2766 jnz MterpException 2767 RESTORE_IBASE 2768 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2769 2770/* ------------------------------ */ 2771 .balign 128 2772.L_op_sput_wide: /* 0x68 */ 2773/* File: x86/op_sput_wide.S */ 2774/* 2775 * SPUT_WIDE handler wrapper. 2776 * 2777 */ 2778 /* sput-wide vAA, field@BBBB */ 2779 .extern artSet64IndirectStaticFromMterp 2780 EXPORT_PC 2781 movzwl 2(rPC), %eax 2782 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2783 movl OFF_FP_METHOD(rFP), %eax 2784 movl %eax, OUT_ARG1(%esp) # referrer 2785 leal VREG_ADDRESS(rINST), %eax 2786 movl %eax, OUT_ARG2(%esp) # &fp[AA] 2787 movl rSELF, %ecx 2788 movl %ecx, OUT_ARG3(%esp) # self 2789 call SYMBOL(artSet64IndirectStaticFromMterp) 2790 testb %al, %al 2791 jnz MterpException 2792 RESTORE_IBASE 2793 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2794 2795/* ------------------------------ */ 2796 .balign 128 2797.L_op_sput_object: /* 0x69 */ 2798/* File: x86/op_sput_object.S */ 2799 EXPORT_PC 2800 leal OFF_FP_SHADOWFRAME(rFP), %eax 2801 movl %eax, OUT_ARG0(%esp) 2802 movl rPC, OUT_ARG1(%esp) 2803 REFRESH_INST 105 2804 movl rINST, OUT_ARG2(%esp) 2805 movl rSELF, %ecx 2806 movl %ecx, OUT_ARG3(%esp) 2807 call SYMBOL(MterpSputObject) 2808 testb %al, %al 2809 jz MterpException 2810 RESTORE_IBASE 2811 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2812 2813/* ------------------------------ */ 2814 .balign 128 2815.L_op_sput_boolean: /* 0x6a */ 2816/* File: x86/op_sput_boolean.S */ 2817/* File: x86/op_sput.S */ 2818/* 2819 * General SPUT handler wrapper. 2820 * 2821 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2822 */ 2823 /* op vAA, field@BBBB */ 2824 .extern artSet8StaticFromCode 2825 EXPORT_PC 2826 movzwl 2(rPC), %eax 2827 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2828 GET_VREG rINST, rINST 2829 movl rINST, OUT_ARG1(%esp) # fp[AA] 2830 movl OFF_FP_METHOD(rFP), %eax 2831 movl %eax, OUT_ARG2(%esp) # referrer 2832 movl rSELF, %ecx 2833 movl %ecx, OUT_ARG3(%esp) # self 2834 call SYMBOL(artSet8StaticFromCode) 2835 testb %al, %al 2836 jnz MterpException 2837 RESTORE_IBASE 2838 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2839 2840 2841/* ------------------------------ */ 2842 .balign 128 2843.L_op_sput_byte: /* 0x6b */ 2844/* File: x86/op_sput_byte.S */ 2845/* File: x86/op_sput.S */ 2846/* 2847 * General SPUT handler wrapper. 2848 * 2849 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2850 */ 2851 /* op vAA, field@BBBB */ 2852 .extern artSet8StaticFromCode 2853 EXPORT_PC 2854 movzwl 2(rPC), %eax 2855 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2856 GET_VREG rINST, rINST 2857 movl rINST, OUT_ARG1(%esp) # fp[AA] 2858 movl OFF_FP_METHOD(rFP), %eax 2859 movl %eax, OUT_ARG2(%esp) # referrer 2860 movl rSELF, %ecx 2861 movl %ecx, OUT_ARG3(%esp) # self 2862 call SYMBOL(artSet8StaticFromCode) 2863 testb %al, %al 2864 jnz MterpException 2865 RESTORE_IBASE 2866 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2867 2868 2869/* ------------------------------ */ 2870 .balign 128 2871.L_op_sput_char: /* 0x6c */ 2872/* File: x86/op_sput_char.S */ 2873/* File: x86/op_sput.S */ 2874/* 2875 * General SPUT handler wrapper. 2876 * 2877 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2878 */ 2879 /* op vAA, field@BBBB */ 2880 .extern artSet16StaticFromCode 2881 EXPORT_PC 2882 movzwl 2(rPC), %eax 2883 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2884 GET_VREG rINST, rINST 2885 movl rINST, OUT_ARG1(%esp) # fp[AA] 2886 movl OFF_FP_METHOD(rFP), %eax 2887 movl %eax, OUT_ARG2(%esp) # referrer 2888 movl rSELF, %ecx 2889 movl %ecx, OUT_ARG3(%esp) # self 2890 call SYMBOL(artSet16StaticFromCode) 2891 testb %al, %al 2892 jnz MterpException 2893 RESTORE_IBASE 2894 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2895 2896 2897/* ------------------------------ */ 2898 .balign 128 2899.L_op_sput_short: /* 0x6d */ 2900/* File: x86/op_sput_short.S */ 2901/* File: x86/op_sput.S */ 2902/* 2903 * General SPUT handler wrapper. 2904 * 2905 * for: sput, sput-boolean, sput-byte, sput-char, sput-short 2906 */ 2907 /* op vAA, field@BBBB */ 2908 .extern artSet16StaticFromCode 2909 EXPORT_PC 2910 movzwl 2(rPC), %eax 2911 movl %eax, OUT_ARG0(%esp) # field ref BBBB 2912 GET_VREG rINST, rINST 2913 movl rINST, OUT_ARG1(%esp) # fp[AA] 2914 movl OFF_FP_METHOD(rFP), %eax 2915 movl %eax, OUT_ARG2(%esp) # referrer 2916 movl rSELF, %ecx 2917 movl %ecx, OUT_ARG3(%esp) # self 2918 call SYMBOL(artSet16StaticFromCode) 2919 testb %al, %al 2920 jnz MterpException 2921 RESTORE_IBASE 2922 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 2923 2924 2925/* ------------------------------ */ 2926 .balign 128 2927.L_op_invoke_virtual: /* 0x6e */ 2928/* File: x86/op_invoke_virtual.S */ 2929/* File: x86/invoke.S */ 2930/* 2931 * Generic invoke handler wrapper. 2932 */ 2933 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2934 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2935 .extern MterpInvokeVirtual 2936 EXPORT_PC 2937 movl rSELF, %ecx 2938 movl %ecx, OUT_ARG0(%esp) 2939 leal OFF_FP_SHADOWFRAME(rFP), %eax 2940 movl %eax, OUT_ARG1(%esp) 2941 movl rPC, OUT_ARG2(%esp) 2942 REFRESH_INST 110 2943 movl rINST, OUT_ARG3(%esp) 2944 call SYMBOL(MterpInvokeVirtual) 2945 testb %al, %al 2946 jz MterpException 2947 ADVANCE_PC 3 2948 call SYMBOL(MterpShouldSwitchInterpreters) 2949 testb %al, %al 2950 jnz MterpFallback 2951 RESTORE_IBASE 2952 FETCH_INST 2953 GOTO_NEXT 2954 2955/* 2956 * Handle a virtual method call. 2957 * 2958 * for: invoke-virtual, invoke-virtual/range 2959 */ 2960 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2961 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2962 2963/* ------------------------------ */ 2964 .balign 128 2965.L_op_invoke_super: /* 0x6f */ 2966/* File: x86/op_invoke_super.S */ 2967/* File: x86/invoke.S */ 2968/* 2969 * Generic invoke handler wrapper. 2970 */ 2971 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2972 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 2973 .extern MterpInvokeSuper 2974 EXPORT_PC 2975 movl rSELF, %ecx 2976 movl %ecx, OUT_ARG0(%esp) 2977 leal OFF_FP_SHADOWFRAME(rFP), %eax 2978 movl %eax, OUT_ARG1(%esp) 2979 movl rPC, OUT_ARG2(%esp) 2980 REFRESH_INST 111 2981 movl rINST, OUT_ARG3(%esp) 2982 call SYMBOL(MterpInvokeSuper) 2983 testb %al, %al 2984 jz MterpException 2985 ADVANCE_PC 3 2986 call SYMBOL(MterpShouldSwitchInterpreters) 2987 testb %al, %al 2988 jnz MterpFallback 2989 RESTORE_IBASE 2990 FETCH_INST 2991 GOTO_NEXT 2992 2993/* 2994 * Handle a "super" method call. 2995 * 2996 * for: invoke-super, invoke-super/range 2997 */ 2998 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 2999 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3000 3001/* ------------------------------ */ 3002 .balign 128 3003.L_op_invoke_direct: /* 0x70 */ 3004/* File: x86/op_invoke_direct.S */ 3005/* File: x86/invoke.S */ 3006/* 3007 * Generic invoke handler wrapper. 3008 */ 3009 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3010 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3011 .extern MterpInvokeDirect 3012 EXPORT_PC 3013 movl rSELF, %ecx 3014 movl %ecx, OUT_ARG0(%esp) 3015 leal OFF_FP_SHADOWFRAME(rFP), %eax 3016 movl %eax, OUT_ARG1(%esp) 3017 movl rPC, OUT_ARG2(%esp) 3018 REFRESH_INST 112 3019 movl rINST, OUT_ARG3(%esp) 3020 call SYMBOL(MterpInvokeDirect) 3021 testb %al, %al 3022 jz MterpException 3023 ADVANCE_PC 3 3024 call SYMBOL(MterpShouldSwitchInterpreters) 3025 testb %al, %al 3026 jnz MterpFallback 3027 RESTORE_IBASE 3028 FETCH_INST 3029 GOTO_NEXT 3030 3031 3032/* ------------------------------ */ 3033 .balign 128 3034.L_op_invoke_static: /* 0x71 */ 3035/* File: x86/op_invoke_static.S */ 3036/* File: x86/invoke.S */ 3037/* 3038 * Generic invoke handler wrapper. 3039 */ 3040 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3041 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3042 .extern MterpInvokeStatic 3043 EXPORT_PC 3044 movl rSELF, %ecx 3045 movl %ecx, OUT_ARG0(%esp) 3046 leal OFF_FP_SHADOWFRAME(rFP), %eax 3047 movl %eax, OUT_ARG1(%esp) 3048 movl rPC, OUT_ARG2(%esp) 3049 REFRESH_INST 113 3050 movl rINST, OUT_ARG3(%esp) 3051 call SYMBOL(MterpInvokeStatic) 3052 testb %al, %al 3053 jz MterpException 3054 ADVANCE_PC 3 3055 call SYMBOL(MterpShouldSwitchInterpreters) 3056 testb %al, %al 3057 jnz MterpFallback 3058 RESTORE_IBASE 3059 FETCH_INST 3060 GOTO_NEXT 3061 3062 3063 3064/* ------------------------------ */ 3065 .balign 128 3066.L_op_invoke_interface: /* 0x72 */ 3067/* File: x86/op_invoke_interface.S */ 3068/* File: x86/invoke.S */ 3069/* 3070 * Generic invoke handler wrapper. 3071 */ 3072 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3073 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3074 .extern MterpInvokeInterface 3075 EXPORT_PC 3076 movl rSELF, %ecx 3077 movl %ecx, OUT_ARG0(%esp) 3078 leal OFF_FP_SHADOWFRAME(rFP), %eax 3079 movl %eax, OUT_ARG1(%esp) 3080 movl rPC, OUT_ARG2(%esp) 3081 REFRESH_INST 114 3082 movl rINST, OUT_ARG3(%esp) 3083 call SYMBOL(MterpInvokeInterface) 3084 testb %al, %al 3085 jz MterpException 3086 ADVANCE_PC 3 3087 call SYMBOL(MterpShouldSwitchInterpreters) 3088 testb %al, %al 3089 jnz MterpFallback 3090 RESTORE_IBASE 3091 FETCH_INST 3092 GOTO_NEXT 3093 3094/* 3095 * Handle an interface method call. 3096 * 3097 * for: invoke-interface, invoke-interface/range 3098 */ 3099 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3100 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3101 3102/* ------------------------------ */ 3103 .balign 128 3104.L_op_return_void_no_barrier: /* 0x73 */ 3105/* File: x86/op_return_void_no_barrier.S */ 3106 movl rSELF, %eax 3107 testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 3108 jz 1f 3109 movl %eax, OUT_ARG0(%esp) 3110 call SYMBOL(MterpSuspendCheck) 31111: 3112 xorl %eax, %eax 3113 xorl %ecx, %ecx 3114 jmp MterpReturn 3115 3116/* ------------------------------ */ 3117 .balign 128 3118.L_op_invoke_virtual_range: /* 0x74 */ 3119/* File: x86/op_invoke_virtual_range.S */ 3120/* File: x86/invoke.S */ 3121/* 3122 * Generic invoke handler wrapper. 3123 */ 3124 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3125 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3126 .extern MterpInvokeVirtualRange 3127 EXPORT_PC 3128 movl rSELF, %ecx 3129 movl %ecx, OUT_ARG0(%esp) 3130 leal OFF_FP_SHADOWFRAME(rFP), %eax 3131 movl %eax, OUT_ARG1(%esp) 3132 movl rPC, OUT_ARG2(%esp) 3133 REFRESH_INST 116 3134 movl rINST, OUT_ARG3(%esp) 3135 call SYMBOL(MterpInvokeVirtualRange) 3136 testb %al, %al 3137 jz MterpException 3138 ADVANCE_PC 3 3139 call SYMBOL(MterpShouldSwitchInterpreters) 3140 testb %al, %al 3141 jnz MterpFallback 3142 RESTORE_IBASE 3143 FETCH_INST 3144 GOTO_NEXT 3145 3146 3147/* ------------------------------ */ 3148 .balign 128 3149.L_op_invoke_super_range: /* 0x75 */ 3150/* File: x86/op_invoke_super_range.S */ 3151/* File: x86/invoke.S */ 3152/* 3153 * Generic invoke handler wrapper. 3154 */ 3155 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3156 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3157 .extern MterpInvokeSuperRange 3158 EXPORT_PC 3159 movl rSELF, %ecx 3160 movl %ecx, OUT_ARG0(%esp) 3161 leal OFF_FP_SHADOWFRAME(rFP), %eax 3162 movl %eax, OUT_ARG1(%esp) 3163 movl rPC, OUT_ARG2(%esp) 3164 REFRESH_INST 117 3165 movl rINST, OUT_ARG3(%esp) 3166 call SYMBOL(MterpInvokeSuperRange) 3167 testb %al, %al 3168 jz MterpException 3169 ADVANCE_PC 3 3170 call SYMBOL(MterpShouldSwitchInterpreters) 3171 testb %al, %al 3172 jnz MterpFallback 3173 RESTORE_IBASE 3174 FETCH_INST 3175 GOTO_NEXT 3176 3177 3178/* ------------------------------ */ 3179 .balign 128 3180.L_op_invoke_direct_range: /* 0x76 */ 3181/* File: x86/op_invoke_direct_range.S */ 3182/* File: x86/invoke.S */ 3183/* 3184 * Generic invoke handler wrapper. 3185 */ 3186 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3187 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3188 .extern MterpInvokeDirectRange 3189 EXPORT_PC 3190 movl rSELF, %ecx 3191 movl %ecx, OUT_ARG0(%esp) 3192 leal OFF_FP_SHADOWFRAME(rFP), %eax 3193 movl %eax, OUT_ARG1(%esp) 3194 movl rPC, OUT_ARG2(%esp) 3195 REFRESH_INST 118 3196 movl rINST, OUT_ARG3(%esp) 3197 call SYMBOL(MterpInvokeDirectRange) 3198 testb %al, %al 3199 jz MterpException 3200 ADVANCE_PC 3 3201 call SYMBOL(MterpShouldSwitchInterpreters) 3202 testb %al, %al 3203 jnz MterpFallback 3204 RESTORE_IBASE 3205 FETCH_INST 3206 GOTO_NEXT 3207 3208 3209/* ------------------------------ */ 3210 .balign 128 3211.L_op_invoke_static_range: /* 0x77 */ 3212/* File: x86/op_invoke_static_range.S */ 3213/* File: x86/invoke.S */ 3214/* 3215 * Generic invoke handler wrapper. 3216 */ 3217 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3218 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3219 .extern MterpInvokeStaticRange 3220 EXPORT_PC 3221 movl rSELF, %ecx 3222 movl %ecx, OUT_ARG0(%esp) 3223 leal OFF_FP_SHADOWFRAME(rFP), %eax 3224 movl %eax, OUT_ARG1(%esp) 3225 movl rPC, OUT_ARG2(%esp) 3226 REFRESH_INST 119 3227 movl rINST, OUT_ARG3(%esp) 3228 call SYMBOL(MterpInvokeStaticRange) 3229 testb %al, %al 3230 jz MterpException 3231 ADVANCE_PC 3 3232 call SYMBOL(MterpShouldSwitchInterpreters) 3233 testb %al, %al 3234 jnz MterpFallback 3235 RESTORE_IBASE 3236 FETCH_INST 3237 GOTO_NEXT 3238 3239 3240/* ------------------------------ */ 3241 .balign 128 3242.L_op_invoke_interface_range: /* 0x78 */ 3243/* File: x86/op_invoke_interface_range.S */ 3244/* File: x86/invoke.S */ 3245/* 3246 * Generic invoke handler wrapper. 3247 */ 3248 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 3249 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 3250 .extern MterpInvokeInterfaceRange 3251 EXPORT_PC 3252 movl rSELF, %ecx 3253 movl %ecx, OUT_ARG0(%esp) 3254 leal OFF_FP_SHADOWFRAME(rFP), %eax 3255 movl %eax, OUT_ARG1(%esp) 3256 movl rPC, OUT_ARG2(%esp) 3257 REFRESH_INST 120 3258 movl rINST, OUT_ARG3(%esp) 3259 call SYMBOL(MterpInvokeInterfaceRange) 3260 testb %al, %al 3261 jz MterpException 3262 ADVANCE_PC 3 3263 call SYMBOL(MterpShouldSwitchInterpreters) 3264 testb %al, %al 3265 jnz MterpFallback 3266 RESTORE_IBASE 3267 FETCH_INST 3268 GOTO_NEXT 3269 3270 3271/* ------------------------------ */ 3272 .balign 128 3273.L_op_unused_79: /* 0x79 */ 3274/* File: x86/op_unused_79.S */ 3275/* File: x86/unused.S */ 3276/* 3277 * Bail to reference interpreter to throw. 3278 */ 3279 jmp MterpFallback 3280 3281 3282/* ------------------------------ */ 3283 .balign 128 3284.L_op_unused_7a: /* 0x7a */ 3285/* File: x86/op_unused_7a.S */ 3286/* File: x86/unused.S */ 3287/* 3288 * Bail to reference interpreter to throw. 3289 */ 3290 jmp MterpFallback 3291 3292 3293/* ------------------------------ */ 3294 .balign 128 3295.L_op_neg_int: /* 0x7b */ 3296/* File: x86/op_neg_int.S */ 3297/* File: x86/unop.S */ 3298/* 3299 * Generic 32-bit unary operation. Provide an "instr" line that 3300 * specifies an instruction that performs "result = op eax". 3301 */ 3302 /* unop vA, vB */ 3303 movzbl rINSTbl,%ecx # ecx <- A+ 3304 sarl $4,rINST # rINST <- B 3305 GET_VREG %eax, rINST # eax <- vB 3306 andb $0xf,%cl # ecx <- A 3307 negl %eax 3308 SET_VREG %eax, %ecx 3309 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3310 3311 3312/* ------------------------------ */ 3313 .balign 128 3314.L_op_not_int: /* 0x7c */ 3315/* File: x86/op_not_int.S */ 3316/* File: x86/unop.S */ 3317/* 3318 * Generic 32-bit unary operation. Provide an "instr" line that 3319 * specifies an instruction that performs "result = op eax". 3320 */ 3321 /* unop vA, vB */ 3322 movzbl rINSTbl,%ecx # ecx <- A+ 3323 sarl $4,rINST # rINST <- B 3324 GET_VREG %eax, rINST # eax <- vB 3325 andb $0xf,%cl # ecx <- A 3326 notl %eax 3327 SET_VREG %eax, %ecx 3328 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3329 3330 3331/* ------------------------------ */ 3332 .balign 128 3333.L_op_neg_long: /* 0x7d */ 3334/* File: x86/op_neg_long.S */ 3335 /* unop vA, vB */ 3336 movzbl rINSTbl, %ecx # ecx <- BA 3337 sarl $4, %ecx # ecx <- B 3338 andb $0xf, rINSTbl # rINST <- A 3339 GET_VREG %eax, %ecx # eax <- v[B+0] 3340 GET_VREG_HIGH %ecx, %ecx # ecx <- v[B+1] 3341 negl %eax 3342 adcl $0, %ecx 3343 negl %ecx 3344 SET_VREG %eax, rINST # v[A+0] <- eax 3345 SET_VREG_HIGH %ecx, rINST # v[A+1] <- ecx 3346 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3347 3348 3349/* ------------------------------ */ 3350 .balign 128 3351.L_op_not_long: /* 0x7e */ 3352/* File: x86/op_not_long.S */ 3353 /* unop vA, vB */ 3354 movzbl rINSTbl, %ecx # ecx <- BA 3355 sarl $4, %ecx # ecx <- B 3356 andb $0xf, rINSTbl # rINST <- A 3357 GET_VREG %eax, %ecx # eax <- v[B+0] 3358 GET_VREG_HIGH %ecx, %ecx # ecx <- v[B+1] 3359 notl %eax 3360 notl %ecx 3361 SET_VREG %eax, rINST # v[A+0] <- eax 3362 SET_VREG_HIGH %ecx, rINST # v[A+1] <- ecx 3363 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3364 3365/* ------------------------------ */ 3366 .balign 128 3367.L_op_neg_float: /* 0x7f */ 3368/* File: x86/op_neg_float.S */ 3369/* File: x86/fpcvt.S */ 3370/* 3371 * Generic 32-bit FP conversion operation. 3372 */ 3373 /* unop vA, vB */ 3374 movzbl rINSTbl, %ecx # ecx <- A+ 3375 sarl $4, rINST # rINST <- B 3376 flds VREG_ADDRESS(rINST) # %st0 <- vB 3377 andb $0xf, %cl # ecx <- A 3378 fchs 3379 fstps VREG_ADDRESS(%ecx) # vA <- %st0 3380 .if 0 3381 CLEAR_WIDE_REF %ecx 3382 .else 3383 CLEAR_REF %ecx 3384 .endif 3385 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3386 3387 3388/* ------------------------------ */ 3389 .balign 128 3390.L_op_neg_double: /* 0x80 */ 3391/* File: x86/op_neg_double.S */ 3392/* File: x86/fpcvt.S */ 3393/* 3394 * Generic 32-bit FP conversion operation. 3395 */ 3396 /* unop vA, vB */ 3397 movzbl rINSTbl, %ecx # ecx <- A+ 3398 sarl $4, rINST # rINST <- B 3399 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3400 andb $0xf, %cl # ecx <- A 3401 fchs 3402 fstpl VREG_ADDRESS(%ecx) # vA <- %st0 3403 .if 1 3404 CLEAR_WIDE_REF %ecx 3405 .else 3406 CLEAR_REF %ecx 3407 .endif 3408 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3409 3410 3411/* ------------------------------ */ 3412 .balign 128 3413.L_op_int_to_long: /* 0x81 */ 3414/* File: x86/op_int_to_long.S */ 3415 /* int to long vA, vB */ 3416 movzbl rINSTbl, %eax # eax <- +A 3417 sarl $4, %eax # eax <- B 3418 GET_VREG %eax, %eax # eax <- vB 3419 andb $0xf, rINSTbl # rINST <- A 3420 movl rIBASE, %ecx # cltd trashes rIBASE/edx 3421 cltd # rINST:eax<- sssssssBBBBBBBB 3422 SET_VREG_HIGH rIBASE, rINST # v[A+1] <- rIBASE 3423 SET_VREG %eax, rINST # v[A+0] <- %eax 3424 movl %ecx, rIBASE 3425 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3426 3427 3428/* ------------------------------ */ 3429 .balign 128 3430.L_op_int_to_float: /* 0x82 */ 3431/* File: x86/op_int_to_float.S */ 3432/* File: x86/fpcvt.S */ 3433/* 3434 * Generic 32-bit FP conversion operation. 3435 */ 3436 /* unop vA, vB */ 3437 movzbl rINSTbl, %ecx # ecx <- A+ 3438 sarl $4, rINST # rINST <- B 3439 fildl VREG_ADDRESS(rINST) # %st0 <- vB 3440 andb $0xf, %cl # ecx <- A 3441 3442 fstps VREG_ADDRESS(%ecx) # vA <- %st0 3443 .if 0 3444 CLEAR_WIDE_REF %ecx 3445 .else 3446 CLEAR_REF %ecx 3447 .endif 3448 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3449 3450 3451/* ------------------------------ */ 3452 .balign 128 3453.L_op_int_to_double: /* 0x83 */ 3454/* File: x86/op_int_to_double.S */ 3455/* File: x86/fpcvt.S */ 3456/* 3457 * Generic 32-bit FP conversion operation. 3458 */ 3459 /* unop vA, vB */ 3460 movzbl rINSTbl, %ecx # ecx <- A+ 3461 sarl $4, rINST # rINST <- B 3462 fildl VREG_ADDRESS(rINST) # %st0 <- vB 3463 andb $0xf, %cl # ecx <- A 3464 3465 fstpl VREG_ADDRESS(%ecx) # vA <- %st0 3466 .if 1 3467 CLEAR_WIDE_REF %ecx 3468 .else 3469 CLEAR_REF %ecx 3470 .endif 3471 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3472 3473 3474/* ------------------------------ */ 3475 .balign 128 3476.L_op_long_to_int: /* 0x84 */ 3477/* File: x86/op_long_to_int.S */ 3478/* we ignore the high word, making this equivalent to a 32-bit reg move */ 3479/* File: x86/op_move.S */ 3480 /* for move, move-object, long-to-int */ 3481 /* op vA, vB */ 3482 movzbl rINSTbl, %eax # eax <- BA 3483 andb $0xf, %al # eax <- A 3484 shrl $4, rINST # rINST <- B 3485 GET_VREG rINST, rINST 3486 .if 0 3487 SET_VREG_OBJECT rINST, %eax # fp[A] <- fp[B] 3488 .else 3489 SET_VREG rINST, %eax # fp[A] <- fp[B] 3490 .endif 3491 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3492 3493 3494/* ------------------------------ */ 3495 .balign 128 3496.L_op_long_to_float: /* 0x85 */ 3497/* File: x86/op_long_to_float.S */ 3498/* File: x86/fpcvt.S */ 3499/* 3500 * Generic 32-bit FP conversion operation. 3501 */ 3502 /* unop vA, vB */ 3503 movzbl rINSTbl, %ecx # ecx <- A+ 3504 sarl $4, rINST # rINST <- B 3505 fildll VREG_ADDRESS(rINST) # %st0 <- vB 3506 andb $0xf, %cl # ecx <- A 3507 3508 fstps VREG_ADDRESS(%ecx) # vA <- %st0 3509 .if 0 3510 CLEAR_WIDE_REF %ecx 3511 .else 3512 CLEAR_REF %ecx 3513 .endif 3514 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3515 3516 3517/* ------------------------------ */ 3518 .balign 128 3519.L_op_long_to_double: /* 0x86 */ 3520/* File: x86/op_long_to_double.S */ 3521/* File: x86/fpcvt.S */ 3522/* 3523 * Generic 32-bit FP conversion operation. 3524 */ 3525 /* unop vA, vB */ 3526 movzbl rINSTbl, %ecx # ecx <- A+ 3527 sarl $4, rINST # rINST <- B 3528 fildll VREG_ADDRESS(rINST) # %st0 <- vB 3529 andb $0xf, %cl # ecx <- A 3530 3531 fstpl VREG_ADDRESS(%ecx) # vA <- %st0 3532 .if 1 3533 CLEAR_WIDE_REF %ecx 3534 .else 3535 CLEAR_REF %ecx 3536 .endif 3537 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3538 3539 3540/* ------------------------------ */ 3541 .balign 128 3542.L_op_float_to_int: /* 0x87 */ 3543/* File: x86/op_float_to_int.S */ 3544/* File: x86/cvtfp_int.S */ 3545/* On fp to int conversions, Java requires that 3546 * if the result > maxint, it should be clamped to maxint. If it is less 3547 * than minint, it should be clamped to minint. If it is a nan, the result 3548 * should be zero. Further, the rounding mode is to truncate. This model 3549 * differs from what is delivered normally via the x86 fpu, so we have 3550 * to play some games. 3551 */ 3552 /* float/double to int/long vA, vB */ 3553 movzbl rINSTbl, %ecx # ecx <- A+ 3554 sarl $4, rINST # rINST <- B 3555 .if 0 3556 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3557 .else 3558 flds VREG_ADDRESS(rINST) # %st0 <- vB 3559 .endif 3560 ftst 3561 fnstcw LOCAL0(%esp) # remember original rounding mode 3562 movzwl LOCAL0(%esp), %eax 3563 movb $0xc, %ah 3564 movw %ax, LOCAL0+2(%esp) 3565 fldcw LOCAL0+2(%esp) # set "to zero" rounding mode 3566 andb $0xf, %cl # ecx <- A 3567 .if 0 3568 fistpll VREG_ADDRESS(%ecx) # convert and store 3569 .else 3570 fistpl VREG_ADDRESS(%ecx) # convert and store 3571 .endif 3572 fldcw LOCAL0(%esp) # restore previous rounding mode 3573 .if 0 3574 movl $0x80000000, %eax 3575 xorl VREG_HIGH_ADDRESS(%ecx), %eax 3576 orl VREG_ADDRESS(%ecx), %eax 3577 .else 3578 cmpl $0x80000000, VREG_ADDRESS(%ecx) 3579 .endif 3580 je .Lop_float_to_int_special_case # fix up result 3581 3582.Lop_float_to_int_finish: 3583 xor %eax, %eax 3584 mov %eax, VREG_REF_ADDRESS(%ecx) 3585 .if 0 3586 mov %eax, VREG_REF_HIGH_ADDRESS(%ecx) 3587 .endif 3588 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3589 3590.Lop_float_to_int_special_case: 3591 fnstsw %ax 3592 sahf 3593 jp .Lop_float_to_int_isNaN 3594 adcl $-1, VREG_ADDRESS(%ecx) 3595 .if 0 3596 adcl $-1, VREG_HIGH_ADDRESS(%ecx) 3597 .endif 3598 jmp .Lop_float_to_int_finish 3599.Lop_float_to_int_isNaN: 3600 movl $0, VREG_ADDRESS(%ecx) 3601 .if 0 3602 movl $0, VREG_HIGH_ADDRESS(%ecx) 3603 .endif 3604 jmp .Lop_float_to_int_finish 3605 3606 3607/* ------------------------------ */ 3608 .balign 128 3609.L_op_float_to_long: /* 0x88 */ 3610/* File: x86/op_float_to_long.S */ 3611/* File: x86/cvtfp_int.S */ 3612/* On fp to int conversions, Java requires that 3613 * if the result > maxint, it should be clamped to maxint. If it is less 3614 * than minint, it should be clamped to minint. If it is a nan, the result 3615 * should be zero. Further, the rounding mode is to truncate. This model 3616 * differs from what is delivered normally via the x86 fpu, so we have 3617 * to play some games. 3618 */ 3619 /* float/double to int/long vA, vB */ 3620 movzbl rINSTbl, %ecx # ecx <- A+ 3621 sarl $4, rINST # rINST <- B 3622 .if 0 3623 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3624 .else 3625 flds VREG_ADDRESS(rINST) # %st0 <- vB 3626 .endif 3627 ftst 3628 fnstcw LOCAL0(%esp) # remember original rounding mode 3629 movzwl LOCAL0(%esp), %eax 3630 movb $0xc, %ah 3631 movw %ax, LOCAL0+2(%esp) 3632 fldcw LOCAL0+2(%esp) # set "to zero" rounding mode 3633 andb $0xf, %cl # ecx <- A 3634 .if 1 3635 fistpll VREG_ADDRESS(%ecx) # convert and store 3636 .else 3637 fistpl VREG_ADDRESS(%ecx) # convert and store 3638 .endif 3639 fldcw LOCAL0(%esp) # restore previous rounding mode 3640 .if 1 3641 movl $0x80000000, %eax 3642 xorl VREG_HIGH_ADDRESS(%ecx), %eax 3643 orl VREG_ADDRESS(%ecx), %eax 3644 .else 3645 cmpl $0x80000000, VREG_ADDRESS(%ecx) 3646 .endif 3647 je .Lop_float_to_long_special_case # fix up result 3648 3649.Lop_float_to_long_finish: 3650 xor %eax, %eax 3651 mov %eax, VREG_REF_ADDRESS(%ecx) 3652 .if 1 3653 mov %eax, VREG_REF_HIGH_ADDRESS(%ecx) 3654 .endif 3655 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3656 3657.Lop_float_to_long_special_case: 3658 fnstsw %ax 3659 sahf 3660 jp .Lop_float_to_long_isNaN 3661 adcl $-1, VREG_ADDRESS(%ecx) 3662 .if 1 3663 adcl $-1, VREG_HIGH_ADDRESS(%ecx) 3664 .endif 3665 jmp .Lop_float_to_long_finish 3666.Lop_float_to_long_isNaN: 3667 movl $0, VREG_ADDRESS(%ecx) 3668 .if 1 3669 movl $0, VREG_HIGH_ADDRESS(%ecx) 3670 .endif 3671 jmp .Lop_float_to_long_finish 3672 3673 3674/* ------------------------------ */ 3675 .balign 128 3676.L_op_float_to_double: /* 0x89 */ 3677/* File: x86/op_float_to_double.S */ 3678/* File: x86/fpcvt.S */ 3679/* 3680 * Generic 32-bit FP conversion operation. 3681 */ 3682 /* unop vA, vB */ 3683 movzbl rINSTbl, %ecx # ecx <- A+ 3684 sarl $4, rINST # rINST <- B 3685 flds VREG_ADDRESS(rINST) # %st0 <- vB 3686 andb $0xf, %cl # ecx <- A 3687 3688 fstpl VREG_ADDRESS(%ecx) # vA <- %st0 3689 .if 1 3690 CLEAR_WIDE_REF %ecx 3691 .else 3692 CLEAR_REF %ecx 3693 .endif 3694 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3695 3696 3697/* ------------------------------ */ 3698 .balign 128 3699.L_op_double_to_int: /* 0x8a */ 3700/* File: x86/op_double_to_int.S */ 3701/* File: x86/cvtfp_int.S */ 3702/* On fp to int conversions, Java requires that 3703 * if the result > maxint, it should be clamped to maxint. If it is less 3704 * than minint, it should be clamped to minint. If it is a nan, the result 3705 * should be zero. Further, the rounding mode is to truncate. This model 3706 * differs from what is delivered normally via the x86 fpu, so we have 3707 * to play some games. 3708 */ 3709 /* float/double to int/long vA, vB */ 3710 movzbl rINSTbl, %ecx # ecx <- A+ 3711 sarl $4, rINST # rINST <- B 3712 .if 1 3713 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3714 .else 3715 flds VREG_ADDRESS(rINST) # %st0 <- vB 3716 .endif 3717 ftst 3718 fnstcw LOCAL0(%esp) # remember original rounding mode 3719 movzwl LOCAL0(%esp), %eax 3720 movb $0xc, %ah 3721 movw %ax, LOCAL0+2(%esp) 3722 fldcw LOCAL0+2(%esp) # set "to zero" rounding mode 3723 andb $0xf, %cl # ecx <- A 3724 .if 0 3725 fistpll VREG_ADDRESS(%ecx) # convert and store 3726 .else 3727 fistpl VREG_ADDRESS(%ecx) # convert and store 3728 .endif 3729 fldcw LOCAL0(%esp) # restore previous rounding mode 3730 .if 0 3731 movl $0x80000000, %eax 3732 xorl VREG_HIGH_ADDRESS(%ecx), %eax 3733 orl VREG_ADDRESS(%ecx), %eax 3734 .else 3735 cmpl $0x80000000, VREG_ADDRESS(%ecx) 3736 .endif 3737 je .Lop_double_to_int_special_case # fix up result 3738 3739.Lop_double_to_int_finish: 3740 xor %eax, %eax 3741 mov %eax, VREG_REF_ADDRESS(%ecx) 3742 .if 0 3743 mov %eax, VREG_REF_HIGH_ADDRESS(%ecx) 3744 .endif 3745 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3746 3747.Lop_double_to_int_special_case: 3748 fnstsw %ax 3749 sahf 3750 jp .Lop_double_to_int_isNaN 3751 adcl $-1, VREG_ADDRESS(%ecx) 3752 .if 0 3753 adcl $-1, VREG_HIGH_ADDRESS(%ecx) 3754 .endif 3755 jmp .Lop_double_to_int_finish 3756.Lop_double_to_int_isNaN: 3757 movl $0, VREG_ADDRESS(%ecx) 3758 .if 0 3759 movl $0, VREG_HIGH_ADDRESS(%ecx) 3760 .endif 3761 jmp .Lop_double_to_int_finish 3762 3763 3764/* ------------------------------ */ 3765 .balign 128 3766.L_op_double_to_long: /* 0x8b */ 3767/* File: x86/op_double_to_long.S */ 3768/* File: x86/cvtfp_int.S */ 3769/* On fp to int conversions, Java requires that 3770 * if the result > maxint, it should be clamped to maxint. If it is less 3771 * than minint, it should be clamped to minint. If it is a nan, the result 3772 * should be zero. Further, the rounding mode is to truncate. This model 3773 * differs from what is delivered normally via the x86 fpu, so we have 3774 * to play some games. 3775 */ 3776 /* float/double to int/long vA, vB */ 3777 movzbl rINSTbl, %ecx # ecx <- A+ 3778 sarl $4, rINST # rINST <- B 3779 .if 1 3780 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3781 .else 3782 flds VREG_ADDRESS(rINST) # %st0 <- vB 3783 .endif 3784 ftst 3785 fnstcw LOCAL0(%esp) # remember original rounding mode 3786 movzwl LOCAL0(%esp), %eax 3787 movb $0xc, %ah 3788 movw %ax, LOCAL0+2(%esp) 3789 fldcw LOCAL0+2(%esp) # set "to zero" rounding mode 3790 andb $0xf, %cl # ecx <- A 3791 .if 1 3792 fistpll VREG_ADDRESS(%ecx) # convert and store 3793 .else 3794 fistpl VREG_ADDRESS(%ecx) # convert and store 3795 .endif 3796 fldcw LOCAL0(%esp) # restore previous rounding mode 3797 .if 1 3798 movl $0x80000000, %eax 3799 xorl VREG_HIGH_ADDRESS(%ecx), %eax 3800 orl VREG_ADDRESS(%ecx), %eax 3801 .else 3802 cmpl $0x80000000, VREG_ADDRESS(%ecx) 3803 .endif 3804 je .Lop_double_to_long_special_case # fix up result 3805 3806.Lop_double_to_long_finish: 3807 xor %eax, %eax 3808 mov %eax, VREG_REF_ADDRESS(%ecx) 3809 .if 1 3810 mov %eax, VREG_REF_HIGH_ADDRESS(%ecx) 3811 .endif 3812 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3813 3814.Lop_double_to_long_special_case: 3815 fnstsw %ax 3816 sahf 3817 jp .Lop_double_to_long_isNaN 3818 adcl $-1, VREG_ADDRESS(%ecx) 3819 .if 1 3820 adcl $-1, VREG_HIGH_ADDRESS(%ecx) 3821 .endif 3822 jmp .Lop_double_to_long_finish 3823.Lop_double_to_long_isNaN: 3824 movl $0, VREG_ADDRESS(%ecx) 3825 .if 1 3826 movl $0, VREG_HIGH_ADDRESS(%ecx) 3827 .endif 3828 jmp .Lop_double_to_long_finish 3829 3830 3831/* ------------------------------ */ 3832 .balign 128 3833.L_op_double_to_float: /* 0x8c */ 3834/* File: x86/op_double_to_float.S */ 3835/* File: x86/fpcvt.S */ 3836/* 3837 * Generic 32-bit FP conversion operation. 3838 */ 3839 /* unop vA, vB */ 3840 movzbl rINSTbl, %ecx # ecx <- A+ 3841 sarl $4, rINST # rINST <- B 3842 fldl VREG_ADDRESS(rINST) # %st0 <- vB 3843 andb $0xf, %cl # ecx <- A 3844 3845 fstps VREG_ADDRESS(%ecx) # vA <- %st0 3846 .if 0 3847 CLEAR_WIDE_REF %ecx 3848 .else 3849 CLEAR_REF %ecx 3850 .endif 3851 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3852 3853 3854/* ------------------------------ */ 3855 .balign 128 3856.L_op_int_to_byte: /* 0x8d */ 3857/* File: x86/op_int_to_byte.S */ 3858/* File: x86/unop.S */ 3859/* 3860 * Generic 32-bit unary operation. Provide an "instr" line that 3861 * specifies an instruction that performs "result = op eax". 3862 */ 3863 /* unop vA, vB */ 3864 movzbl rINSTbl,%ecx # ecx <- A+ 3865 sarl $4,rINST # rINST <- B 3866 GET_VREG %eax, rINST # eax <- vB 3867 andb $0xf,%cl # ecx <- A 3868 movsbl %al, %eax 3869 SET_VREG %eax, %ecx 3870 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3871 3872 3873/* ------------------------------ */ 3874 .balign 128 3875.L_op_int_to_char: /* 0x8e */ 3876/* File: x86/op_int_to_char.S */ 3877/* File: x86/unop.S */ 3878/* 3879 * Generic 32-bit unary operation. Provide an "instr" line that 3880 * specifies an instruction that performs "result = op eax". 3881 */ 3882 /* unop vA, vB */ 3883 movzbl rINSTbl,%ecx # ecx <- A+ 3884 sarl $4,rINST # rINST <- B 3885 GET_VREG %eax, rINST # eax <- vB 3886 andb $0xf,%cl # ecx <- A 3887 movzwl %ax,%eax 3888 SET_VREG %eax, %ecx 3889 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3890 3891 3892/* ------------------------------ */ 3893 .balign 128 3894.L_op_int_to_short: /* 0x8f */ 3895/* File: x86/op_int_to_short.S */ 3896/* File: x86/unop.S */ 3897/* 3898 * Generic 32-bit unary operation. Provide an "instr" line that 3899 * specifies an instruction that performs "result = op eax". 3900 */ 3901 /* unop vA, vB */ 3902 movzbl rINSTbl,%ecx # ecx <- A+ 3903 sarl $4,rINST # rINST <- B 3904 GET_VREG %eax, rINST # eax <- vB 3905 andb $0xf,%cl # ecx <- A 3906 movswl %ax, %eax 3907 SET_VREG %eax, %ecx 3908 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 3909 3910 3911/* ------------------------------ */ 3912 .balign 128 3913.L_op_add_int: /* 0x90 */ 3914/* File: x86/op_add_int.S */ 3915/* File: x86/binop.S */ 3916/* 3917 * Generic 32-bit binary operation. Provide an "instr" line that 3918 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3919 * This could be an x86 instruction or a function call. (If the result 3920 * comes back in a register other than eax, you can override "result".) 3921 * 3922 * For: add-int, sub-int, and-int, or-int, 3923 * xor-int, shl-int, shr-int, ushr-int 3924 */ 3925 /* binop vAA, vBB, vCC */ 3926 movzbl 2(rPC), %eax # eax <- BB 3927 movzbl 3(rPC), %ecx # ecx <- CC 3928 GET_VREG %eax, %eax # eax <- vBB 3929 addl (rFP,%ecx,4), %eax # ex: addl (rFP,%ecx,4),%eax 3930 SET_VREG %eax, rINST 3931 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3932 3933 3934/* ------------------------------ */ 3935 .balign 128 3936.L_op_sub_int: /* 0x91 */ 3937/* File: x86/op_sub_int.S */ 3938/* File: x86/binop.S */ 3939/* 3940 * Generic 32-bit binary operation. Provide an "instr" line that 3941 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 3942 * This could be an x86 instruction or a function call. (If the result 3943 * comes back in a register other than eax, you can override "result".) 3944 * 3945 * For: add-int, sub-int, and-int, or-int, 3946 * xor-int, shl-int, shr-int, ushr-int 3947 */ 3948 /* binop vAA, vBB, vCC */ 3949 movzbl 2(rPC), %eax # eax <- BB 3950 movzbl 3(rPC), %ecx # ecx <- CC 3951 GET_VREG %eax, %eax # eax <- vBB 3952 subl (rFP,%ecx,4), %eax # ex: addl (rFP,%ecx,4),%eax 3953 SET_VREG %eax, rINST 3954 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3955 3956 3957/* ------------------------------ */ 3958 .balign 128 3959.L_op_mul_int: /* 0x92 */ 3960/* File: x86/op_mul_int.S */ 3961 /* 3962 * 32-bit binary multiplication. 3963 */ 3964 /* mul vAA, vBB, vCC */ 3965 movzbl 2(rPC), %eax # eax <- BB 3966 movzbl 3(rPC), %ecx # ecx <- CC 3967 GET_VREG %eax, %eax # eax <- vBB 3968 mov rIBASE, LOCAL0(%esp) 3969 imull (rFP,%ecx,4), %eax # trashes rIBASE/edx 3970 mov LOCAL0(%esp), rIBASE 3971 SET_VREG %eax, rINST 3972 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 3973 3974/* ------------------------------ */ 3975 .balign 128 3976.L_op_div_int: /* 0x93 */ 3977/* File: x86/op_div_int.S */ 3978/* File: x86/bindiv.S */ 3979/* 3980 * 32-bit binary div/rem operation. Handles special case of op0=minint and 3981 * op1=-1. 3982 */ 3983 /* div/rem vAA, vBB, vCC */ 3984 movzbl 2(rPC), %eax # eax <- BB 3985 movzbl 3(rPC), %ecx # ecx <- CC 3986 GET_VREG %eax, %eax # eax <- vBB 3987 GET_VREG %ecx, %ecx # ecx <- vCC 3988 mov rIBASE, LOCAL0(%esp) 3989 testl %ecx, %ecx 3990 je common_errDivideByZero 3991 movl %eax, %edx 3992 orl %ecx, %edx 3993 testl $0xFFFFFF00, %edx # If both arguments are less 3994 # than 8-bit and +ve 3995 jz .Lop_div_int_8 # Do 8-bit divide 3996 testl $0xFFFF0000, %edx # If both arguments are less 3997 # than 16-bit and +ve 3998 jz .Lop_div_int_16 # Do 16-bit divide 3999 cmpl $-1, %ecx 4000 jne .Lop_div_int_32 4001 cmpl $0x80000000, %eax 4002 jne .Lop_div_int_32 4003 movl $0x80000000, %eax 4004 jmp .Lop_div_int_finish 4005.Lop_div_int_32: 4006 cltd 4007 idivl %ecx 4008 jmp .Lop_div_int_finish 4009.Lop_div_int_8: 4010 div %cl # 8-bit divide otherwise. 4011 # Remainder in %ah, quotient in %al 4012 .if 0 4013 movl %eax, %edx 4014 shr $8, %edx 4015 .else 4016 andl $0x000000FF, %eax 4017 .endif 4018 jmp .Lop_div_int_finish 4019.Lop_div_int_16: 4020 xorl %edx, %edx # Clear %edx before divide 4021 div %cx 4022.Lop_div_int_finish: 4023 SET_VREG %eax, rINST 4024 mov LOCAL0(%esp), rIBASE 4025 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4026 4027 4028/* ------------------------------ */ 4029 .balign 128 4030.L_op_rem_int: /* 0x94 */ 4031/* File: x86/op_rem_int.S */ 4032/* File: x86/bindiv.S */ 4033/* 4034 * 32-bit binary div/rem operation. Handles special case of op0=minint and 4035 * op1=-1. 4036 */ 4037 /* div/rem vAA, vBB, vCC */ 4038 movzbl 2(rPC), %eax # eax <- BB 4039 movzbl 3(rPC), %ecx # ecx <- CC 4040 GET_VREG %eax, %eax # eax <- vBB 4041 GET_VREG %ecx, %ecx # ecx <- vCC 4042 mov rIBASE, LOCAL0(%esp) 4043 testl %ecx, %ecx 4044 je common_errDivideByZero 4045 movl %eax, %edx 4046 orl %ecx, %edx 4047 testl $0xFFFFFF00, %edx # If both arguments are less 4048 # than 8-bit and +ve 4049 jz .Lop_rem_int_8 # Do 8-bit divide 4050 testl $0xFFFF0000, %edx # If both arguments are less 4051 # than 16-bit and +ve 4052 jz .Lop_rem_int_16 # Do 16-bit divide 4053 cmpl $-1, %ecx 4054 jne .Lop_rem_int_32 4055 cmpl $0x80000000, %eax 4056 jne .Lop_rem_int_32 4057 movl $0, rIBASE 4058 jmp .Lop_rem_int_finish 4059.Lop_rem_int_32: 4060 cltd 4061 idivl %ecx 4062 jmp .Lop_rem_int_finish 4063.Lop_rem_int_8: 4064 div %cl # 8-bit divide otherwise. 4065 # Remainder in %ah, quotient in %al 4066 .if 1 4067 movl %eax, %edx 4068 shr $8, %edx 4069 .else 4070 andl $0x000000FF, %eax 4071 .endif 4072 jmp .Lop_rem_int_finish 4073.Lop_rem_int_16: 4074 xorl %edx, %edx # Clear %edx before divide 4075 div %cx 4076.Lop_rem_int_finish: 4077 SET_VREG rIBASE, rINST 4078 mov LOCAL0(%esp), rIBASE 4079 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4080 4081 4082/* ------------------------------ */ 4083 .balign 128 4084.L_op_and_int: /* 0x95 */ 4085/* File: x86/op_and_int.S */ 4086/* File: x86/binop.S */ 4087/* 4088 * Generic 32-bit binary operation. Provide an "instr" line that 4089 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 4090 * This could be an x86 instruction or a function call. (If the result 4091 * comes back in a register other than eax, you can override "result".) 4092 * 4093 * For: add-int, sub-int, and-int, or-int, 4094 * xor-int, shl-int, shr-int, ushr-int 4095 */ 4096 /* binop vAA, vBB, vCC */ 4097 movzbl 2(rPC), %eax # eax <- BB 4098 movzbl 3(rPC), %ecx # ecx <- CC 4099 GET_VREG %eax, %eax # eax <- vBB 4100 andl (rFP,%ecx,4), %eax # ex: addl (rFP,%ecx,4),%eax 4101 SET_VREG %eax, rINST 4102 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4103 4104 4105/* ------------------------------ */ 4106 .balign 128 4107.L_op_or_int: /* 0x96 */ 4108/* File: x86/op_or_int.S */ 4109/* File: x86/binop.S */ 4110/* 4111 * Generic 32-bit binary operation. Provide an "instr" line that 4112 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 4113 * This could be an x86 instruction or a function call. (If the result 4114 * comes back in a register other than eax, you can override "result".) 4115 * 4116 * For: add-int, sub-int, and-int, or-int, 4117 * xor-int, shl-int, shr-int, ushr-int 4118 */ 4119 /* binop vAA, vBB, vCC */ 4120 movzbl 2(rPC), %eax # eax <- BB 4121 movzbl 3(rPC), %ecx # ecx <- CC 4122 GET_VREG %eax, %eax # eax <- vBB 4123 orl (rFP,%ecx,4), %eax # ex: addl (rFP,%ecx,4),%eax 4124 SET_VREG %eax, rINST 4125 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4126 4127 4128/* ------------------------------ */ 4129 .balign 128 4130.L_op_xor_int: /* 0x97 */ 4131/* File: x86/op_xor_int.S */ 4132/* File: x86/binop.S */ 4133/* 4134 * Generic 32-bit binary operation. Provide an "instr" line that 4135 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)". 4136 * This could be an x86 instruction or a function call. (If the result 4137 * comes back in a register other than eax, you can override "result".) 4138 * 4139 * For: add-int, sub-int, and-int, or-int, 4140 * xor-int, shl-int, shr-int, ushr-int 4141 */ 4142 /* binop vAA, vBB, vCC */ 4143 movzbl 2(rPC), %eax # eax <- BB 4144 movzbl 3(rPC), %ecx # ecx <- CC 4145 GET_VREG %eax, %eax # eax <- vBB 4146 xorl (rFP,%ecx,4), %eax # ex: addl (rFP,%ecx,4),%eax 4147 SET_VREG %eax, rINST 4148 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4149 4150 4151/* ------------------------------ */ 4152 .balign 128 4153.L_op_shl_int: /* 0x98 */ 4154/* File: x86/op_shl_int.S */ 4155/* File: x86/binop1.S */ 4156/* 4157 * Generic 32-bit binary operation in which both operands loaded to 4158 * registers (op0 in eax, op1 in ecx). 4159 */ 4160 /* binop vAA, vBB, vCC */ 4161 movzbl 2(rPC),%eax # eax <- BB 4162 movzbl 3(rPC),%ecx # ecx <- CC 4163 GET_VREG %eax, %eax # eax <- vBB 4164 GET_VREG %ecx, %ecx # eax <- vBB 4165 sall %cl, %eax # ex: addl %ecx,%eax 4166 SET_VREG %eax, rINST 4167 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4168 4169 4170/* ------------------------------ */ 4171 .balign 128 4172.L_op_shr_int: /* 0x99 */ 4173/* File: x86/op_shr_int.S */ 4174/* File: x86/binop1.S */ 4175/* 4176 * Generic 32-bit binary operation in which both operands loaded to 4177 * registers (op0 in eax, op1 in ecx). 4178 */ 4179 /* binop vAA, vBB, vCC */ 4180 movzbl 2(rPC),%eax # eax <- BB 4181 movzbl 3(rPC),%ecx # ecx <- CC 4182 GET_VREG %eax, %eax # eax <- vBB 4183 GET_VREG %ecx, %ecx # eax <- vBB 4184 sarl %cl, %eax # ex: addl %ecx,%eax 4185 SET_VREG %eax, rINST 4186 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4187 4188 4189/* ------------------------------ */ 4190 .balign 128 4191.L_op_ushr_int: /* 0x9a */ 4192/* File: x86/op_ushr_int.S */ 4193/* File: x86/binop1.S */ 4194/* 4195 * Generic 32-bit binary operation in which both operands loaded to 4196 * registers (op0 in eax, op1 in ecx). 4197 */ 4198 /* binop vAA, vBB, vCC */ 4199 movzbl 2(rPC),%eax # eax <- BB 4200 movzbl 3(rPC),%ecx # ecx <- CC 4201 GET_VREG %eax, %eax # eax <- vBB 4202 GET_VREG %ecx, %ecx # eax <- vBB 4203 shrl %cl, %eax # ex: addl %ecx,%eax 4204 SET_VREG %eax, rINST 4205 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4206 4207 4208/* ------------------------------ */ 4209 .balign 128 4210.L_op_add_long: /* 0x9b */ 4211/* File: x86/op_add_long.S */ 4212/* File: x86/binopWide.S */ 4213/* 4214 * Generic 64-bit binary operation. 4215 */ 4216 /* binop vAA, vBB, vCC */ 4217 movzbl 2(rPC), %eax # eax <- BB 4218 movzbl 3(rPC), %ecx # ecx <- CC 4219 movl rIBASE, LOCAL0(%esp) # save rIBASE 4220 GET_VREG rIBASE, %eax # rIBASE <- v[BB+0] 4221 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1] 4222 addl (rFP,%ecx,4), rIBASE # ex: addl (rFP,%ecx,4),rIBASE 4223 adcl 4(rFP,%ecx,4), %eax # ex: adcl 4(rFP,%ecx,4),%eax 4224 SET_VREG rIBASE, rINST # v[AA+0] <- rIBASE 4225 movl LOCAL0(%esp), rIBASE # restore rIBASE 4226 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 4227 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4228 4229 4230/* ------------------------------ */ 4231 .balign 128 4232.L_op_sub_long: /* 0x9c */ 4233/* File: x86/op_sub_long.S */ 4234/* File: x86/binopWide.S */ 4235/* 4236 * Generic 64-bit binary operation. 4237 */ 4238 /* binop vAA, vBB, vCC */ 4239 movzbl 2(rPC), %eax # eax <- BB 4240 movzbl 3(rPC), %ecx # ecx <- CC 4241 movl rIBASE, LOCAL0(%esp) # save rIBASE 4242 GET_VREG rIBASE, %eax # rIBASE <- v[BB+0] 4243 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1] 4244 subl (rFP,%ecx,4), rIBASE # ex: addl (rFP,%ecx,4),rIBASE 4245 sbbl 4(rFP,%ecx,4), %eax # ex: adcl 4(rFP,%ecx,4),%eax 4246 SET_VREG rIBASE, rINST # v[AA+0] <- rIBASE 4247 movl LOCAL0(%esp), rIBASE # restore rIBASE 4248 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 4249 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4250 4251 4252/* ------------------------------ */ 4253 .balign 128 4254.L_op_mul_long: /* 0x9d */ 4255/* File: x86/op_mul_long.S */ 4256/* 4257 * Signed 64-bit integer multiply. 4258 * 4259 * We could definately use more free registers for 4260 * this code. We spill rINSTw (ebx), 4261 * giving us eax, ebc, ecx and edx as computational 4262 * temps. On top of that, we'll spill edi (rFP) 4263 * for use as the vB pointer and esi (rPC) for use 4264 * as the vC pointer. Yuck. 4265 * 4266 */ 4267 /* mul-long vAA, vBB, vCC */ 4268 movzbl 2(rPC), %eax # eax <- B 4269 movzbl 3(rPC), %ecx # ecx <- C 4270 mov rPC, LOCAL0(%esp) # save Interpreter PC 4271 mov rFP, LOCAL1(%esp) # save FP 4272 mov rIBASE, LOCAL2(%esp) # save rIBASE 4273 leal (rFP,%eax,4), %esi # esi <- &v[B] 4274 leal (rFP,%ecx,4), rFP # rFP <- &v[C] 4275 movl 4(%esi), %ecx # ecx <- Bmsw 4276 imull (rFP), %ecx # ecx <- (Bmsw*Clsw) 4277 movl 4(rFP), %eax # eax <- Cmsw 4278 imull (%esi), %eax # eax <- (Cmsw*Blsw) 4279 addl %eax, %ecx # ecx <- (Bmsw*Clsw)+(Cmsw*Blsw) 4280 movl (rFP), %eax # eax <- Clsw 4281 mull (%esi) # eax <- (Clsw*Alsw) 4282 mov LOCAL0(%esp), rPC # restore Interpreter PC 4283 mov LOCAL1(%esp), rFP # restore FP 4284 leal (%ecx,rIBASE), rIBASE # full result now in rIBASE:%eax 4285 SET_VREG_HIGH rIBASE, rINST # v[B+1] <- rIBASE 4286 mov LOCAL2(%esp), rIBASE # restore IBASE 4287 SET_VREG %eax, rINST # v[B] <- eax 4288 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4289 4290/* ------------------------------ */ 4291 .balign 128 4292.L_op_div_long: /* 0x9e */ 4293/* File: x86/op_div_long.S */ 4294/* art_quick_* methods has quick abi, 4295 * so use eax, ecx, edx, ebx for args 4296 */ 4297 /* div vAA, vBB, vCC */ 4298 .extern art_quick_ldiv 4299 mov rIBASE, LOCAL0(%esp) # save rIBASE/%edx 4300 mov rINST, LOCAL1(%esp) # save rINST/%ebx 4301 movzbl 3(rPC), %eax # eax <- CC 4302 GET_VREG %ecx, %eax 4303 GET_VREG_HIGH %ebx, %eax 4304 movl %ecx, %edx 4305 orl %ebx, %ecx 4306 jz common_errDivideByZero 4307 movzbl 2(rPC), %eax # eax <- BB 4308 GET_VREG_HIGH %ecx, %eax 4309 GET_VREG %eax, %eax 4310 call SYMBOL(art_quick_ldiv) 4311 mov LOCAL1(%esp), rINST # restore rINST/%ebx 4312 SET_VREG_HIGH rIBASE, rINST 4313 SET_VREG %eax, rINST 4314 mov LOCAL0(%esp), rIBASE # restore rIBASE/%edx 4315 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4316 4317/* ------------------------------ */ 4318 .balign 128 4319.L_op_rem_long: /* 0x9f */ 4320/* File: x86/op_rem_long.S */ 4321/* File: x86/op_div_long.S */ 4322/* art_quick_* methods has quick abi, 4323 * so use eax, ecx, edx, ebx for args 4324 */ 4325 /* div vAA, vBB, vCC */ 4326 .extern art_quick_lmod 4327 mov rIBASE, LOCAL0(%esp) # save rIBASE/%edx 4328 mov rINST, LOCAL1(%esp) # save rINST/%ebx 4329 movzbl 3(rPC), %eax # eax <- CC 4330 GET_VREG %ecx, %eax 4331 GET_VREG_HIGH %ebx, %eax 4332 movl %ecx, %edx 4333 orl %ebx, %ecx 4334 jz common_errDivideByZero 4335 movzbl 2(rPC), %eax # eax <- BB 4336 GET_VREG_HIGH %ecx, %eax 4337 GET_VREG %eax, %eax 4338 call SYMBOL(art_quick_lmod) 4339 mov LOCAL1(%esp), rINST # restore rINST/%ebx 4340 SET_VREG_HIGH rIBASE, rINST 4341 SET_VREG %eax, rINST 4342 mov LOCAL0(%esp), rIBASE # restore rIBASE/%edx 4343 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4344 4345 4346/* ------------------------------ */ 4347 .balign 128 4348.L_op_and_long: /* 0xa0 */ 4349/* File: x86/op_and_long.S */ 4350/* File: x86/binopWide.S */ 4351/* 4352 * Generic 64-bit binary operation. 4353 */ 4354 /* binop vAA, vBB, vCC */ 4355 movzbl 2(rPC), %eax # eax <- BB 4356 movzbl 3(rPC), %ecx # ecx <- CC 4357 movl rIBASE, LOCAL0(%esp) # save rIBASE 4358 GET_VREG rIBASE, %eax # rIBASE <- v[BB+0] 4359 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1] 4360 andl (rFP,%ecx,4), rIBASE # ex: addl (rFP,%ecx,4),rIBASE 4361 andl 4(rFP,%ecx,4), %eax # ex: adcl 4(rFP,%ecx,4),%eax 4362 SET_VREG rIBASE, rINST # v[AA+0] <- rIBASE 4363 movl LOCAL0(%esp), rIBASE # restore rIBASE 4364 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 4365 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4366 4367 4368/* ------------------------------ */ 4369 .balign 128 4370.L_op_or_long: /* 0xa1 */ 4371/* File: x86/op_or_long.S */ 4372/* File: x86/binopWide.S */ 4373/* 4374 * Generic 64-bit binary operation. 4375 */ 4376 /* binop vAA, vBB, vCC */ 4377 movzbl 2(rPC), %eax # eax <- BB 4378 movzbl 3(rPC), %ecx # ecx <- CC 4379 movl rIBASE, LOCAL0(%esp) # save rIBASE 4380 GET_VREG rIBASE, %eax # rIBASE <- v[BB+0] 4381 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1] 4382 orl (rFP,%ecx,4), rIBASE # ex: addl (rFP,%ecx,4),rIBASE 4383 orl 4(rFP,%ecx,4), %eax # ex: adcl 4(rFP,%ecx,4),%eax 4384 SET_VREG rIBASE, rINST # v[AA+0] <- rIBASE 4385 movl LOCAL0(%esp), rIBASE # restore rIBASE 4386 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 4387 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4388 4389 4390/* ------------------------------ */ 4391 .balign 128 4392.L_op_xor_long: /* 0xa2 */ 4393/* File: x86/op_xor_long.S */ 4394/* File: x86/binopWide.S */ 4395/* 4396 * Generic 64-bit binary operation. 4397 */ 4398 /* binop vAA, vBB, vCC */ 4399 movzbl 2(rPC), %eax # eax <- BB 4400 movzbl 3(rPC), %ecx # ecx <- CC 4401 movl rIBASE, LOCAL0(%esp) # save rIBASE 4402 GET_VREG rIBASE, %eax # rIBASE <- v[BB+0] 4403 GET_VREG_HIGH %eax, %eax # eax <- v[BB+1] 4404 xorl (rFP,%ecx,4), rIBASE # ex: addl (rFP,%ecx,4),rIBASE 4405 xorl 4(rFP,%ecx,4), %eax # ex: adcl 4(rFP,%ecx,4),%eax 4406 SET_VREG rIBASE, rINST # v[AA+0] <- rIBASE 4407 movl LOCAL0(%esp), rIBASE # restore rIBASE 4408 SET_VREG_HIGH %eax, rINST # v[AA+1] <- eax 4409 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4410 4411 4412/* ------------------------------ */ 4413 .balign 128 4414.L_op_shl_long: /* 0xa3 */ 4415/* File: x86/op_shl_long.S */ 4416/* 4417 * Long integer shift. This is different from the generic 32/64-bit 4418 * binary operations because vAA/vBB are 64-bit but vCC (the shift 4419 * distance) is 32-bit. Also, Dalvik requires us to mask off the low 4420 * 6 bits of the shift distance. x86 shifts automatically mask off 4421 * the low 5 bits of %cl, so have to handle the 64 > shiftcount > 31 4422 * case specially. 4423 */ 4424 /* shl-long vAA, vBB, vCC */ 4425 /* ecx gets shift count */ 4426 /* Need to spill rINST */ 4427 /* rINSTw gets AA */ 4428 movzbl 2(rPC), %eax # eax <- BB 4429 movzbl 3(rPC), %ecx # ecx <- CC 4430 movl rIBASE, LOCAL0(%esp) 4431 GET_VREG_HIGH rIBASE, %eax # ecx <- v[BB+1] 4432 GET_VREG %ecx, %ecx # ecx <- vCC 4433 GET_VREG %eax, %eax # eax <- v[BB+0] 4434 shldl %eax,rIBASE 4435 sall %cl, %eax 4436 testb $32, %cl 4437 je 2f 4438 movl %eax, rIBASE 4439 xorl %eax, %eax 44402: 4441 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 4442 movl LOCAL0(%esp), rIBASE 4443 SET_VREG %eax, rINST # v[AA+0] <- %eax 4444 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4445 4446/* ------------------------------ */ 4447 .balign 128 4448.L_op_shr_long: /* 0xa4 */ 4449/* File: x86/op_shr_long.S */ 4450/* 4451 * Long integer shift. This is different from the generic 32/64-bit 4452 * binary operations because vAA/vBB are 64-bit but vCC (the shift 4453 * distance) is 32-bit. Also, Dalvik requires us to mask off the low 4454 * 6 bits of the shift distance. x86 shifts automatically mask off 4455 * the low 5 bits of %cl, so have to handle the 64 > shiftcount > 31 4456 * case specially. 4457 */ 4458 /* shr-long vAA, vBB, vCC */ 4459 /* ecx gets shift count */ 4460 /* Need to spill rIBASE */ 4461 /* rINSTw gets AA */ 4462 movzbl 2(rPC), %eax # eax <- BB 4463 movzbl 3(rPC), %ecx # ecx <- CC 4464 movl rIBASE, LOCAL0(%esp) 4465 GET_VREG_HIGH rIBASE, %eax # rIBASE<- v[BB+1] 4466 GET_VREG %ecx, %ecx # ecx <- vCC 4467 GET_VREG %eax, %eax # eax <- v[BB+0] 4468 shrdl rIBASE, %eax 4469 sarl %cl, rIBASE 4470 testb $32, %cl 4471 je 2f 4472 movl rIBASE, %eax 4473 sarl $31, rIBASE 44742: 4475 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 4476 movl LOCAL0(%esp), rIBASE 4477 SET_VREG %eax, rINST # v[AA+0] <- eax 4478 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4479 4480/* ------------------------------ */ 4481 .balign 128 4482.L_op_ushr_long: /* 0xa5 */ 4483/* File: x86/op_ushr_long.S */ 4484/* 4485 * Long integer shift. This is different from the generic 32/64-bit 4486 * binary operations because vAA/vBB are 64-bit but vCC (the shift 4487 * distance) is 32-bit. Also, Dalvik requires us to mask off the low 4488 * 6 bits of the shift distance. x86 shifts automatically mask off 4489 * the low 5 bits of %cl, so have to handle the 64 > shiftcount > 31 4490 * case specially. 4491 */ 4492 /* shr-long vAA, vBB, vCC */ 4493 /* ecx gets shift count */ 4494 /* Need to spill rIBASE */ 4495 /* rINSTw gets AA */ 4496 movzbl 2(rPC), %eax # eax <- BB 4497 movzbl 3(rPC), %ecx # ecx <- CC 4498 movl rIBASE, LOCAL0(%esp) 4499 GET_VREG_HIGH rIBASE, %eax # rIBASE <- v[BB+1] 4500 GET_VREG %ecx, %ecx # ecx <- vCC 4501 GET_VREG %eax, %eax # eax <- v[BB+0] 4502 shrdl rIBASE, %eax 4503 shrl %cl, rIBASE 4504 testb $32, %cl 4505 je 2f 4506 movl rIBASE, %eax 4507 xorl rIBASE, rIBASE 45082: 4509 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 4510 movl LOCAL0(%esp), rIBASE 4511 SET_VREG %eax, rINST # v[BB+0] <- eax 4512 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4513 4514/* ------------------------------ */ 4515 .balign 128 4516.L_op_add_float: /* 0xa6 */ 4517/* File: x86/op_add_float.S */ 4518/* File: x86/sseBinop.S */ 4519 movzbl 2(rPC), %ecx # ecx <- BB 4520 movzbl 3(rPC), %eax # eax <- CC 4521 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4522 addss VREG_ADDRESS(%eax), %xmm0 4523 movss %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4524 pxor %xmm0, %xmm0 4525 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4526 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4527 4528 4529/* ------------------------------ */ 4530 .balign 128 4531.L_op_sub_float: /* 0xa7 */ 4532/* File: x86/op_sub_float.S */ 4533/* File: x86/sseBinop.S */ 4534 movzbl 2(rPC), %ecx # ecx <- BB 4535 movzbl 3(rPC), %eax # eax <- CC 4536 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4537 subss VREG_ADDRESS(%eax), %xmm0 4538 movss %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4539 pxor %xmm0, %xmm0 4540 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4541 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4542 4543 4544/* ------------------------------ */ 4545 .balign 128 4546.L_op_mul_float: /* 0xa8 */ 4547/* File: x86/op_mul_float.S */ 4548/* File: x86/sseBinop.S */ 4549 movzbl 2(rPC), %ecx # ecx <- BB 4550 movzbl 3(rPC), %eax # eax <- CC 4551 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4552 mulss VREG_ADDRESS(%eax), %xmm0 4553 movss %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4554 pxor %xmm0, %xmm0 4555 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4556 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4557 4558 4559/* ------------------------------ */ 4560 .balign 128 4561.L_op_div_float: /* 0xa9 */ 4562/* File: x86/op_div_float.S */ 4563/* File: x86/sseBinop.S */ 4564 movzbl 2(rPC), %ecx # ecx <- BB 4565 movzbl 3(rPC), %eax # eax <- CC 4566 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4567 divss VREG_ADDRESS(%eax), %xmm0 4568 movss %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4569 pxor %xmm0, %xmm0 4570 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4571 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4572 4573 4574/* ------------------------------ */ 4575 .balign 128 4576.L_op_rem_float: /* 0xaa */ 4577/* File: x86/op_rem_float.S */ 4578 /* rem_float vAA, vBB, vCC */ 4579 movzbl 3(rPC), %ecx # ecx <- BB 4580 movzbl 2(rPC), %eax # eax <- CC 4581 flds VREG_ADDRESS(%ecx) # vBB to fp stack 4582 flds VREG_ADDRESS(%eax) # vCC to fp stack 45831: 4584 fprem 4585 fstsw %ax 4586 sahf 4587 jp 1b 4588 fstp %st(1) 4589 fstps VREG_ADDRESS(rINST) # %st to vAA 4590 CLEAR_REF rINST 4591 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4592 4593/* ------------------------------ */ 4594 .balign 128 4595.L_op_add_double: /* 0xab */ 4596/* File: x86/op_add_double.S */ 4597/* File: x86/sseBinop.S */ 4598 movzbl 2(rPC), %ecx # ecx <- BB 4599 movzbl 3(rPC), %eax # eax <- CC 4600 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4601 addsd VREG_ADDRESS(%eax), %xmm0 4602 movsd %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4603 pxor %xmm0, %xmm0 4604 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4605 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4606 4607 4608/* ------------------------------ */ 4609 .balign 128 4610.L_op_sub_double: /* 0xac */ 4611/* File: x86/op_sub_double.S */ 4612/* File: x86/sseBinop.S */ 4613 movzbl 2(rPC), %ecx # ecx <- BB 4614 movzbl 3(rPC), %eax # eax <- CC 4615 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4616 subsd VREG_ADDRESS(%eax), %xmm0 4617 movsd %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4618 pxor %xmm0, %xmm0 4619 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4620 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4621 4622 4623/* ------------------------------ */ 4624 .balign 128 4625.L_op_mul_double: /* 0xad */ 4626/* File: x86/op_mul_double.S */ 4627/* File: x86/sseBinop.S */ 4628 movzbl 2(rPC), %ecx # ecx <- BB 4629 movzbl 3(rPC), %eax # eax <- CC 4630 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4631 mulsd VREG_ADDRESS(%eax), %xmm0 4632 movsd %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4633 pxor %xmm0, %xmm0 4634 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4635 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4636 4637 4638/* ------------------------------ */ 4639 .balign 128 4640.L_op_div_double: /* 0xae */ 4641/* File: x86/op_div_double.S */ 4642/* File: x86/sseBinop.S */ 4643 movzbl 2(rPC), %ecx # ecx <- BB 4644 movzbl 3(rPC), %eax # eax <- CC 4645 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 4646 divsd VREG_ADDRESS(%eax), %xmm0 4647 movsd %xmm0, VREG_ADDRESS(rINST) # vAA <- %xmm0 4648 pxor %xmm0, %xmm0 4649 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 4650 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4651 4652 4653/* ------------------------------ */ 4654 .balign 128 4655.L_op_rem_double: /* 0xaf */ 4656/* File: x86/op_rem_double.S */ 4657 /* rem_double vAA, vBB, vCC */ 4658 movzbl 3(rPC), %ecx # ecx <- BB 4659 movzbl 2(rPC), %eax # eax <- CC 4660 fldl VREG_ADDRESS(%ecx) # %st1 <- fp[vBB] 4661 fldl VREG_ADDRESS(%eax) # %st0 <- fp[vCC] 46621: 4663 fprem 4664 fstsw %ax 4665 sahf 4666 jp 1b 4667 fstp %st(1) 4668 fstpl VREG_ADDRESS(rINST) # fp[vAA] <- %st 4669 CLEAR_WIDE_REF rINST 4670 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 4671 4672/* ------------------------------ */ 4673 .balign 128 4674.L_op_add_int_2addr: /* 0xb0 */ 4675/* File: x86/op_add_int_2addr.S */ 4676/* File: x86/binop2addr.S */ 4677/* 4678 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4679 * that specifies an instruction that performs "result = r0 op r1". 4680 * This could be an instruction or a function call. 4681 * 4682 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4683 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4684 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4685 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4686 */ 4687 /* binop/2addr vA, vB */ 4688 movzx rINSTbl, %ecx # ecx <- A+ 4689 sarl $4, rINST # rINST <- B 4690 GET_VREG %eax, rINST # eax <- vB 4691 andb $0xf, %cl # ecx <- A 4692 addl %eax, (rFP,%ecx,4) # for ex: addl %eax,(rFP,%ecx,4) 4693 CLEAR_REF %ecx 4694 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4695 4696 4697/* ------------------------------ */ 4698 .balign 128 4699.L_op_sub_int_2addr: /* 0xb1 */ 4700/* File: x86/op_sub_int_2addr.S */ 4701/* File: x86/binop2addr.S */ 4702/* 4703 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4704 * that specifies an instruction that performs "result = r0 op r1". 4705 * This could be an instruction or a function call. 4706 * 4707 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4708 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4709 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4710 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4711 */ 4712 /* binop/2addr vA, vB */ 4713 movzx rINSTbl, %ecx # ecx <- A+ 4714 sarl $4, rINST # rINST <- B 4715 GET_VREG %eax, rINST # eax <- vB 4716 andb $0xf, %cl # ecx <- A 4717 subl %eax, (rFP,%ecx,4) # for ex: addl %eax,(rFP,%ecx,4) 4718 CLEAR_REF %ecx 4719 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4720 4721 4722/* ------------------------------ */ 4723 .balign 128 4724.L_op_mul_int_2addr: /* 0xb2 */ 4725/* File: x86/op_mul_int_2addr.S */ 4726 /* mul vA, vB */ 4727 movzx rINSTbl, %ecx # ecx <- A+ 4728 sarl $4, rINST # rINST <- B 4729 GET_VREG %eax, rINST # eax <- vB 4730 andb $0xf, %cl # ecx <- A 4731 movl rIBASE, rINST 4732 imull (rFP,%ecx,4), %eax # trashes rIBASE/edx 4733 movl rINST, rIBASE 4734 SET_VREG %eax, %ecx 4735 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4736 4737/* ------------------------------ */ 4738 .balign 128 4739.L_op_div_int_2addr: /* 0xb3 */ 4740/* File: x86/op_div_int_2addr.S */ 4741/* File: x86/bindiv2addr.S */ 4742/* 4743 * 32-bit binary div/rem operation. Handles special case of op0=minint and 4744 * op1=-1. 4745 */ 4746 /* div/rem/2addr vA, vB */ 4747 movzx rINSTbl, %ecx # eax <- BA 4748 mov rIBASE, LOCAL0(%esp) 4749 sarl $4, %ecx # ecx <- B 4750 GET_VREG %ecx, %ecx # eax <- vBB 4751 andb $0xf, rINSTbl # rINST <- A 4752 GET_VREG %eax, rINST # eax <- vBB 4753 testl %ecx, %ecx 4754 je common_errDivideByZero 4755 cmpl $-1, %ecx 4756 jne .Lop_div_int_2addr_continue_div2addr 4757 cmpl $0x80000000, %eax 4758 jne .Lop_div_int_2addr_continue_div2addr 4759 movl $0x80000000, %eax 4760 SET_VREG %eax, rINST 4761 mov LOCAL0(%esp), rIBASE 4762 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4763 4764.Lop_div_int_2addr_continue_div2addr: 4765 cltd 4766 idivl %ecx 4767 SET_VREG %eax, rINST 4768 mov LOCAL0(%esp), rIBASE 4769 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4770 4771 4772/* ------------------------------ */ 4773 .balign 128 4774.L_op_rem_int_2addr: /* 0xb4 */ 4775/* File: x86/op_rem_int_2addr.S */ 4776/* File: x86/bindiv2addr.S */ 4777/* 4778 * 32-bit binary div/rem operation. Handles special case of op0=minint and 4779 * op1=-1. 4780 */ 4781 /* div/rem/2addr vA, vB */ 4782 movzx rINSTbl, %ecx # eax <- BA 4783 mov rIBASE, LOCAL0(%esp) 4784 sarl $4, %ecx # ecx <- B 4785 GET_VREG %ecx, %ecx # eax <- vBB 4786 andb $0xf, rINSTbl # rINST <- A 4787 GET_VREG %eax, rINST # eax <- vBB 4788 testl %ecx, %ecx 4789 je common_errDivideByZero 4790 cmpl $-1, %ecx 4791 jne .Lop_rem_int_2addr_continue_div2addr 4792 cmpl $0x80000000, %eax 4793 jne .Lop_rem_int_2addr_continue_div2addr 4794 movl $0, rIBASE 4795 SET_VREG rIBASE, rINST 4796 mov LOCAL0(%esp), rIBASE 4797 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4798 4799.Lop_rem_int_2addr_continue_div2addr: 4800 cltd 4801 idivl %ecx 4802 SET_VREG rIBASE, rINST 4803 mov LOCAL0(%esp), rIBASE 4804 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4805 4806 4807/* ------------------------------ */ 4808 .balign 128 4809.L_op_and_int_2addr: /* 0xb5 */ 4810/* File: x86/op_and_int_2addr.S */ 4811/* File: x86/binop2addr.S */ 4812/* 4813 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4814 * that specifies an instruction that performs "result = r0 op r1". 4815 * This could be an instruction or a function call. 4816 * 4817 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4818 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4819 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4820 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4821 */ 4822 /* binop/2addr vA, vB */ 4823 movzx rINSTbl, %ecx # ecx <- A+ 4824 sarl $4, rINST # rINST <- B 4825 GET_VREG %eax, rINST # eax <- vB 4826 andb $0xf, %cl # ecx <- A 4827 andl %eax, (rFP,%ecx,4) # for ex: addl %eax,(rFP,%ecx,4) 4828 CLEAR_REF %ecx 4829 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4830 4831 4832/* ------------------------------ */ 4833 .balign 128 4834.L_op_or_int_2addr: /* 0xb6 */ 4835/* File: x86/op_or_int_2addr.S */ 4836/* File: x86/binop2addr.S */ 4837/* 4838 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4839 * that specifies an instruction that performs "result = r0 op r1". 4840 * This could be an instruction or a function call. 4841 * 4842 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4843 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4844 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4845 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4846 */ 4847 /* binop/2addr vA, vB */ 4848 movzx rINSTbl, %ecx # ecx <- A+ 4849 sarl $4, rINST # rINST <- B 4850 GET_VREG %eax, rINST # eax <- vB 4851 andb $0xf, %cl # ecx <- A 4852 orl %eax, (rFP,%ecx,4) # for ex: addl %eax,(rFP,%ecx,4) 4853 CLEAR_REF %ecx 4854 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4855 4856 4857/* ------------------------------ */ 4858 .balign 128 4859.L_op_xor_int_2addr: /* 0xb7 */ 4860/* File: x86/op_xor_int_2addr.S */ 4861/* File: x86/binop2addr.S */ 4862/* 4863 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line 4864 * that specifies an instruction that performs "result = r0 op r1". 4865 * This could be an instruction or a function call. 4866 * 4867 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr, 4868 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr, 4869 * shl-int/2addr, shr-int/2addr, ushr-int/2addr, add-float/2addr, 4870 * sub-float/2addr, mul-float/2addr, div-float/2addr, rem-float/2addr 4871 */ 4872 /* binop/2addr vA, vB */ 4873 movzx rINSTbl, %ecx # ecx <- A+ 4874 sarl $4, rINST # rINST <- B 4875 GET_VREG %eax, rINST # eax <- vB 4876 andb $0xf, %cl # ecx <- A 4877 xorl %eax, (rFP,%ecx,4) # for ex: addl %eax,(rFP,%ecx,4) 4878 CLEAR_REF %ecx 4879 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4880 4881 4882/* ------------------------------ */ 4883 .balign 128 4884.L_op_shl_int_2addr: /* 0xb8 */ 4885/* File: x86/op_shl_int_2addr.S */ 4886/* File: x86/shop2addr.S */ 4887/* 4888 * Generic 32-bit "shift/2addr" operation. 4889 */ 4890 /* shift/2addr vA, vB */ 4891 movzx rINSTbl, %ecx # eax <- BA 4892 sarl $4, %ecx # ecx <- B 4893 GET_VREG %ecx, %ecx # eax <- vBB 4894 andb $0xf, rINSTbl # rINST <- A 4895 GET_VREG %eax, rINST # eax <- vAA 4896 sall %cl, %eax # ex: sarl %cl, %eax 4897 SET_VREG %eax, rINST 4898 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4899 4900 4901/* ------------------------------ */ 4902 .balign 128 4903.L_op_shr_int_2addr: /* 0xb9 */ 4904/* File: x86/op_shr_int_2addr.S */ 4905/* File: x86/shop2addr.S */ 4906/* 4907 * Generic 32-bit "shift/2addr" operation. 4908 */ 4909 /* shift/2addr vA, vB */ 4910 movzx rINSTbl, %ecx # eax <- BA 4911 sarl $4, %ecx # ecx <- B 4912 GET_VREG %ecx, %ecx # eax <- vBB 4913 andb $0xf, rINSTbl # rINST <- A 4914 GET_VREG %eax, rINST # eax <- vAA 4915 sarl %cl, %eax # ex: sarl %cl, %eax 4916 SET_VREG %eax, rINST 4917 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4918 4919 4920/* ------------------------------ */ 4921 .balign 128 4922.L_op_ushr_int_2addr: /* 0xba */ 4923/* File: x86/op_ushr_int_2addr.S */ 4924/* File: x86/shop2addr.S */ 4925/* 4926 * Generic 32-bit "shift/2addr" operation. 4927 */ 4928 /* shift/2addr vA, vB */ 4929 movzx rINSTbl, %ecx # eax <- BA 4930 sarl $4, %ecx # ecx <- B 4931 GET_VREG %ecx, %ecx # eax <- vBB 4932 andb $0xf, rINSTbl # rINST <- A 4933 GET_VREG %eax, rINST # eax <- vAA 4934 shrl %cl, %eax # ex: sarl %cl, %eax 4935 SET_VREG %eax, rINST 4936 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4937 4938 4939/* ------------------------------ */ 4940 .balign 128 4941.L_op_add_long_2addr: /* 0xbb */ 4942/* File: x86/op_add_long_2addr.S */ 4943/* File: x86/binopWide2addr.S */ 4944/* 4945 * Generic 64-bit binary operation. 4946 */ 4947 /* binop/2addr vA, vB */ 4948 movzbl rINSTbl, %ecx # ecx<- BA 4949 sarl $4, %ecx # ecx<- B 4950 GET_VREG %eax, %ecx # eax<- v[B+0] 4951 GET_VREG_HIGH %ecx, %ecx # eax<- v[B+1] 4952 andb $0xF, rINSTbl # rINST<- A 4953 addl %eax, (rFP,rINST,4) # ex: addl %eax,(rFP,rINST,4) 4954 adcl %ecx, 4(rFP,rINST,4) # ex: adcl %ecx,4(rFP,rINST,4) 4955 CLEAR_WIDE_REF rINST 4956 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4957 4958 4959/* ------------------------------ */ 4960 .balign 128 4961.L_op_sub_long_2addr: /* 0xbc */ 4962/* File: x86/op_sub_long_2addr.S */ 4963/* File: x86/binopWide2addr.S */ 4964/* 4965 * Generic 64-bit binary operation. 4966 */ 4967 /* binop/2addr vA, vB */ 4968 movzbl rINSTbl, %ecx # ecx<- BA 4969 sarl $4, %ecx # ecx<- B 4970 GET_VREG %eax, %ecx # eax<- v[B+0] 4971 GET_VREG_HIGH %ecx, %ecx # eax<- v[B+1] 4972 andb $0xF, rINSTbl # rINST<- A 4973 subl %eax, (rFP,rINST,4) # ex: addl %eax,(rFP,rINST,4) 4974 sbbl %ecx, 4(rFP,rINST,4) # ex: adcl %ecx,4(rFP,rINST,4) 4975 CLEAR_WIDE_REF rINST 4976 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 4977 4978 4979/* ------------------------------ */ 4980 .balign 128 4981.L_op_mul_long_2addr: /* 0xbd */ 4982/* File: x86/op_mul_long_2addr.S */ 4983/* 4984 * Signed 64-bit integer multiply, 2-addr version 4985 * 4986 * We could definately use more free registers for 4987 * this code. We must spill %edx (rIBASE) because it 4988 * is used by imul. We'll also spill rINST (ebx), 4989 * giving us eax, ebc, ecx and rIBASE as computational 4990 * temps. On top of that, we'll spill %esi (edi) 4991 * for use as the vA pointer and rFP (esi) for use 4992 * as the vB pointer. Yuck. 4993 */ 4994 /* mul-long/2addr vA, vB */ 4995 movzbl rINSTbl, %eax # eax <- BA 4996 andb $0xf, %al # eax <- A 4997 CLEAR_WIDE_REF %eax # clear refs in advance 4998 sarl $4, rINST # rINST <- B 4999 mov rPC, LOCAL0(%esp) # save Interpreter PC 5000 mov rFP, LOCAL1(%esp) # save FP 5001 mov rIBASE, LOCAL2(%esp) # save rIBASE 5002 leal (rFP,%eax,4), %esi # esi <- &v[A] 5003 leal (rFP,rINST,4), rFP # rFP <- &v[B] 5004 movl 4(%esi), %ecx # ecx <- Amsw 5005 imull (rFP), %ecx # ecx <- (Amsw*Blsw) 5006 movl 4(rFP), %eax # eax <- Bmsw 5007 imull (%esi), %eax # eax <- (Bmsw*Alsw) 5008 addl %eax, %ecx # ecx <- (Amsw*Blsw)+(Bmsw*Alsw) 5009 movl (rFP), %eax # eax <- Blsw 5010 mull (%esi) # eax <- (Blsw*Alsw) 5011 leal (%ecx,rIBASE), rIBASE # full result now in %edx:%eax 5012 movl rIBASE, 4(%esi) # v[A+1] <- rIBASE 5013 movl %eax, (%esi) # v[A] <- %eax 5014 mov LOCAL0(%esp), rPC # restore Interpreter PC 5015 mov LOCAL2(%esp), rIBASE # restore IBASE 5016 mov LOCAL1(%esp), rFP # restore FP 5017 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5018 5019/* ------------------------------ */ 5020 .balign 128 5021.L_op_div_long_2addr: /* 0xbe */ 5022/* File: x86/op_div_long_2addr.S */ 5023/* art_quick_* methods has quick abi, 5024 * so use eax, ecx, edx, ebx for args 5025 */ 5026 /* div/2addr vA, vB */ 5027 .extern art_quick_ldiv 5028 mov rIBASE, LOCAL0(%esp) # save rIBASE/%edx 5029 movzbl rINSTbl, %eax 5030 shrl $4, %eax # eax <- B 5031 andb $0xf, rINSTbl # rINST <- A 5032 mov rINST, LOCAL1(%esp) # save rINST/%ebx 5033 movl %ebx, %ecx 5034 GET_VREG %edx, %eax 5035 GET_VREG_HIGH %ebx, %eax 5036 movl %edx, %eax 5037 orl %ebx, %eax 5038 jz common_errDivideByZero 5039 GET_VREG %eax, %ecx 5040 GET_VREG_HIGH %ecx, %ecx 5041 call SYMBOL(art_quick_ldiv) 5042 mov LOCAL1(%esp), rINST # restore rINST/%ebx 5043 SET_VREG_HIGH rIBASE, rINST 5044 SET_VREG %eax, rINST 5045 mov LOCAL0(%esp), rIBASE # restore rIBASE/%edx 5046 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5047 5048/* ------------------------------ */ 5049 .balign 128 5050.L_op_rem_long_2addr: /* 0xbf */ 5051/* File: x86/op_rem_long_2addr.S */ 5052/* File: x86/op_div_long_2addr.S */ 5053/* art_quick_* methods has quick abi, 5054 * so use eax, ecx, edx, ebx for args 5055 */ 5056 /* div/2addr vA, vB */ 5057 .extern art_quick_lmod 5058 mov rIBASE, LOCAL0(%esp) # save rIBASE/%edx 5059 movzbl rINSTbl, %eax 5060 shrl $4, %eax # eax <- B 5061 andb $0xf, rINSTbl # rINST <- A 5062 mov rINST, LOCAL1(%esp) # save rINST/%ebx 5063 movl %ebx, %ecx 5064 GET_VREG %edx, %eax 5065 GET_VREG_HIGH %ebx, %eax 5066 movl %edx, %eax 5067 orl %ebx, %eax 5068 jz common_errDivideByZero 5069 GET_VREG %eax, %ecx 5070 GET_VREG_HIGH %ecx, %ecx 5071 call SYMBOL(art_quick_lmod) 5072 mov LOCAL1(%esp), rINST # restore rINST/%ebx 5073 SET_VREG_HIGH rIBASE, rINST 5074 SET_VREG %eax, rINST 5075 mov LOCAL0(%esp), rIBASE # restore rIBASE/%edx 5076 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5077 5078 5079/* ------------------------------ */ 5080 .balign 128 5081.L_op_and_long_2addr: /* 0xc0 */ 5082/* File: x86/op_and_long_2addr.S */ 5083/* File: x86/binopWide2addr.S */ 5084/* 5085 * Generic 64-bit binary operation. 5086 */ 5087 /* binop/2addr vA, vB */ 5088 movzbl rINSTbl, %ecx # ecx<- BA 5089 sarl $4, %ecx # ecx<- B 5090 GET_VREG %eax, %ecx # eax<- v[B+0] 5091 GET_VREG_HIGH %ecx, %ecx # eax<- v[B+1] 5092 andb $0xF, rINSTbl # rINST<- A 5093 andl %eax, (rFP,rINST,4) # ex: addl %eax,(rFP,rINST,4) 5094 andl %ecx, 4(rFP,rINST,4) # ex: adcl %ecx,4(rFP,rINST,4) 5095 CLEAR_WIDE_REF rINST 5096 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5097 5098 5099/* ------------------------------ */ 5100 .balign 128 5101.L_op_or_long_2addr: /* 0xc1 */ 5102/* File: x86/op_or_long_2addr.S */ 5103/* File: x86/binopWide2addr.S */ 5104/* 5105 * Generic 64-bit binary operation. 5106 */ 5107 /* binop/2addr vA, vB */ 5108 movzbl rINSTbl, %ecx # ecx<- BA 5109 sarl $4, %ecx # ecx<- B 5110 GET_VREG %eax, %ecx # eax<- v[B+0] 5111 GET_VREG_HIGH %ecx, %ecx # eax<- v[B+1] 5112 andb $0xF, rINSTbl # rINST<- A 5113 orl %eax, (rFP,rINST,4) # ex: addl %eax,(rFP,rINST,4) 5114 orl %ecx, 4(rFP,rINST,4) # ex: adcl %ecx,4(rFP,rINST,4) 5115 CLEAR_WIDE_REF rINST 5116 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5117 5118 5119/* ------------------------------ */ 5120 .balign 128 5121.L_op_xor_long_2addr: /* 0xc2 */ 5122/* File: x86/op_xor_long_2addr.S */ 5123/* File: x86/binopWide2addr.S */ 5124/* 5125 * Generic 64-bit binary operation. 5126 */ 5127 /* binop/2addr vA, vB */ 5128 movzbl rINSTbl, %ecx # ecx<- BA 5129 sarl $4, %ecx # ecx<- B 5130 GET_VREG %eax, %ecx # eax<- v[B+0] 5131 GET_VREG_HIGH %ecx, %ecx # eax<- v[B+1] 5132 andb $0xF, rINSTbl # rINST<- A 5133 xorl %eax, (rFP,rINST,4) # ex: addl %eax,(rFP,rINST,4) 5134 xorl %ecx, 4(rFP,rINST,4) # ex: adcl %ecx,4(rFP,rINST,4) 5135 CLEAR_WIDE_REF rINST 5136 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5137 5138 5139/* ------------------------------ */ 5140 .balign 128 5141.L_op_shl_long_2addr: /* 0xc3 */ 5142/* File: x86/op_shl_long_2addr.S */ 5143/* 5144 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is 5145 * 32-bit shift distance. 5146 */ 5147 /* shl-long/2addr vA, vB */ 5148 /* ecx gets shift count */ 5149 /* Need to spill rIBASE */ 5150 /* rINSTw gets AA */ 5151 movzbl rINSTbl, %ecx # ecx <- BA 5152 andb $0xf, rINSTbl # rINST <- A 5153 GET_VREG %eax, rINST # eax <- v[AA+0] 5154 sarl $4, %ecx # ecx <- B 5155 movl rIBASE, LOCAL0(%esp) 5156 GET_VREG_HIGH rIBASE, rINST # rIBASE <- v[AA+1] 5157 GET_VREG %ecx, %ecx # ecx <- vBB 5158 shldl %eax, rIBASE 5159 sall %cl, %eax 5160 testb $32, %cl 5161 je 2f 5162 movl %eax, rIBASE 5163 xorl %eax, %eax 51642: 5165 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 5166 movl LOCAL0(%esp), rIBASE 5167 SET_VREG %eax, rINST # v[AA+0] <- eax 5168 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5169 5170/* ------------------------------ */ 5171 .balign 128 5172.L_op_shr_long_2addr: /* 0xc4 */ 5173/* File: x86/op_shr_long_2addr.S */ 5174/* 5175 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is 5176 * 32-bit shift distance. 5177 */ 5178 /* shl-long/2addr vA, vB */ 5179 /* ecx gets shift count */ 5180 /* Need to spill rIBASE */ 5181 /* rINSTw gets AA */ 5182 movzbl rINSTbl, %ecx # ecx <- BA 5183 andb $0xf, rINSTbl # rINST <- A 5184 GET_VREG %eax, rINST # eax <- v[AA+0] 5185 sarl $4, %ecx # ecx <- B 5186 movl rIBASE, LOCAL0(%esp) 5187 GET_VREG_HIGH rIBASE, rINST # rIBASE <- v[AA+1] 5188 GET_VREG %ecx, %ecx # ecx <- vBB 5189 shrdl rIBASE, %eax 5190 sarl %cl, rIBASE 5191 testb $32, %cl 5192 je 2f 5193 movl rIBASE, %eax 5194 sarl $31, rIBASE 51952: 5196 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 5197 movl LOCAL0(%esp), rIBASE 5198 SET_VREG %eax, rINST # v[AA+0] <- eax 5199 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5200 5201/* ------------------------------ */ 5202 .balign 128 5203.L_op_ushr_long_2addr: /* 0xc5 */ 5204/* File: x86/op_ushr_long_2addr.S */ 5205/* 5206 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is 5207 * 32-bit shift distance. 5208 */ 5209 /* shl-long/2addr vA, vB */ 5210 /* ecx gets shift count */ 5211 /* Need to spill rIBASE */ 5212 /* rINSTw gets AA */ 5213 movzbl rINSTbl, %ecx # ecx <- BA 5214 andb $0xf, rINSTbl # rINST <- A 5215 GET_VREG %eax, rINST # eax <- v[AA+0] 5216 sarl $4, %ecx # ecx <- B 5217 movl rIBASE, LOCAL0(%esp) 5218 GET_VREG_HIGH rIBASE, rINST # rIBASE <- v[AA+1] 5219 GET_VREG %ecx, %ecx # ecx <- vBB 5220 shrdl rIBASE, %eax 5221 shrl %cl, rIBASE 5222 testb $32, %cl 5223 je 2f 5224 movl rIBASE, %eax 5225 xorl rIBASE, rIBASE 52262: 5227 SET_VREG_HIGH rIBASE, rINST # v[AA+1] <- rIBASE 5228 movl LOCAL0(%esp), rIBASE 5229 SET_VREG %eax, rINST # v[AA+0] <- eax 5230 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5231 5232/* ------------------------------ */ 5233 .balign 128 5234.L_op_add_float_2addr: /* 0xc6 */ 5235/* File: x86/op_add_float_2addr.S */ 5236/* File: x86/sseBinop2Addr.S */ 5237 movzx rINSTbl, %ecx # ecx <- A+ 5238 andl $0xf, %ecx # ecx <- A 5239 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5240 sarl $4, rINST # rINST<- B 5241 addss VREG_ADDRESS(rINST), %xmm0 5242 movss %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5243 pxor %xmm0, %xmm0 5244 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5245 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5246 5247 5248/* ------------------------------ */ 5249 .balign 128 5250.L_op_sub_float_2addr: /* 0xc7 */ 5251/* File: x86/op_sub_float_2addr.S */ 5252/* File: x86/sseBinop2Addr.S */ 5253 movzx rINSTbl, %ecx # ecx <- A+ 5254 andl $0xf, %ecx # ecx <- A 5255 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5256 sarl $4, rINST # rINST<- B 5257 subss VREG_ADDRESS(rINST), %xmm0 5258 movss %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5259 pxor %xmm0, %xmm0 5260 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5261 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5262 5263 5264/* ------------------------------ */ 5265 .balign 128 5266.L_op_mul_float_2addr: /* 0xc8 */ 5267/* File: x86/op_mul_float_2addr.S */ 5268/* File: x86/sseBinop2Addr.S */ 5269 movzx rINSTbl, %ecx # ecx <- A+ 5270 andl $0xf, %ecx # ecx <- A 5271 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5272 sarl $4, rINST # rINST<- B 5273 mulss VREG_ADDRESS(rINST), %xmm0 5274 movss %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5275 pxor %xmm0, %xmm0 5276 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5277 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5278 5279 5280/* ------------------------------ */ 5281 .balign 128 5282.L_op_div_float_2addr: /* 0xc9 */ 5283/* File: x86/op_div_float_2addr.S */ 5284/* File: x86/sseBinop2Addr.S */ 5285 movzx rINSTbl, %ecx # ecx <- A+ 5286 andl $0xf, %ecx # ecx <- A 5287 movss VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5288 sarl $4, rINST # rINST<- B 5289 divss VREG_ADDRESS(rINST), %xmm0 5290 movss %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5291 pxor %xmm0, %xmm0 5292 movss %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5293 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5294 5295 5296/* ------------------------------ */ 5297 .balign 128 5298.L_op_rem_float_2addr: /* 0xca */ 5299/* File: x86/op_rem_float_2addr.S */ 5300 /* rem_float/2addr vA, vB */ 5301 movzx rINSTbl, %ecx # ecx <- A+ 5302 sarl $4, rINST # rINST <- B 5303 flds VREG_ADDRESS(rINST) # vB to fp stack 5304 andb $0xf, %cl # ecx <- A 5305 flds VREG_ADDRESS(%ecx) # vA to fp stack 53061: 5307 fprem 5308 fstsw %ax 5309 sahf 5310 jp 1b 5311 fstp %st(1) 5312 fstps VREG_ADDRESS(%ecx) # %st to vA 5313 CLEAR_REF %ecx 5314 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5315 5316/* ------------------------------ */ 5317 .balign 128 5318.L_op_add_double_2addr: /* 0xcb */ 5319/* File: x86/op_add_double_2addr.S */ 5320/* File: x86/sseBinop2Addr.S */ 5321 movzx rINSTbl, %ecx # ecx <- A+ 5322 andl $0xf, %ecx # ecx <- A 5323 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5324 sarl $4, rINST # rINST<- B 5325 addsd VREG_ADDRESS(rINST), %xmm0 5326 movsd %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5327 pxor %xmm0, %xmm0 5328 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5329 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5330 5331 5332/* ------------------------------ */ 5333 .balign 128 5334.L_op_sub_double_2addr: /* 0xcc */ 5335/* File: x86/op_sub_double_2addr.S */ 5336/* File: x86/sseBinop2Addr.S */ 5337 movzx rINSTbl, %ecx # ecx <- A+ 5338 andl $0xf, %ecx # ecx <- A 5339 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5340 sarl $4, rINST # rINST<- B 5341 subsd VREG_ADDRESS(rINST), %xmm0 5342 movsd %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5343 pxor %xmm0, %xmm0 5344 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5345 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5346 5347 5348/* ------------------------------ */ 5349 .balign 128 5350.L_op_mul_double_2addr: /* 0xcd */ 5351/* File: x86/op_mul_double_2addr.S */ 5352/* File: x86/sseBinop2Addr.S */ 5353 movzx rINSTbl, %ecx # ecx <- A+ 5354 andl $0xf, %ecx # ecx <- A 5355 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5356 sarl $4, rINST # rINST<- B 5357 mulsd VREG_ADDRESS(rINST), %xmm0 5358 movsd %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5359 pxor %xmm0, %xmm0 5360 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5361 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5362 5363 5364/* ------------------------------ */ 5365 .balign 128 5366.L_op_div_double_2addr: /* 0xce */ 5367/* File: x86/op_div_double_2addr.S */ 5368/* File: x86/sseBinop2Addr.S */ 5369 movzx rINSTbl, %ecx # ecx <- A+ 5370 andl $0xf, %ecx # ecx <- A 5371 movsd VREG_ADDRESS(%ecx), %xmm0 # %xmm0 <- 1st src 5372 sarl $4, rINST # rINST<- B 5373 divsd VREG_ADDRESS(rINST), %xmm0 5374 movsd %xmm0, VREG_ADDRESS(%ecx) # vAA<- %xmm0 5375 pxor %xmm0, %xmm0 5376 movsd %xmm0, VREG_REF_ADDRESS(rINST) # clear ref 5377 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5378 5379 5380/* ------------------------------ */ 5381 .balign 128 5382.L_op_rem_double_2addr: /* 0xcf */ 5383/* File: x86/op_rem_double_2addr.S */ 5384 /* rem_double/2addr vA, vB */ 5385 movzx rINSTbl, %ecx # ecx <- A+ 5386 sarl $4, rINST # rINST <- B 5387 fldl VREG_ADDRESS(rINST) # vB to fp stack 5388 andb $0xf, %cl # ecx <- A 5389 fldl VREG_ADDRESS(%ecx) # vA to fp stack 53901: 5391 fprem 5392 fstsw %ax 5393 sahf 5394 jp 1b 5395 fstp %st(1) 5396 fstpl VREG_ADDRESS(%ecx) # %st to vA 5397 CLEAR_WIDE_REF %ecx 5398 ADVANCE_PC_FETCH_AND_GOTO_NEXT 1 5399 5400/* ------------------------------ */ 5401 .balign 128 5402.L_op_add_int_lit16: /* 0xd0 */ 5403/* File: x86/op_add_int_lit16.S */ 5404/* File: x86/binopLit16.S */ 5405/* 5406 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5407 * that specifies an instruction that performs "result = eax op ecx". 5408 * This could be an x86 instruction or a function call. (If the result 5409 * comes back in a register other than eax, you can override "result".) 5410 * 5411 * For: add-int/lit16, rsub-int, 5412 * and-int/lit16, or-int/lit16, xor-int/lit16 5413 */ 5414 /* binop/lit16 vA, vB, #+CCCC */ 5415 movzbl rINSTbl, %eax # eax <- 000000BA 5416 sarl $4, %eax # eax <- B 5417 GET_VREG %eax, %eax # eax <- vB 5418 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5419 andb $0xf, rINSTbl # rINST <- A 5420 addl %ecx, %eax # for example: addl %ecx, %eax 5421 SET_VREG %eax, rINST 5422 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5423 5424 5425/* ------------------------------ */ 5426 .balign 128 5427.L_op_rsub_int: /* 0xd1 */ 5428/* File: x86/op_rsub_int.S */ 5429/* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */ 5430/* File: x86/binopLit16.S */ 5431/* 5432 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5433 * that specifies an instruction that performs "result = eax op ecx". 5434 * This could be an x86 instruction or a function call. (If the result 5435 * comes back in a register other than eax, you can override "result".) 5436 * 5437 * For: add-int/lit16, rsub-int, 5438 * and-int/lit16, or-int/lit16, xor-int/lit16 5439 */ 5440 /* binop/lit16 vA, vB, #+CCCC */ 5441 movzbl rINSTbl, %eax # eax <- 000000BA 5442 sarl $4, %eax # eax <- B 5443 GET_VREG %eax, %eax # eax <- vB 5444 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5445 andb $0xf, rINSTbl # rINST <- A 5446 subl %eax, %ecx # for example: addl %ecx, %eax 5447 SET_VREG %ecx, rINST 5448 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5449 5450 5451/* ------------------------------ */ 5452 .balign 128 5453.L_op_mul_int_lit16: /* 0xd2 */ 5454/* File: x86/op_mul_int_lit16.S */ 5455 /* mul/lit16 vA, vB, #+CCCC */ 5456 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 5457 movzbl rINSTbl, %eax # eax <- 000000BA 5458 sarl $4, %eax # eax <- B 5459 GET_VREG %eax, %eax # eax <- vB 5460 movl rIBASE, %ecx 5461 movswl 2(rPC), rIBASE # rIBASE <- ssssCCCC 5462 andb $0xf, rINSTbl # rINST <- A 5463 imull rIBASE, %eax # trashes rIBASE/edx 5464 movl %ecx, rIBASE 5465 SET_VREG %eax, rINST 5466 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5467 5468/* ------------------------------ */ 5469 .balign 128 5470.L_op_div_int_lit16: /* 0xd3 */ 5471/* File: x86/op_div_int_lit16.S */ 5472/* File: x86/bindivLit16.S */ 5473/* 5474 * 32-bit binary div/rem operation. Handles special case of op0=minint and 5475 * op1=-1. 5476 */ 5477 /* div/rem/lit16 vA, vB, #+CCCC */ 5478 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 5479 movzbl rINSTbl, %eax # eax <- 000000BA 5480 sarl $4, %eax # eax <- B 5481 GET_VREG %eax, %eax # eax <- vB 5482 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5483 andb $0xf, rINSTbl # rINST <- A 5484 testl %ecx, %ecx 5485 je common_errDivideByZero 5486 cmpl $-1, %ecx 5487 jne .Lop_div_int_lit16_continue_div 5488 cmpl $0x80000000, %eax 5489 jne .Lop_div_int_lit16_continue_div 5490 movl $0x80000000, %eax 5491 SET_VREG %eax, rINST 5492 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5493 5494.Lop_div_int_lit16_continue_div: 5495 mov rIBASE, LOCAL0(%esp) 5496 cltd 5497 idivl %ecx 5498 SET_VREG %eax, rINST 5499 mov LOCAL0(%esp), rIBASE 5500 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5501 5502 5503/* ------------------------------ */ 5504 .balign 128 5505.L_op_rem_int_lit16: /* 0xd4 */ 5506/* File: x86/op_rem_int_lit16.S */ 5507/* File: x86/bindivLit16.S */ 5508/* 5509 * 32-bit binary div/rem operation. Handles special case of op0=minint and 5510 * op1=-1. 5511 */ 5512 /* div/rem/lit16 vA, vB, #+CCCC */ 5513 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 5514 movzbl rINSTbl, %eax # eax <- 000000BA 5515 sarl $4, %eax # eax <- B 5516 GET_VREG %eax, %eax # eax <- vB 5517 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5518 andb $0xf, rINSTbl # rINST <- A 5519 testl %ecx, %ecx 5520 je common_errDivideByZero 5521 cmpl $-1, %ecx 5522 jne .Lop_rem_int_lit16_continue_div 5523 cmpl $0x80000000, %eax 5524 jne .Lop_rem_int_lit16_continue_div 5525 movl $0, %eax 5526 SET_VREG %eax, rINST 5527 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5528 5529.Lop_rem_int_lit16_continue_div: 5530 mov rIBASE, LOCAL0(%esp) 5531 cltd 5532 idivl %ecx 5533 SET_VREG rIBASE, rINST 5534 mov LOCAL0(%esp), rIBASE 5535 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5536 5537 5538/* ------------------------------ */ 5539 .balign 128 5540.L_op_and_int_lit16: /* 0xd5 */ 5541/* File: x86/op_and_int_lit16.S */ 5542/* File: x86/binopLit16.S */ 5543/* 5544 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5545 * that specifies an instruction that performs "result = eax op ecx". 5546 * This could be an x86 instruction or a function call. (If the result 5547 * comes back in a register other than eax, you can override "result".) 5548 * 5549 * For: add-int/lit16, rsub-int, 5550 * and-int/lit16, or-int/lit16, xor-int/lit16 5551 */ 5552 /* binop/lit16 vA, vB, #+CCCC */ 5553 movzbl rINSTbl, %eax # eax <- 000000BA 5554 sarl $4, %eax # eax <- B 5555 GET_VREG %eax, %eax # eax <- vB 5556 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5557 andb $0xf, rINSTbl # rINST <- A 5558 andl %ecx, %eax # for example: addl %ecx, %eax 5559 SET_VREG %eax, rINST 5560 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5561 5562 5563/* ------------------------------ */ 5564 .balign 128 5565.L_op_or_int_lit16: /* 0xd6 */ 5566/* File: x86/op_or_int_lit16.S */ 5567/* File: x86/binopLit16.S */ 5568/* 5569 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5570 * that specifies an instruction that performs "result = eax op ecx". 5571 * This could be an x86 instruction or a function call. (If the result 5572 * comes back in a register other than eax, you can override "result".) 5573 * 5574 * For: add-int/lit16, rsub-int, 5575 * and-int/lit16, or-int/lit16, xor-int/lit16 5576 */ 5577 /* binop/lit16 vA, vB, #+CCCC */ 5578 movzbl rINSTbl, %eax # eax <- 000000BA 5579 sarl $4, %eax # eax <- B 5580 GET_VREG %eax, %eax # eax <- vB 5581 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5582 andb $0xf, rINSTbl # rINST <- A 5583 orl %ecx, %eax # for example: addl %ecx, %eax 5584 SET_VREG %eax, rINST 5585 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5586 5587 5588/* ------------------------------ */ 5589 .balign 128 5590.L_op_xor_int_lit16: /* 0xd7 */ 5591/* File: x86/op_xor_int_lit16.S */ 5592/* File: x86/binopLit16.S */ 5593/* 5594 * Generic 32-bit "lit16" binary operation. Provide an "instr" line 5595 * that specifies an instruction that performs "result = eax op ecx". 5596 * This could be an x86 instruction or a function call. (If the result 5597 * comes back in a register other than eax, you can override "result".) 5598 * 5599 * For: add-int/lit16, rsub-int, 5600 * and-int/lit16, or-int/lit16, xor-int/lit16 5601 */ 5602 /* binop/lit16 vA, vB, #+CCCC */ 5603 movzbl rINSTbl, %eax # eax <- 000000BA 5604 sarl $4, %eax # eax <- B 5605 GET_VREG %eax, %eax # eax <- vB 5606 movswl 2(rPC), %ecx # ecx <- ssssCCCC 5607 andb $0xf, rINSTbl # rINST <- A 5608 xorl %ecx, %eax # for example: addl %ecx, %eax 5609 SET_VREG %eax, rINST 5610 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5611 5612 5613/* ------------------------------ */ 5614 .balign 128 5615.L_op_add_int_lit8: /* 0xd8 */ 5616/* File: x86/op_add_int_lit8.S */ 5617/* File: x86/binopLit8.S */ 5618/* 5619 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5620 * that specifies an instruction that performs "result = eax op ecx". 5621 * This could be an x86 instruction or a function call. (If the result 5622 * comes back in a register other than r0, you can override "result".) 5623 * 5624 * For: add-int/lit8, rsub-int/lit8 5625 * and-int/lit8, or-int/lit8, xor-int/lit8, 5626 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5627 */ 5628 /* binop/lit8 vAA, vBB, #+CC */ 5629 movzbl 2(rPC), %eax # eax <- BB 5630 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5631 GET_VREG %eax, %eax # eax <- rBB 5632 addl %ecx, %eax # ex: addl %ecx,%eax 5633 SET_VREG %eax, rINST 5634 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5635 5636 5637/* ------------------------------ */ 5638 .balign 128 5639.L_op_rsub_int_lit8: /* 0xd9 */ 5640/* File: x86/op_rsub_int_lit8.S */ 5641/* File: x86/binopLit8.S */ 5642/* 5643 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5644 * that specifies an instruction that performs "result = eax op ecx". 5645 * This could be an x86 instruction or a function call. (If the result 5646 * comes back in a register other than r0, you can override "result".) 5647 * 5648 * For: add-int/lit8, rsub-int/lit8 5649 * and-int/lit8, or-int/lit8, xor-int/lit8, 5650 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5651 */ 5652 /* binop/lit8 vAA, vBB, #+CC */ 5653 movzbl 2(rPC), %eax # eax <- BB 5654 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5655 GET_VREG %eax, %eax # eax <- rBB 5656 subl %eax, %ecx # ex: addl %ecx,%eax 5657 SET_VREG %ecx, rINST 5658 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5659 5660 5661/* ------------------------------ */ 5662 .balign 128 5663.L_op_mul_int_lit8: /* 0xda */ 5664/* File: x86/op_mul_int_lit8.S */ 5665 /* mul/lit8 vAA, vBB, #+CC */ 5666 movzbl 2(rPC), %eax # eax <- BB 5667 movl rIBASE, %ecx 5668 GET_VREG %eax, %eax # eax <- rBB 5669 movsbl 3(rPC), rIBASE # rIBASE <- ssssssCC 5670 imull rIBASE, %eax # trashes rIBASE/edx 5671 movl %ecx, rIBASE 5672 SET_VREG %eax, rINST 5673 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5674 5675/* ------------------------------ */ 5676 .balign 128 5677.L_op_div_int_lit8: /* 0xdb */ 5678/* File: x86/op_div_int_lit8.S */ 5679/* File: x86/bindivLit8.S */ 5680/* 5681 * 32-bit div/rem "lit8" binary operation. Handles special case of 5682 * op0=minint & op1=-1 5683 */ 5684 /* div/rem/lit8 vAA, vBB, #+CC */ 5685 movzbl 2(rPC), %eax # eax <- BB 5686 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5687 GET_VREG %eax, %eax # eax <- rBB 5688 testl %ecx, %ecx 5689 je common_errDivideByZero 5690 cmpl $0x80000000, %eax 5691 jne .Lop_div_int_lit8_continue_div 5692 cmpl $-1, %ecx 5693 jne .Lop_div_int_lit8_continue_div 5694 movl $0x80000000, %eax 5695 SET_VREG %eax, rINST 5696 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5697 5698.Lop_div_int_lit8_continue_div: 5699 mov rIBASE, LOCAL0(%esp) 5700 cltd 5701 idivl %ecx 5702 SET_VREG %eax, rINST 5703 mov LOCAL0(%esp), rIBASE 5704 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5705 5706 5707/* ------------------------------ */ 5708 .balign 128 5709.L_op_rem_int_lit8: /* 0xdc */ 5710/* File: x86/op_rem_int_lit8.S */ 5711/* File: x86/bindivLit8.S */ 5712/* 5713 * 32-bit div/rem "lit8" binary operation. Handles special case of 5714 * op0=minint & op1=-1 5715 */ 5716 /* div/rem/lit8 vAA, vBB, #+CC */ 5717 movzbl 2(rPC), %eax # eax <- BB 5718 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5719 GET_VREG %eax, %eax # eax <- rBB 5720 testl %ecx, %ecx 5721 je common_errDivideByZero 5722 cmpl $0x80000000, %eax 5723 jne .Lop_rem_int_lit8_continue_div 5724 cmpl $-1, %ecx 5725 jne .Lop_rem_int_lit8_continue_div 5726 movl $0, %eax 5727 SET_VREG %eax, rINST 5728 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5729 5730.Lop_rem_int_lit8_continue_div: 5731 mov rIBASE, LOCAL0(%esp) 5732 cltd 5733 idivl %ecx 5734 SET_VREG rIBASE, rINST 5735 mov LOCAL0(%esp), rIBASE 5736 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5737 5738 5739/* ------------------------------ */ 5740 .balign 128 5741.L_op_and_int_lit8: /* 0xdd */ 5742/* File: x86/op_and_int_lit8.S */ 5743/* File: x86/binopLit8.S */ 5744/* 5745 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5746 * that specifies an instruction that performs "result = eax op ecx". 5747 * This could be an x86 instruction or a function call. (If the result 5748 * comes back in a register other than r0, you can override "result".) 5749 * 5750 * For: add-int/lit8, rsub-int/lit8 5751 * and-int/lit8, or-int/lit8, xor-int/lit8, 5752 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5753 */ 5754 /* binop/lit8 vAA, vBB, #+CC */ 5755 movzbl 2(rPC), %eax # eax <- BB 5756 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5757 GET_VREG %eax, %eax # eax <- rBB 5758 andl %ecx, %eax # ex: addl %ecx,%eax 5759 SET_VREG %eax, rINST 5760 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5761 5762 5763/* ------------------------------ */ 5764 .balign 128 5765.L_op_or_int_lit8: /* 0xde */ 5766/* File: x86/op_or_int_lit8.S */ 5767/* File: x86/binopLit8.S */ 5768/* 5769 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5770 * that specifies an instruction that performs "result = eax op ecx". 5771 * This could be an x86 instruction or a function call. (If the result 5772 * comes back in a register other than r0, you can override "result".) 5773 * 5774 * For: add-int/lit8, rsub-int/lit8 5775 * and-int/lit8, or-int/lit8, xor-int/lit8, 5776 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5777 */ 5778 /* binop/lit8 vAA, vBB, #+CC */ 5779 movzbl 2(rPC), %eax # eax <- BB 5780 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5781 GET_VREG %eax, %eax # eax <- rBB 5782 orl %ecx, %eax # ex: addl %ecx,%eax 5783 SET_VREG %eax, rINST 5784 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5785 5786 5787/* ------------------------------ */ 5788 .balign 128 5789.L_op_xor_int_lit8: /* 0xdf */ 5790/* File: x86/op_xor_int_lit8.S */ 5791/* File: x86/binopLit8.S */ 5792/* 5793 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5794 * that specifies an instruction that performs "result = eax op ecx". 5795 * This could be an x86 instruction or a function call. (If the result 5796 * comes back in a register other than r0, you can override "result".) 5797 * 5798 * For: add-int/lit8, rsub-int/lit8 5799 * and-int/lit8, or-int/lit8, xor-int/lit8, 5800 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5801 */ 5802 /* binop/lit8 vAA, vBB, #+CC */ 5803 movzbl 2(rPC), %eax # eax <- BB 5804 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5805 GET_VREG %eax, %eax # eax <- rBB 5806 xorl %ecx, %eax # ex: addl %ecx,%eax 5807 SET_VREG %eax, rINST 5808 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5809 5810 5811/* ------------------------------ */ 5812 .balign 128 5813.L_op_shl_int_lit8: /* 0xe0 */ 5814/* File: x86/op_shl_int_lit8.S */ 5815/* File: x86/binopLit8.S */ 5816/* 5817 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5818 * that specifies an instruction that performs "result = eax op ecx". 5819 * This could be an x86 instruction or a function call. (If the result 5820 * comes back in a register other than r0, you can override "result".) 5821 * 5822 * For: add-int/lit8, rsub-int/lit8 5823 * and-int/lit8, or-int/lit8, xor-int/lit8, 5824 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5825 */ 5826 /* binop/lit8 vAA, vBB, #+CC */ 5827 movzbl 2(rPC), %eax # eax <- BB 5828 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5829 GET_VREG %eax, %eax # eax <- rBB 5830 sall %cl, %eax # ex: addl %ecx,%eax 5831 SET_VREG %eax, rINST 5832 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5833 5834 5835/* ------------------------------ */ 5836 .balign 128 5837.L_op_shr_int_lit8: /* 0xe1 */ 5838/* File: x86/op_shr_int_lit8.S */ 5839/* File: x86/binopLit8.S */ 5840/* 5841 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5842 * that specifies an instruction that performs "result = eax op ecx". 5843 * This could be an x86 instruction or a function call. (If the result 5844 * comes back in a register other than r0, you can override "result".) 5845 * 5846 * For: add-int/lit8, rsub-int/lit8 5847 * and-int/lit8, or-int/lit8, xor-int/lit8, 5848 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5849 */ 5850 /* binop/lit8 vAA, vBB, #+CC */ 5851 movzbl 2(rPC), %eax # eax <- BB 5852 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5853 GET_VREG %eax, %eax # eax <- rBB 5854 sarl %cl, %eax # ex: addl %ecx,%eax 5855 SET_VREG %eax, rINST 5856 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5857 5858 5859/* ------------------------------ */ 5860 .balign 128 5861.L_op_ushr_int_lit8: /* 0xe2 */ 5862/* File: x86/op_ushr_int_lit8.S */ 5863/* File: x86/binopLit8.S */ 5864/* 5865 * Generic 32-bit "lit8" binary operation. Provide an "instr" line 5866 * that specifies an instruction that performs "result = eax op ecx". 5867 * This could be an x86 instruction or a function call. (If the result 5868 * comes back in a register other than r0, you can override "result".) 5869 * 5870 * For: add-int/lit8, rsub-int/lit8 5871 * and-int/lit8, or-int/lit8, xor-int/lit8, 5872 * shl-int/lit8, shr-int/lit8, ushr-int/lit8 5873 */ 5874 /* binop/lit8 vAA, vBB, #+CC */ 5875 movzbl 2(rPC), %eax # eax <- BB 5876 movsbl 3(rPC), %ecx # ecx <- ssssssCC 5877 GET_VREG %eax, %eax # eax <- rBB 5878 shrl %cl, %eax # ex: addl %ecx,%eax 5879 SET_VREG %eax, rINST 5880 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5881 5882 5883/* ------------------------------ */ 5884 .balign 128 5885.L_op_iget_quick: /* 0xe3 */ 5886/* File: x86/op_iget_quick.S */ 5887 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 5888 /* op vA, vB, offset@CCCC */ 5889 movzbl rINSTbl, %ecx # ecx <- BA 5890 sarl $4, %ecx # ecx <- B 5891 GET_VREG %ecx, %ecx # vB (object we're operating on) 5892 movzwl 2(rPC), %eax # eax <- field byte offset 5893 testl %ecx, %ecx # is object null? 5894 je common_errNullObject 5895 movl (%ecx,%eax,1), %eax 5896 andb $0xf,rINSTbl # rINST <- A 5897 SET_VREG %eax, rINST # fp[A] <- value 5898 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5899 5900/* ------------------------------ */ 5901 .balign 128 5902.L_op_iget_wide_quick: /* 0xe4 */ 5903/* File: x86/op_iget_wide_quick.S */ 5904 /* iget-wide-quick vA, vB, offset@CCCC */ 5905 movzbl rINSTbl, %ecx # ecx <- BA 5906 sarl $4, %ecx # ecx <- B 5907 GET_VREG %ecx, %ecx # vB (object we're operating on) 5908 movzwl 2(rPC), %eax # eax <- field byte offset 5909 testl %ecx, %ecx # is object null? 5910 je common_errNullObject 5911 movq (%ecx,%eax,1), %xmm0 5912 andb $0xf, rINSTbl # rINST <- A 5913 SET_WIDE_FP_VREG %xmm0, rINST 5914 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5915 5916/* ------------------------------ */ 5917 .balign 128 5918.L_op_iget_object_quick: /* 0xe5 */ 5919/* File: x86/op_iget_object_quick.S */ 5920 /* For: iget-object-quick */ 5921 /* op vA, vB, offset@CCCC */ 5922 movzbl rINSTbl, %ecx # ecx <- BA 5923 sarl $4, %ecx # ecx <- B 5924 GET_VREG %ecx, %ecx # vB (object we're operating on) 5925 movzwl 2(rPC), %eax # eax <- field byte offset 5926 movl %ecx, OUT_ARG0(%esp) 5927 movl %eax, OUT_ARG1(%esp) 5928 EXPORT_PC 5929 call SYMBOL(artIGetObjectFromMterp) # (obj, offset) 5930 movl rSELF, %ecx 5931 RESTORE_IBASE_FROM_SELF %ecx 5932 cmpl $0, THREAD_EXCEPTION_OFFSET(%ecx) 5933 jnz MterpException # bail out 5934 andb $0xf,rINSTbl # rINST <- A 5935 SET_VREG_OBJECT %eax, rINST # fp[A] <- value 5936 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5937 5938/* ------------------------------ */ 5939 .balign 128 5940.L_op_iput_quick: /* 0xe6 */ 5941/* File: x86/op_iput_quick.S */ 5942 /* For: iput-quick, iput-object-quick */ 5943 /* op vA, vB, offset@CCCC */ 5944 movzbl rINSTbl, %ecx # ecx <- BA 5945 sarl $4, %ecx # ecx <- B 5946 GET_VREG %ecx, %ecx # vB (object we're operating on) 5947 testl %ecx, %ecx # is object null? 5948 je common_errNullObject 5949 andb $0xf, rINSTbl # rINST <- A 5950 GET_VREG rINST, rINST # rINST <- v[A] 5951 movzwl 2(rPC), %eax # eax <- field byte offset 5952 movl rINST, (%ecx,%eax,1) 5953 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5954 5955/* ------------------------------ */ 5956 .balign 128 5957.L_op_iput_wide_quick: /* 0xe7 */ 5958/* File: x86/op_iput_wide_quick.S */ 5959 /* iput-wide-quick vA, vB, offset@CCCC */ 5960 movzbl rINSTbl, %ecx # ecx<- BA 5961 sarl $4, %ecx # ecx<- B 5962 GET_VREG %ecx, %ecx # vB (object we're operating on) 5963 testl %ecx, %ecx # is object null? 5964 je common_errNullObject 5965 movzwl 2(rPC), %eax # eax<- field byte offset 5966 leal (%ecx,%eax,1), %ecx # ecx<- Address of 64-bit target 5967 andb $0xf, rINSTbl # rINST<- A 5968 GET_WIDE_FP_VREG %xmm0, rINST # xmm0<- fp[A]/fp[A+1] 5969 movq %xmm0, (%ecx) # obj.field<- r0/r1 5970 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5971 5972/* ------------------------------ */ 5973 .balign 128 5974.L_op_iput_object_quick: /* 0xe8 */ 5975/* File: x86/op_iput_object_quick.S */ 5976 EXPORT_PC 5977 leal OFF_FP_SHADOWFRAME(rFP), %eax 5978 movl %eax, OUT_ARG0(%esp) 5979 movl rPC, OUT_ARG1(%esp) 5980 REFRESH_INST 232 5981 movl rINST, OUT_ARG2(%esp) 5982 call SYMBOL(MterpIputObjectQuick) 5983 testb %al, %al 5984 jz MterpException 5985 RESTORE_IBASE 5986 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 5987 5988/* ------------------------------ */ 5989 .balign 128 5990.L_op_invoke_virtual_quick: /* 0xe9 */ 5991/* File: x86/op_invoke_virtual_quick.S */ 5992/* File: x86/invoke.S */ 5993/* 5994 * Generic invoke handler wrapper. 5995 */ 5996 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 5997 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 5998 .extern MterpInvokeVirtualQuick 5999 EXPORT_PC 6000 movl rSELF, %ecx 6001 movl %ecx, OUT_ARG0(%esp) 6002 leal OFF_FP_SHADOWFRAME(rFP), %eax 6003 movl %eax, OUT_ARG1(%esp) 6004 movl rPC, OUT_ARG2(%esp) 6005 REFRESH_INST 233 6006 movl rINST, OUT_ARG3(%esp) 6007 call SYMBOL(MterpInvokeVirtualQuick) 6008 testb %al, %al 6009 jz MterpException 6010 ADVANCE_PC 3 6011 call SYMBOL(MterpShouldSwitchInterpreters) 6012 testb %al, %al 6013 jnz MterpFallback 6014 RESTORE_IBASE 6015 FETCH_INST 6016 GOTO_NEXT 6017 6018 6019/* ------------------------------ */ 6020 .balign 128 6021.L_op_invoke_virtual_range_quick: /* 0xea */ 6022/* File: x86/op_invoke_virtual_range_quick.S */ 6023/* File: x86/invoke.S */ 6024/* 6025 * Generic invoke handler wrapper. 6026 */ 6027 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */ 6028 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 6029 .extern MterpInvokeVirtualQuickRange 6030 EXPORT_PC 6031 movl rSELF, %ecx 6032 movl %ecx, OUT_ARG0(%esp) 6033 leal OFF_FP_SHADOWFRAME(rFP), %eax 6034 movl %eax, OUT_ARG1(%esp) 6035 movl rPC, OUT_ARG2(%esp) 6036 REFRESH_INST 234 6037 movl rINST, OUT_ARG3(%esp) 6038 call SYMBOL(MterpInvokeVirtualQuickRange) 6039 testb %al, %al 6040 jz MterpException 6041 ADVANCE_PC 3 6042 call SYMBOL(MterpShouldSwitchInterpreters) 6043 testb %al, %al 6044 jnz MterpFallback 6045 RESTORE_IBASE 6046 FETCH_INST 6047 GOTO_NEXT 6048 6049 6050/* ------------------------------ */ 6051 .balign 128 6052.L_op_iput_boolean_quick: /* 0xeb */ 6053/* File: x86/op_iput_boolean_quick.S */ 6054/* File: x86/op_iput_quick.S */ 6055 /* For: iput-quick, iput-object-quick */ 6056 /* op vA, vB, offset@CCCC */ 6057 movzbl rINSTbl, %ecx # ecx <- BA 6058 sarl $4, %ecx # ecx <- B 6059 GET_VREG %ecx, %ecx # vB (object we're operating on) 6060 testl %ecx, %ecx # is object null? 6061 je common_errNullObject 6062 andb $0xf, rINSTbl # rINST <- A 6063 GET_VREG rINST, rINST # rINST <- v[A] 6064 movzwl 2(rPC), %eax # eax <- field byte offset 6065 movb rINSTbl, (%ecx,%eax,1) 6066 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6067 6068 6069/* ------------------------------ */ 6070 .balign 128 6071.L_op_iput_byte_quick: /* 0xec */ 6072/* File: x86/op_iput_byte_quick.S */ 6073/* File: x86/op_iput_quick.S */ 6074 /* For: iput-quick, iput-object-quick */ 6075 /* op vA, vB, offset@CCCC */ 6076 movzbl rINSTbl, %ecx # ecx <- BA 6077 sarl $4, %ecx # ecx <- B 6078 GET_VREG %ecx, %ecx # vB (object we're operating on) 6079 testl %ecx, %ecx # is object null? 6080 je common_errNullObject 6081 andb $0xf, rINSTbl # rINST <- A 6082 GET_VREG rINST, rINST # rINST <- v[A] 6083 movzwl 2(rPC), %eax # eax <- field byte offset 6084 movb rINSTbl, (%ecx,%eax,1) 6085 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6086 6087 6088/* ------------------------------ */ 6089 .balign 128 6090.L_op_iput_char_quick: /* 0xed */ 6091/* File: x86/op_iput_char_quick.S */ 6092/* File: x86/op_iput_quick.S */ 6093 /* For: iput-quick, iput-object-quick */ 6094 /* op vA, vB, offset@CCCC */ 6095 movzbl rINSTbl, %ecx # ecx <- BA 6096 sarl $4, %ecx # ecx <- B 6097 GET_VREG %ecx, %ecx # vB (object we're operating on) 6098 testl %ecx, %ecx # is object null? 6099 je common_errNullObject 6100 andb $0xf, rINSTbl # rINST <- A 6101 GET_VREG rINST, rINST # rINST <- v[A] 6102 movzwl 2(rPC), %eax # eax <- field byte offset 6103 movw rINSTw, (%ecx,%eax,1) 6104 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6105 6106 6107/* ------------------------------ */ 6108 .balign 128 6109.L_op_iput_short_quick: /* 0xee */ 6110/* File: x86/op_iput_short_quick.S */ 6111/* File: x86/op_iput_quick.S */ 6112 /* For: iput-quick, iput-object-quick */ 6113 /* op vA, vB, offset@CCCC */ 6114 movzbl rINSTbl, %ecx # ecx <- BA 6115 sarl $4, %ecx # ecx <- B 6116 GET_VREG %ecx, %ecx # vB (object we're operating on) 6117 testl %ecx, %ecx # is object null? 6118 je common_errNullObject 6119 andb $0xf, rINSTbl # rINST <- A 6120 GET_VREG rINST, rINST # rINST <- v[A] 6121 movzwl 2(rPC), %eax # eax <- field byte offset 6122 movw rINSTw, (%ecx,%eax,1) 6123 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6124 6125 6126/* ------------------------------ */ 6127 .balign 128 6128.L_op_iget_boolean_quick: /* 0xef */ 6129/* File: x86/op_iget_boolean_quick.S */ 6130/* File: x86/op_iget_quick.S */ 6131 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 6132 /* op vA, vB, offset@CCCC */ 6133 movzbl rINSTbl, %ecx # ecx <- BA 6134 sarl $4, %ecx # ecx <- B 6135 GET_VREG %ecx, %ecx # vB (object we're operating on) 6136 movzwl 2(rPC), %eax # eax <- field byte offset 6137 testl %ecx, %ecx # is object null? 6138 je common_errNullObject 6139 movsbl (%ecx,%eax,1), %eax 6140 andb $0xf,rINSTbl # rINST <- A 6141 SET_VREG %eax, rINST # fp[A] <- value 6142 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6143 6144 6145/* ------------------------------ */ 6146 .balign 128 6147.L_op_iget_byte_quick: /* 0xf0 */ 6148/* File: x86/op_iget_byte_quick.S */ 6149/* File: x86/op_iget_quick.S */ 6150 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 6151 /* op vA, vB, offset@CCCC */ 6152 movzbl rINSTbl, %ecx # ecx <- BA 6153 sarl $4, %ecx # ecx <- B 6154 GET_VREG %ecx, %ecx # vB (object we're operating on) 6155 movzwl 2(rPC), %eax # eax <- field byte offset 6156 testl %ecx, %ecx # is object null? 6157 je common_errNullObject 6158 movsbl (%ecx,%eax,1), %eax 6159 andb $0xf,rINSTbl # rINST <- A 6160 SET_VREG %eax, rINST # fp[A] <- value 6161 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6162 6163 6164/* ------------------------------ */ 6165 .balign 128 6166.L_op_iget_char_quick: /* 0xf1 */ 6167/* File: x86/op_iget_char_quick.S */ 6168/* File: x86/op_iget_quick.S */ 6169 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 6170 /* op vA, vB, offset@CCCC */ 6171 movzbl rINSTbl, %ecx # ecx <- BA 6172 sarl $4, %ecx # ecx <- B 6173 GET_VREG %ecx, %ecx # vB (object we're operating on) 6174 movzwl 2(rPC), %eax # eax <- field byte offset 6175 testl %ecx, %ecx # is object null? 6176 je common_errNullObject 6177 movzwl (%ecx,%eax,1), %eax 6178 andb $0xf,rINSTbl # rINST <- A 6179 SET_VREG %eax, rINST # fp[A] <- value 6180 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6181 6182 6183/* ------------------------------ */ 6184 .balign 128 6185.L_op_iget_short_quick: /* 0xf2 */ 6186/* File: x86/op_iget_short_quick.S */ 6187/* File: x86/op_iget_quick.S */ 6188 /* For: iget-quick, iget-boolean-quick, iget-byte-quick, iget-char-quick, iget-short-quick */ 6189 /* op vA, vB, offset@CCCC */ 6190 movzbl rINSTbl, %ecx # ecx <- BA 6191 sarl $4, %ecx # ecx <- B 6192 GET_VREG %ecx, %ecx # vB (object we're operating on) 6193 movzwl 2(rPC), %eax # eax <- field byte offset 6194 testl %ecx, %ecx # is object null? 6195 je common_errNullObject 6196 movswl (%ecx,%eax,1), %eax 6197 andb $0xf,rINSTbl # rINST <- A 6198 SET_VREG %eax, rINST # fp[A] <- value 6199 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 6200 6201 6202/* ------------------------------ */ 6203 .balign 128 6204.L_op_invoke_lambda: /* 0xf3 */ 6205/* Transfer stub to alternate interpreter */ 6206 jmp MterpFallback 6207 6208 6209/* ------------------------------ */ 6210 .balign 128 6211.L_op_unused_f4: /* 0xf4 */ 6212/* File: x86/op_unused_f4.S */ 6213/* File: x86/unused.S */ 6214/* 6215 * Bail to reference interpreter to throw. 6216 */ 6217 jmp MterpFallback 6218 6219 6220/* ------------------------------ */ 6221 .balign 128 6222.L_op_capture_variable: /* 0xf5 */ 6223/* Transfer stub to alternate interpreter */ 6224 jmp MterpFallback 6225 6226 6227/* ------------------------------ */ 6228 .balign 128 6229.L_op_create_lambda: /* 0xf6 */ 6230/* Transfer stub to alternate interpreter */ 6231 jmp MterpFallback 6232 6233 6234/* ------------------------------ */ 6235 .balign 128 6236.L_op_liberate_variable: /* 0xf7 */ 6237/* Transfer stub to alternate interpreter */ 6238 jmp MterpFallback 6239 6240 6241/* ------------------------------ */ 6242 .balign 128 6243.L_op_box_lambda: /* 0xf8 */ 6244/* Transfer stub to alternate interpreter */ 6245 jmp MterpFallback 6246 6247 6248/* ------------------------------ */ 6249 .balign 128 6250.L_op_unbox_lambda: /* 0xf9 */ 6251/* Transfer stub to alternate interpreter */ 6252 jmp MterpFallback 6253 6254 6255/* ------------------------------ */ 6256 .balign 128 6257.L_op_unused_fa: /* 0xfa */ 6258/* File: x86/op_unused_fa.S */ 6259/* File: x86/unused.S */ 6260/* 6261 * Bail to reference interpreter to throw. 6262 */ 6263 jmp MterpFallback 6264 6265 6266/* ------------------------------ */ 6267 .balign 128 6268.L_op_unused_fb: /* 0xfb */ 6269/* File: x86/op_unused_fb.S */ 6270/* File: x86/unused.S */ 6271/* 6272 * Bail to reference interpreter to throw. 6273 */ 6274 jmp MterpFallback 6275 6276 6277/* ------------------------------ */ 6278 .balign 128 6279.L_op_unused_fc: /* 0xfc */ 6280/* File: x86/op_unused_fc.S */ 6281/* File: x86/unused.S */ 6282/* 6283 * Bail to reference interpreter to throw. 6284 */ 6285 jmp MterpFallback 6286 6287 6288/* ------------------------------ */ 6289 .balign 128 6290.L_op_unused_fd: /* 0xfd */ 6291/* File: x86/op_unused_fd.S */ 6292/* File: x86/unused.S */ 6293/* 6294 * Bail to reference interpreter to throw. 6295 */ 6296 jmp MterpFallback 6297 6298 6299/* ------------------------------ */ 6300 .balign 128 6301.L_op_unused_fe: /* 0xfe */ 6302/* File: x86/op_unused_fe.S */ 6303/* File: x86/unused.S */ 6304/* 6305 * Bail to reference interpreter to throw. 6306 */ 6307 jmp MterpFallback 6308 6309 6310/* ------------------------------ */ 6311 .balign 128 6312.L_op_unused_ff: /* 0xff */ 6313/* File: x86/op_unused_ff.S */ 6314/* File: x86/unused.S */ 6315/* 6316 * Bail to reference interpreter to throw. 6317 */ 6318 jmp MterpFallback 6319 6320 6321 .balign 128 6322 SIZE(SYMBOL(artMterpAsmInstructionStart),SYMBOL(artMterpAsmInstructionStart)) 6323 .global SYMBOL(artMterpAsmInstructionEnd) 6324SYMBOL(artMterpAsmInstructionEnd): 6325 6326/* 6327 * =========================================================================== 6328 * Sister implementations 6329 * =========================================================================== 6330 */ 6331 .global SYMBOL(artMterpAsmSisterStart) 6332 FUNCTION_TYPE(SYMBOL(artMterpAsmSisterStart)) 6333 .text 6334 .balign 4 6335SYMBOL(artMterpAsmSisterStart): 6336 6337 SIZE(SYMBOL(artMterpAsmSisterStart),SYMBOL(artMterpAsmSisterStart)) 6338 .global SYMBOL(artMterpAsmSisterEnd) 6339SYMBOL(artMterpAsmSisterEnd): 6340 6341 6342 .global SYMBOL(artMterpAsmAltInstructionStart) 6343 FUNCTION_TYPE(SYMBOL(artMterpAsmAltInstructionStart)) 6344 .text 6345 6346SYMBOL(artMterpAsmAltInstructionStart) = .L_ALT_op_nop 6347/* ------------------------------ */ 6348 .balign 128 6349.L_ALT_op_nop: /* 0x00 */ 6350/* File: x86/alt_stub.S */ 6351/* 6352 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6353 * any interesting requests and then jump to the real instruction 6354 * handler. Unlike the Arm handler, we can't do this as a tail call 6355 * because rIBASE is caller save and we need to reload it. 6356 * 6357 * Note that unlike in the Arm implementation, we should never arrive 6358 * here with a zero breakFlag because we always refresh rIBASE on 6359 * return. 6360 */ 6361 .extern MterpCheckBefore 6362 EXPORT_PC 6363 6364 movl rSELF, %ecx 6365 movl %ecx, OUT_ARG0(%esp) 6366 leal OFF_FP_SHADOWFRAME(rFP), %eax 6367 movl %eax, OUT_ARG1(%esp) 6368 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6369 REFRESH_IBASE 6370 jmp .L_op_nop+(0*128) 6371 6372/* ------------------------------ */ 6373 .balign 128 6374.L_ALT_op_move: /* 0x01 */ 6375/* File: x86/alt_stub.S */ 6376/* 6377 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6378 * any interesting requests and then jump to the real instruction 6379 * handler. Unlike the Arm handler, we can't do this as a tail call 6380 * because rIBASE is caller save and we need to reload it. 6381 * 6382 * Note that unlike in the Arm implementation, we should never arrive 6383 * here with a zero breakFlag because we always refresh rIBASE on 6384 * return. 6385 */ 6386 .extern MterpCheckBefore 6387 EXPORT_PC 6388 6389 movl rSELF, %ecx 6390 movl %ecx, OUT_ARG0(%esp) 6391 leal OFF_FP_SHADOWFRAME(rFP), %eax 6392 movl %eax, OUT_ARG1(%esp) 6393 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6394 REFRESH_IBASE 6395 jmp .L_op_nop+(1*128) 6396 6397/* ------------------------------ */ 6398 .balign 128 6399.L_ALT_op_move_from16: /* 0x02 */ 6400/* File: x86/alt_stub.S */ 6401/* 6402 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6403 * any interesting requests and then jump to the real instruction 6404 * handler. Unlike the Arm handler, we can't do this as a tail call 6405 * because rIBASE is caller save and we need to reload it. 6406 * 6407 * Note that unlike in the Arm implementation, we should never arrive 6408 * here with a zero breakFlag because we always refresh rIBASE on 6409 * return. 6410 */ 6411 .extern MterpCheckBefore 6412 EXPORT_PC 6413 6414 movl rSELF, %ecx 6415 movl %ecx, OUT_ARG0(%esp) 6416 leal OFF_FP_SHADOWFRAME(rFP), %eax 6417 movl %eax, OUT_ARG1(%esp) 6418 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6419 REFRESH_IBASE 6420 jmp .L_op_nop+(2*128) 6421 6422/* ------------------------------ */ 6423 .balign 128 6424.L_ALT_op_move_16: /* 0x03 */ 6425/* File: x86/alt_stub.S */ 6426/* 6427 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6428 * any interesting requests and then jump to the real instruction 6429 * handler. Unlike the Arm handler, we can't do this as a tail call 6430 * because rIBASE is caller save and we need to reload it. 6431 * 6432 * Note that unlike in the Arm implementation, we should never arrive 6433 * here with a zero breakFlag because we always refresh rIBASE on 6434 * return. 6435 */ 6436 .extern MterpCheckBefore 6437 EXPORT_PC 6438 6439 movl rSELF, %ecx 6440 movl %ecx, OUT_ARG0(%esp) 6441 leal OFF_FP_SHADOWFRAME(rFP), %eax 6442 movl %eax, OUT_ARG1(%esp) 6443 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6444 REFRESH_IBASE 6445 jmp .L_op_nop+(3*128) 6446 6447/* ------------------------------ */ 6448 .balign 128 6449.L_ALT_op_move_wide: /* 0x04 */ 6450/* File: x86/alt_stub.S */ 6451/* 6452 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6453 * any interesting requests and then jump to the real instruction 6454 * handler. Unlike the Arm handler, we can't do this as a tail call 6455 * because rIBASE is caller save and we need to reload it. 6456 * 6457 * Note that unlike in the Arm implementation, we should never arrive 6458 * here with a zero breakFlag because we always refresh rIBASE on 6459 * return. 6460 */ 6461 .extern MterpCheckBefore 6462 EXPORT_PC 6463 6464 movl rSELF, %ecx 6465 movl %ecx, OUT_ARG0(%esp) 6466 leal OFF_FP_SHADOWFRAME(rFP), %eax 6467 movl %eax, OUT_ARG1(%esp) 6468 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6469 REFRESH_IBASE 6470 jmp .L_op_nop+(4*128) 6471 6472/* ------------------------------ */ 6473 .balign 128 6474.L_ALT_op_move_wide_from16: /* 0x05 */ 6475/* File: x86/alt_stub.S */ 6476/* 6477 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6478 * any interesting requests and then jump to the real instruction 6479 * handler. Unlike the Arm handler, we can't do this as a tail call 6480 * because rIBASE is caller save and we need to reload it. 6481 * 6482 * Note that unlike in the Arm implementation, we should never arrive 6483 * here with a zero breakFlag because we always refresh rIBASE on 6484 * return. 6485 */ 6486 .extern MterpCheckBefore 6487 EXPORT_PC 6488 6489 movl rSELF, %ecx 6490 movl %ecx, OUT_ARG0(%esp) 6491 leal OFF_FP_SHADOWFRAME(rFP), %eax 6492 movl %eax, OUT_ARG1(%esp) 6493 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6494 REFRESH_IBASE 6495 jmp .L_op_nop+(5*128) 6496 6497/* ------------------------------ */ 6498 .balign 128 6499.L_ALT_op_move_wide_16: /* 0x06 */ 6500/* File: x86/alt_stub.S */ 6501/* 6502 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6503 * any interesting requests and then jump to the real instruction 6504 * handler. Unlike the Arm handler, we can't do this as a tail call 6505 * because rIBASE is caller save and we need to reload it. 6506 * 6507 * Note that unlike in the Arm implementation, we should never arrive 6508 * here with a zero breakFlag because we always refresh rIBASE on 6509 * return. 6510 */ 6511 .extern MterpCheckBefore 6512 EXPORT_PC 6513 6514 movl rSELF, %ecx 6515 movl %ecx, OUT_ARG0(%esp) 6516 leal OFF_FP_SHADOWFRAME(rFP), %eax 6517 movl %eax, OUT_ARG1(%esp) 6518 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6519 REFRESH_IBASE 6520 jmp .L_op_nop+(6*128) 6521 6522/* ------------------------------ */ 6523 .balign 128 6524.L_ALT_op_move_object: /* 0x07 */ 6525/* File: x86/alt_stub.S */ 6526/* 6527 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6528 * any interesting requests and then jump to the real instruction 6529 * handler. Unlike the Arm handler, we can't do this as a tail call 6530 * because rIBASE is caller save and we need to reload it. 6531 * 6532 * Note that unlike in the Arm implementation, we should never arrive 6533 * here with a zero breakFlag because we always refresh rIBASE on 6534 * return. 6535 */ 6536 .extern MterpCheckBefore 6537 EXPORT_PC 6538 6539 movl rSELF, %ecx 6540 movl %ecx, OUT_ARG0(%esp) 6541 leal OFF_FP_SHADOWFRAME(rFP), %eax 6542 movl %eax, OUT_ARG1(%esp) 6543 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6544 REFRESH_IBASE 6545 jmp .L_op_nop+(7*128) 6546 6547/* ------------------------------ */ 6548 .balign 128 6549.L_ALT_op_move_object_from16: /* 0x08 */ 6550/* File: x86/alt_stub.S */ 6551/* 6552 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6553 * any interesting requests and then jump to the real instruction 6554 * handler. Unlike the Arm handler, we can't do this as a tail call 6555 * because rIBASE is caller save and we need to reload it. 6556 * 6557 * Note that unlike in the Arm implementation, we should never arrive 6558 * here with a zero breakFlag because we always refresh rIBASE on 6559 * return. 6560 */ 6561 .extern MterpCheckBefore 6562 EXPORT_PC 6563 6564 movl rSELF, %ecx 6565 movl %ecx, OUT_ARG0(%esp) 6566 leal OFF_FP_SHADOWFRAME(rFP), %eax 6567 movl %eax, OUT_ARG1(%esp) 6568 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6569 REFRESH_IBASE 6570 jmp .L_op_nop+(8*128) 6571 6572/* ------------------------------ */ 6573 .balign 128 6574.L_ALT_op_move_object_16: /* 0x09 */ 6575/* File: x86/alt_stub.S */ 6576/* 6577 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6578 * any interesting requests and then jump to the real instruction 6579 * handler. Unlike the Arm handler, we can't do this as a tail call 6580 * because rIBASE is caller save and we need to reload it. 6581 * 6582 * Note that unlike in the Arm implementation, we should never arrive 6583 * here with a zero breakFlag because we always refresh rIBASE on 6584 * return. 6585 */ 6586 .extern MterpCheckBefore 6587 EXPORT_PC 6588 6589 movl rSELF, %ecx 6590 movl %ecx, OUT_ARG0(%esp) 6591 leal OFF_FP_SHADOWFRAME(rFP), %eax 6592 movl %eax, OUT_ARG1(%esp) 6593 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6594 REFRESH_IBASE 6595 jmp .L_op_nop+(9*128) 6596 6597/* ------------------------------ */ 6598 .balign 128 6599.L_ALT_op_move_result: /* 0x0a */ 6600/* File: x86/alt_stub.S */ 6601/* 6602 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6603 * any interesting requests and then jump to the real instruction 6604 * handler. Unlike the Arm handler, we can't do this as a tail call 6605 * because rIBASE is caller save and we need to reload it. 6606 * 6607 * Note that unlike in the Arm implementation, we should never arrive 6608 * here with a zero breakFlag because we always refresh rIBASE on 6609 * return. 6610 */ 6611 .extern MterpCheckBefore 6612 EXPORT_PC 6613 6614 movl rSELF, %ecx 6615 movl %ecx, OUT_ARG0(%esp) 6616 leal OFF_FP_SHADOWFRAME(rFP), %eax 6617 movl %eax, OUT_ARG1(%esp) 6618 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6619 REFRESH_IBASE 6620 jmp .L_op_nop+(10*128) 6621 6622/* ------------------------------ */ 6623 .balign 128 6624.L_ALT_op_move_result_wide: /* 0x0b */ 6625/* File: x86/alt_stub.S */ 6626/* 6627 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6628 * any interesting requests and then jump to the real instruction 6629 * handler. Unlike the Arm handler, we can't do this as a tail call 6630 * because rIBASE is caller save and we need to reload it. 6631 * 6632 * Note that unlike in the Arm implementation, we should never arrive 6633 * here with a zero breakFlag because we always refresh rIBASE on 6634 * return. 6635 */ 6636 .extern MterpCheckBefore 6637 EXPORT_PC 6638 6639 movl rSELF, %ecx 6640 movl %ecx, OUT_ARG0(%esp) 6641 leal OFF_FP_SHADOWFRAME(rFP), %eax 6642 movl %eax, OUT_ARG1(%esp) 6643 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6644 REFRESH_IBASE 6645 jmp .L_op_nop+(11*128) 6646 6647/* ------------------------------ */ 6648 .balign 128 6649.L_ALT_op_move_result_object: /* 0x0c */ 6650/* File: x86/alt_stub.S */ 6651/* 6652 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6653 * any interesting requests and then jump to the real instruction 6654 * handler. Unlike the Arm handler, we can't do this as a tail call 6655 * because rIBASE is caller save and we need to reload it. 6656 * 6657 * Note that unlike in the Arm implementation, we should never arrive 6658 * here with a zero breakFlag because we always refresh rIBASE on 6659 * return. 6660 */ 6661 .extern MterpCheckBefore 6662 EXPORT_PC 6663 6664 movl rSELF, %ecx 6665 movl %ecx, OUT_ARG0(%esp) 6666 leal OFF_FP_SHADOWFRAME(rFP), %eax 6667 movl %eax, OUT_ARG1(%esp) 6668 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6669 REFRESH_IBASE 6670 jmp .L_op_nop+(12*128) 6671 6672/* ------------------------------ */ 6673 .balign 128 6674.L_ALT_op_move_exception: /* 0x0d */ 6675/* File: x86/alt_stub.S */ 6676/* 6677 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6678 * any interesting requests and then jump to the real instruction 6679 * handler. Unlike the Arm handler, we can't do this as a tail call 6680 * because rIBASE is caller save and we need to reload it. 6681 * 6682 * Note that unlike in the Arm implementation, we should never arrive 6683 * here with a zero breakFlag because we always refresh rIBASE on 6684 * return. 6685 */ 6686 .extern MterpCheckBefore 6687 EXPORT_PC 6688 6689 movl rSELF, %ecx 6690 movl %ecx, OUT_ARG0(%esp) 6691 leal OFF_FP_SHADOWFRAME(rFP), %eax 6692 movl %eax, OUT_ARG1(%esp) 6693 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6694 REFRESH_IBASE 6695 jmp .L_op_nop+(13*128) 6696 6697/* ------------------------------ */ 6698 .balign 128 6699.L_ALT_op_return_void: /* 0x0e */ 6700/* File: x86/alt_stub.S */ 6701/* 6702 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6703 * any interesting requests and then jump to the real instruction 6704 * handler. Unlike the Arm handler, we can't do this as a tail call 6705 * because rIBASE is caller save and we need to reload it. 6706 * 6707 * Note that unlike in the Arm implementation, we should never arrive 6708 * here with a zero breakFlag because we always refresh rIBASE on 6709 * return. 6710 */ 6711 .extern MterpCheckBefore 6712 EXPORT_PC 6713 6714 movl rSELF, %ecx 6715 movl %ecx, OUT_ARG0(%esp) 6716 leal OFF_FP_SHADOWFRAME(rFP), %eax 6717 movl %eax, OUT_ARG1(%esp) 6718 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6719 REFRESH_IBASE 6720 jmp .L_op_nop+(14*128) 6721 6722/* ------------------------------ */ 6723 .balign 128 6724.L_ALT_op_return: /* 0x0f */ 6725/* File: x86/alt_stub.S */ 6726/* 6727 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6728 * any interesting requests and then jump to the real instruction 6729 * handler. Unlike the Arm handler, we can't do this as a tail call 6730 * because rIBASE is caller save and we need to reload it. 6731 * 6732 * Note that unlike in the Arm implementation, we should never arrive 6733 * here with a zero breakFlag because we always refresh rIBASE on 6734 * return. 6735 */ 6736 .extern MterpCheckBefore 6737 EXPORT_PC 6738 6739 movl rSELF, %ecx 6740 movl %ecx, OUT_ARG0(%esp) 6741 leal OFF_FP_SHADOWFRAME(rFP), %eax 6742 movl %eax, OUT_ARG1(%esp) 6743 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6744 REFRESH_IBASE 6745 jmp .L_op_nop+(15*128) 6746 6747/* ------------------------------ */ 6748 .balign 128 6749.L_ALT_op_return_wide: /* 0x10 */ 6750/* File: x86/alt_stub.S */ 6751/* 6752 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6753 * any interesting requests and then jump to the real instruction 6754 * handler. Unlike the Arm handler, we can't do this as a tail call 6755 * because rIBASE is caller save and we need to reload it. 6756 * 6757 * Note that unlike in the Arm implementation, we should never arrive 6758 * here with a zero breakFlag because we always refresh rIBASE on 6759 * return. 6760 */ 6761 .extern MterpCheckBefore 6762 EXPORT_PC 6763 6764 movl rSELF, %ecx 6765 movl %ecx, OUT_ARG0(%esp) 6766 leal OFF_FP_SHADOWFRAME(rFP), %eax 6767 movl %eax, OUT_ARG1(%esp) 6768 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6769 REFRESH_IBASE 6770 jmp .L_op_nop+(16*128) 6771 6772/* ------------------------------ */ 6773 .balign 128 6774.L_ALT_op_return_object: /* 0x11 */ 6775/* File: x86/alt_stub.S */ 6776/* 6777 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6778 * any interesting requests and then jump to the real instruction 6779 * handler. Unlike the Arm handler, we can't do this as a tail call 6780 * because rIBASE is caller save and we need to reload it. 6781 * 6782 * Note that unlike in the Arm implementation, we should never arrive 6783 * here with a zero breakFlag because we always refresh rIBASE on 6784 * return. 6785 */ 6786 .extern MterpCheckBefore 6787 EXPORT_PC 6788 6789 movl rSELF, %ecx 6790 movl %ecx, OUT_ARG0(%esp) 6791 leal OFF_FP_SHADOWFRAME(rFP), %eax 6792 movl %eax, OUT_ARG1(%esp) 6793 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6794 REFRESH_IBASE 6795 jmp .L_op_nop+(17*128) 6796 6797/* ------------------------------ */ 6798 .balign 128 6799.L_ALT_op_const_4: /* 0x12 */ 6800/* File: x86/alt_stub.S */ 6801/* 6802 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6803 * any interesting requests and then jump to the real instruction 6804 * handler. Unlike the Arm handler, we can't do this as a tail call 6805 * because rIBASE is caller save and we need to reload it. 6806 * 6807 * Note that unlike in the Arm implementation, we should never arrive 6808 * here with a zero breakFlag because we always refresh rIBASE on 6809 * return. 6810 */ 6811 .extern MterpCheckBefore 6812 EXPORT_PC 6813 6814 movl rSELF, %ecx 6815 movl %ecx, OUT_ARG0(%esp) 6816 leal OFF_FP_SHADOWFRAME(rFP), %eax 6817 movl %eax, OUT_ARG1(%esp) 6818 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6819 REFRESH_IBASE 6820 jmp .L_op_nop+(18*128) 6821 6822/* ------------------------------ */ 6823 .balign 128 6824.L_ALT_op_const_16: /* 0x13 */ 6825/* File: x86/alt_stub.S */ 6826/* 6827 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6828 * any interesting requests and then jump to the real instruction 6829 * handler. Unlike the Arm handler, we can't do this as a tail call 6830 * because rIBASE is caller save and we need to reload it. 6831 * 6832 * Note that unlike in the Arm implementation, we should never arrive 6833 * here with a zero breakFlag because we always refresh rIBASE on 6834 * return. 6835 */ 6836 .extern MterpCheckBefore 6837 EXPORT_PC 6838 6839 movl rSELF, %ecx 6840 movl %ecx, OUT_ARG0(%esp) 6841 leal OFF_FP_SHADOWFRAME(rFP), %eax 6842 movl %eax, OUT_ARG1(%esp) 6843 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6844 REFRESH_IBASE 6845 jmp .L_op_nop+(19*128) 6846 6847/* ------------------------------ */ 6848 .balign 128 6849.L_ALT_op_const: /* 0x14 */ 6850/* File: x86/alt_stub.S */ 6851/* 6852 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6853 * any interesting requests and then jump to the real instruction 6854 * handler. Unlike the Arm handler, we can't do this as a tail call 6855 * because rIBASE is caller save and we need to reload it. 6856 * 6857 * Note that unlike in the Arm implementation, we should never arrive 6858 * here with a zero breakFlag because we always refresh rIBASE on 6859 * return. 6860 */ 6861 .extern MterpCheckBefore 6862 EXPORT_PC 6863 6864 movl rSELF, %ecx 6865 movl %ecx, OUT_ARG0(%esp) 6866 leal OFF_FP_SHADOWFRAME(rFP), %eax 6867 movl %eax, OUT_ARG1(%esp) 6868 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6869 REFRESH_IBASE 6870 jmp .L_op_nop+(20*128) 6871 6872/* ------------------------------ */ 6873 .balign 128 6874.L_ALT_op_const_high16: /* 0x15 */ 6875/* File: x86/alt_stub.S */ 6876/* 6877 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6878 * any interesting requests and then jump to the real instruction 6879 * handler. Unlike the Arm handler, we can't do this as a tail call 6880 * because rIBASE is caller save and we need to reload it. 6881 * 6882 * Note that unlike in the Arm implementation, we should never arrive 6883 * here with a zero breakFlag because we always refresh rIBASE on 6884 * return. 6885 */ 6886 .extern MterpCheckBefore 6887 EXPORT_PC 6888 6889 movl rSELF, %ecx 6890 movl %ecx, OUT_ARG0(%esp) 6891 leal OFF_FP_SHADOWFRAME(rFP), %eax 6892 movl %eax, OUT_ARG1(%esp) 6893 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6894 REFRESH_IBASE 6895 jmp .L_op_nop+(21*128) 6896 6897/* ------------------------------ */ 6898 .balign 128 6899.L_ALT_op_const_wide_16: /* 0x16 */ 6900/* File: x86/alt_stub.S */ 6901/* 6902 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6903 * any interesting requests and then jump to the real instruction 6904 * handler. Unlike the Arm handler, we can't do this as a tail call 6905 * because rIBASE is caller save and we need to reload it. 6906 * 6907 * Note that unlike in the Arm implementation, we should never arrive 6908 * here with a zero breakFlag because we always refresh rIBASE on 6909 * return. 6910 */ 6911 .extern MterpCheckBefore 6912 EXPORT_PC 6913 6914 movl rSELF, %ecx 6915 movl %ecx, OUT_ARG0(%esp) 6916 leal OFF_FP_SHADOWFRAME(rFP), %eax 6917 movl %eax, OUT_ARG1(%esp) 6918 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6919 REFRESH_IBASE 6920 jmp .L_op_nop+(22*128) 6921 6922/* ------------------------------ */ 6923 .balign 128 6924.L_ALT_op_const_wide_32: /* 0x17 */ 6925/* File: x86/alt_stub.S */ 6926/* 6927 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6928 * any interesting requests and then jump to the real instruction 6929 * handler. Unlike the Arm handler, we can't do this as a tail call 6930 * because rIBASE is caller save and we need to reload it. 6931 * 6932 * Note that unlike in the Arm implementation, we should never arrive 6933 * here with a zero breakFlag because we always refresh rIBASE on 6934 * return. 6935 */ 6936 .extern MterpCheckBefore 6937 EXPORT_PC 6938 6939 movl rSELF, %ecx 6940 movl %ecx, OUT_ARG0(%esp) 6941 leal OFF_FP_SHADOWFRAME(rFP), %eax 6942 movl %eax, OUT_ARG1(%esp) 6943 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6944 REFRESH_IBASE 6945 jmp .L_op_nop+(23*128) 6946 6947/* ------------------------------ */ 6948 .balign 128 6949.L_ALT_op_const_wide: /* 0x18 */ 6950/* File: x86/alt_stub.S */ 6951/* 6952 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6953 * any interesting requests and then jump to the real instruction 6954 * handler. Unlike the Arm handler, we can't do this as a tail call 6955 * because rIBASE is caller save and we need to reload it. 6956 * 6957 * Note that unlike in the Arm implementation, we should never arrive 6958 * here with a zero breakFlag because we always refresh rIBASE on 6959 * return. 6960 */ 6961 .extern MterpCheckBefore 6962 EXPORT_PC 6963 6964 movl rSELF, %ecx 6965 movl %ecx, OUT_ARG0(%esp) 6966 leal OFF_FP_SHADOWFRAME(rFP), %eax 6967 movl %eax, OUT_ARG1(%esp) 6968 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6969 REFRESH_IBASE 6970 jmp .L_op_nop+(24*128) 6971 6972/* ------------------------------ */ 6973 .balign 128 6974.L_ALT_op_const_wide_high16: /* 0x19 */ 6975/* File: x86/alt_stub.S */ 6976/* 6977 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 6978 * any interesting requests and then jump to the real instruction 6979 * handler. Unlike the Arm handler, we can't do this as a tail call 6980 * because rIBASE is caller save and we need to reload it. 6981 * 6982 * Note that unlike in the Arm implementation, we should never arrive 6983 * here with a zero breakFlag because we always refresh rIBASE on 6984 * return. 6985 */ 6986 .extern MterpCheckBefore 6987 EXPORT_PC 6988 6989 movl rSELF, %ecx 6990 movl %ecx, OUT_ARG0(%esp) 6991 leal OFF_FP_SHADOWFRAME(rFP), %eax 6992 movl %eax, OUT_ARG1(%esp) 6993 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 6994 REFRESH_IBASE 6995 jmp .L_op_nop+(25*128) 6996 6997/* ------------------------------ */ 6998 .balign 128 6999.L_ALT_op_const_string: /* 0x1a */ 7000/* File: x86/alt_stub.S */ 7001/* 7002 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7003 * any interesting requests and then jump to the real instruction 7004 * handler. Unlike the Arm handler, we can't do this as a tail call 7005 * because rIBASE is caller save and we need to reload it. 7006 * 7007 * Note that unlike in the Arm implementation, we should never arrive 7008 * here with a zero breakFlag because we always refresh rIBASE on 7009 * return. 7010 */ 7011 .extern MterpCheckBefore 7012 EXPORT_PC 7013 7014 movl rSELF, %ecx 7015 movl %ecx, OUT_ARG0(%esp) 7016 leal OFF_FP_SHADOWFRAME(rFP), %eax 7017 movl %eax, OUT_ARG1(%esp) 7018 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7019 REFRESH_IBASE 7020 jmp .L_op_nop+(26*128) 7021 7022/* ------------------------------ */ 7023 .balign 128 7024.L_ALT_op_const_string_jumbo: /* 0x1b */ 7025/* File: x86/alt_stub.S */ 7026/* 7027 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7028 * any interesting requests and then jump to the real instruction 7029 * handler. Unlike the Arm handler, we can't do this as a tail call 7030 * because rIBASE is caller save and we need to reload it. 7031 * 7032 * Note that unlike in the Arm implementation, we should never arrive 7033 * here with a zero breakFlag because we always refresh rIBASE on 7034 * return. 7035 */ 7036 .extern MterpCheckBefore 7037 EXPORT_PC 7038 7039 movl rSELF, %ecx 7040 movl %ecx, OUT_ARG0(%esp) 7041 leal OFF_FP_SHADOWFRAME(rFP), %eax 7042 movl %eax, OUT_ARG1(%esp) 7043 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7044 REFRESH_IBASE 7045 jmp .L_op_nop+(27*128) 7046 7047/* ------------------------------ */ 7048 .balign 128 7049.L_ALT_op_const_class: /* 0x1c */ 7050/* File: x86/alt_stub.S */ 7051/* 7052 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7053 * any interesting requests and then jump to the real instruction 7054 * handler. Unlike the Arm handler, we can't do this as a tail call 7055 * because rIBASE is caller save and we need to reload it. 7056 * 7057 * Note that unlike in the Arm implementation, we should never arrive 7058 * here with a zero breakFlag because we always refresh rIBASE on 7059 * return. 7060 */ 7061 .extern MterpCheckBefore 7062 EXPORT_PC 7063 7064 movl rSELF, %ecx 7065 movl %ecx, OUT_ARG0(%esp) 7066 leal OFF_FP_SHADOWFRAME(rFP), %eax 7067 movl %eax, OUT_ARG1(%esp) 7068 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7069 REFRESH_IBASE 7070 jmp .L_op_nop+(28*128) 7071 7072/* ------------------------------ */ 7073 .balign 128 7074.L_ALT_op_monitor_enter: /* 0x1d */ 7075/* File: x86/alt_stub.S */ 7076/* 7077 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7078 * any interesting requests and then jump to the real instruction 7079 * handler. Unlike the Arm handler, we can't do this as a tail call 7080 * because rIBASE is caller save and we need to reload it. 7081 * 7082 * Note that unlike in the Arm implementation, we should never arrive 7083 * here with a zero breakFlag because we always refresh rIBASE on 7084 * return. 7085 */ 7086 .extern MterpCheckBefore 7087 EXPORT_PC 7088 7089 movl rSELF, %ecx 7090 movl %ecx, OUT_ARG0(%esp) 7091 leal OFF_FP_SHADOWFRAME(rFP), %eax 7092 movl %eax, OUT_ARG1(%esp) 7093 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7094 REFRESH_IBASE 7095 jmp .L_op_nop+(29*128) 7096 7097/* ------------------------------ */ 7098 .balign 128 7099.L_ALT_op_monitor_exit: /* 0x1e */ 7100/* File: x86/alt_stub.S */ 7101/* 7102 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7103 * any interesting requests and then jump to the real instruction 7104 * handler. Unlike the Arm handler, we can't do this as a tail call 7105 * because rIBASE is caller save and we need to reload it. 7106 * 7107 * Note that unlike in the Arm implementation, we should never arrive 7108 * here with a zero breakFlag because we always refresh rIBASE on 7109 * return. 7110 */ 7111 .extern MterpCheckBefore 7112 EXPORT_PC 7113 7114 movl rSELF, %ecx 7115 movl %ecx, OUT_ARG0(%esp) 7116 leal OFF_FP_SHADOWFRAME(rFP), %eax 7117 movl %eax, OUT_ARG1(%esp) 7118 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7119 REFRESH_IBASE 7120 jmp .L_op_nop+(30*128) 7121 7122/* ------------------------------ */ 7123 .balign 128 7124.L_ALT_op_check_cast: /* 0x1f */ 7125/* File: x86/alt_stub.S */ 7126/* 7127 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7128 * any interesting requests and then jump to the real instruction 7129 * handler. Unlike the Arm handler, we can't do this as a tail call 7130 * because rIBASE is caller save and we need to reload it. 7131 * 7132 * Note that unlike in the Arm implementation, we should never arrive 7133 * here with a zero breakFlag because we always refresh rIBASE on 7134 * return. 7135 */ 7136 .extern MterpCheckBefore 7137 EXPORT_PC 7138 7139 movl rSELF, %ecx 7140 movl %ecx, OUT_ARG0(%esp) 7141 leal OFF_FP_SHADOWFRAME(rFP), %eax 7142 movl %eax, OUT_ARG1(%esp) 7143 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7144 REFRESH_IBASE 7145 jmp .L_op_nop+(31*128) 7146 7147/* ------------------------------ */ 7148 .balign 128 7149.L_ALT_op_instance_of: /* 0x20 */ 7150/* File: x86/alt_stub.S */ 7151/* 7152 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7153 * any interesting requests and then jump to the real instruction 7154 * handler. Unlike the Arm handler, we can't do this as a tail call 7155 * because rIBASE is caller save and we need to reload it. 7156 * 7157 * Note that unlike in the Arm implementation, we should never arrive 7158 * here with a zero breakFlag because we always refresh rIBASE on 7159 * return. 7160 */ 7161 .extern MterpCheckBefore 7162 EXPORT_PC 7163 7164 movl rSELF, %ecx 7165 movl %ecx, OUT_ARG0(%esp) 7166 leal OFF_FP_SHADOWFRAME(rFP), %eax 7167 movl %eax, OUT_ARG1(%esp) 7168 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7169 REFRESH_IBASE 7170 jmp .L_op_nop+(32*128) 7171 7172/* ------------------------------ */ 7173 .balign 128 7174.L_ALT_op_array_length: /* 0x21 */ 7175/* File: x86/alt_stub.S */ 7176/* 7177 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7178 * any interesting requests and then jump to the real instruction 7179 * handler. Unlike the Arm handler, we can't do this as a tail call 7180 * because rIBASE is caller save and we need to reload it. 7181 * 7182 * Note that unlike in the Arm implementation, we should never arrive 7183 * here with a zero breakFlag because we always refresh rIBASE on 7184 * return. 7185 */ 7186 .extern MterpCheckBefore 7187 EXPORT_PC 7188 7189 movl rSELF, %ecx 7190 movl %ecx, OUT_ARG0(%esp) 7191 leal OFF_FP_SHADOWFRAME(rFP), %eax 7192 movl %eax, OUT_ARG1(%esp) 7193 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7194 REFRESH_IBASE 7195 jmp .L_op_nop+(33*128) 7196 7197/* ------------------------------ */ 7198 .balign 128 7199.L_ALT_op_new_instance: /* 0x22 */ 7200/* File: x86/alt_stub.S */ 7201/* 7202 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7203 * any interesting requests and then jump to the real instruction 7204 * handler. Unlike the Arm handler, we can't do this as a tail call 7205 * because rIBASE is caller save and we need to reload it. 7206 * 7207 * Note that unlike in the Arm implementation, we should never arrive 7208 * here with a zero breakFlag because we always refresh rIBASE on 7209 * return. 7210 */ 7211 .extern MterpCheckBefore 7212 EXPORT_PC 7213 7214 movl rSELF, %ecx 7215 movl %ecx, OUT_ARG0(%esp) 7216 leal OFF_FP_SHADOWFRAME(rFP), %eax 7217 movl %eax, OUT_ARG1(%esp) 7218 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7219 REFRESH_IBASE 7220 jmp .L_op_nop+(34*128) 7221 7222/* ------------------------------ */ 7223 .balign 128 7224.L_ALT_op_new_array: /* 0x23 */ 7225/* File: x86/alt_stub.S */ 7226/* 7227 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7228 * any interesting requests and then jump to the real instruction 7229 * handler. Unlike the Arm handler, we can't do this as a tail call 7230 * because rIBASE is caller save and we need to reload it. 7231 * 7232 * Note that unlike in the Arm implementation, we should never arrive 7233 * here with a zero breakFlag because we always refresh rIBASE on 7234 * return. 7235 */ 7236 .extern MterpCheckBefore 7237 EXPORT_PC 7238 7239 movl rSELF, %ecx 7240 movl %ecx, OUT_ARG0(%esp) 7241 leal OFF_FP_SHADOWFRAME(rFP), %eax 7242 movl %eax, OUT_ARG1(%esp) 7243 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7244 REFRESH_IBASE 7245 jmp .L_op_nop+(35*128) 7246 7247/* ------------------------------ */ 7248 .balign 128 7249.L_ALT_op_filled_new_array: /* 0x24 */ 7250/* File: x86/alt_stub.S */ 7251/* 7252 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7253 * any interesting requests and then jump to the real instruction 7254 * handler. Unlike the Arm handler, we can't do this as a tail call 7255 * because rIBASE is caller save and we need to reload it. 7256 * 7257 * Note that unlike in the Arm implementation, we should never arrive 7258 * here with a zero breakFlag because we always refresh rIBASE on 7259 * return. 7260 */ 7261 .extern MterpCheckBefore 7262 EXPORT_PC 7263 7264 movl rSELF, %ecx 7265 movl %ecx, OUT_ARG0(%esp) 7266 leal OFF_FP_SHADOWFRAME(rFP), %eax 7267 movl %eax, OUT_ARG1(%esp) 7268 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7269 REFRESH_IBASE 7270 jmp .L_op_nop+(36*128) 7271 7272/* ------------------------------ */ 7273 .balign 128 7274.L_ALT_op_filled_new_array_range: /* 0x25 */ 7275/* File: x86/alt_stub.S */ 7276/* 7277 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7278 * any interesting requests and then jump to the real instruction 7279 * handler. Unlike the Arm handler, we can't do this as a tail call 7280 * because rIBASE is caller save and we need to reload it. 7281 * 7282 * Note that unlike in the Arm implementation, we should never arrive 7283 * here with a zero breakFlag because we always refresh rIBASE on 7284 * return. 7285 */ 7286 .extern MterpCheckBefore 7287 EXPORT_PC 7288 7289 movl rSELF, %ecx 7290 movl %ecx, OUT_ARG0(%esp) 7291 leal OFF_FP_SHADOWFRAME(rFP), %eax 7292 movl %eax, OUT_ARG1(%esp) 7293 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7294 REFRESH_IBASE 7295 jmp .L_op_nop+(37*128) 7296 7297/* ------------------------------ */ 7298 .balign 128 7299.L_ALT_op_fill_array_data: /* 0x26 */ 7300/* File: x86/alt_stub.S */ 7301/* 7302 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7303 * any interesting requests and then jump to the real instruction 7304 * handler. Unlike the Arm handler, we can't do this as a tail call 7305 * because rIBASE is caller save and we need to reload it. 7306 * 7307 * Note that unlike in the Arm implementation, we should never arrive 7308 * here with a zero breakFlag because we always refresh rIBASE on 7309 * return. 7310 */ 7311 .extern MterpCheckBefore 7312 EXPORT_PC 7313 7314 movl rSELF, %ecx 7315 movl %ecx, OUT_ARG0(%esp) 7316 leal OFF_FP_SHADOWFRAME(rFP), %eax 7317 movl %eax, OUT_ARG1(%esp) 7318 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7319 REFRESH_IBASE 7320 jmp .L_op_nop+(38*128) 7321 7322/* ------------------------------ */ 7323 .balign 128 7324.L_ALT_op_throw: /* 0x27 */ 7325/* File: x86/alt_stub.S */ 7326/* 7327 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7328 * any interesting requests and then jump to the real instruction 7329 * handler. Unlike the Arm handler, we can't do this as a tail call 7330 * because rIBASE is caller save and we need to reload it. 7331 * 7332 * Note that unlike in the Arm implementation, we should never arrive 7333 * here with a zero breakFlag because we always refresh rIBASE on 7334 * return. 7335 */ 7336 .extern MterpCheckBefore 7337 EXPORT_PC 7338 7339 movl rSELF, %ecx 7340 movl %ecx, OUT_ARG0(%esp) 7341 leal OFF_FP_SHADOWFRAME(rFP), %eax 7342 movl %eax, OUT_ARG1(%esp) 7343 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7344 REFRESH_IBASE 7345 jmp .L_op_nop+(39*128) 7346 7347/* ------------------------------ */ 7348 .balign 128 7349.L_ALT_op_goto: /* 0x28 */ 7350/* File: x86/alt_stub.S */ 7351/* 7352 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7353 * any interesting requests and then jump to the real instruction 7354 * handler. Unlike the Arm handler, we can't do this as a tail call 7355 * because rIBASE is caller save and we need to reload it. 7356 * 7357 * Note that unlike in the Arm implementation, we should never arrive 7358 * here with a zero breakFlag because we always refresh rIBASE on 7359 * return. 7360 */ 7361 .extern MterpCheckBefore 7362 EXPORT_PC 7363 7364 movl rSELF, %ecx 7365 movl %ecx, OUT_ARG0(%esp) 7366 leal OFF_FP_SHADOWFRAME(rFP), %eax 7367 movl %eax, OUT_ARG1(%esp) 7368 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7369 REFRESH_IBASE 7370 jmp .L_op_nop+(40*128) 7371 7372/* ------------------------------ */ 7373 .balign 128 7374.L_ALT_op_goto_16: /* 0x29 */ 7375/* File: x86/alt_stub.S */ 7376/* 7377 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7378 * any interesting requests and then jump to the real instruction 7379 * handler. Unlike the Arm handler, we can't do this as a tail call 7380 * because rIBASE is caller save and we need to reload it. 7381 * 7382 * Note that unlike in the Arm implementation, we should never arrive 7383 * here with a zero breakFlag because we always refresh rIBASE on 7384 * return. 7385 */ 7386 .extern MterpCheckBefore 7387 EXPORT_PC 7388 7389 movl rSELF, %ecx 7390 movl %ecx, OUT_ARG0(%esp) 7391 leal OFF_FP_SHADOWFRAME(rFP), %eax 7392 movl %eax, OUT_ARG1(%esp) 7393 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7394 REFRESH_IBASE 7395 jmp .L_op_nop+(41*128) 7396 7397/* ------------------------------ */ 7398 .balign 128 7399.L_ALT_op_goto_32: /* 0x2a */ 7400/* File: x86/alt_stub.S */ 7401/* 7402 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7403 * any interesting requests and then jump to the real instruction 7404 * handler. Unlike the Arm handler, we can't do this as a tail call 7405 * because rIBASE is caller save and we need to reload it. 7406 * 7407 * Note that unlike in the Arm implementation, we should never arrive 7408 * here with a zero breakFlag because we always refresh rIBASE on 7409 * return. 7410 */ 7411 .extern MterpCheckBefore 7412 EXPORT_PC 7413 7414 movl rSELF, %ecx 7415 movl %ecx, OUT_ARG0(%esp) 7416 leal OFF_FP_SHADOWFRAME(rFP), %eax 7417 movl %eax, OUT_ARG1(%esp) 7418 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7419 REFRESH_IBASE 7420 jmp .L_op_nop+(42*128) 7421 7422/* ------------------------------ */ 7423 .balign 128 7424.L_ALT_op_packed_switch: /* 0x2b */ 7425/* File: x86/alt_stub.S */ 7426/* 7427 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7428 * any interesting requests and then jump to the real instruction 7429 * handler. Unlike the Arm handler, we can't do this as a tail call 7430 * because rIBASE is caller save and we need to reload it. 7431 * 7432 * Note that unlike in the Arm implementation, we should never arrive 7433 * here with a zero breakFlag because we always refresh rIBASE on 7434 * return. 7435 */ 7436 .extern MterpCheckBefore 7437 EXPORT_PC 7438 7439 movl rSELF, %ecx 7440 movl %ecx, OUT_ARG0(%esp) 7441 leal OFF_FP_SHADOWFRAME(rFP), %eax 7442 movl %eax, OUT_ARG1(%esp) 7443 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7444 REFRESH_IBASE 7445 jmp .L_op_nop+(43*128) 7446 7447/* ------------------------------ */ 7448 .balign 128 7449.L_ALT_op_sparse_switch: /* 0x2c */ 7450/* File: x86/alt_stub.S */ 7451/* 7452 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7453 * any interesting requests and then jump to the real instruction 7454 * handler. Unlike the Arm handler, we can't do this as a tail call 7455 * because rIBASE is caller save and we need to reload it. 7456 * 7457 * Note that unlike in the Arm implementation, we should never arrive 7458 * here with a zero breakFlag because we always refresh rIBASE on 7459 * return. 7460 */ 7461 .extern MterpCheckBefore 7462 EXPORT_PC 7463 7464 movl rSELF, %ecx 7465 movl %ecx, OUT_ARG0(%esp) 7466 leal OFF_FP_SHADOWFRAME(rFP), %eax 7467 movl %eax, OUT_ARG1(%esp) 7468 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7469 REFRESH_IBASE 7470 jmp .L_op_nop+(44*128) 7471 7472/* ------------------------------ */ 7473 .balign 128 7474.L_ALT_op_cmpl_float: /* 0x2d */ 7475/* File: x86/alt_stub.S */ 7476/* 7477 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7478 * any interesting requests and then jump to the real instruction 7479 * handler. Unlike the Arm handler, we can't do this as a tail call 7480 * because rIBASE is caller save and we need to reload it. 7481 * 7482 * Note that unlike in the Arm implementation, we should never arrive 7483 * here with a zero breakFlag because we always refresh rIBASE on 7484 * return. 7485 */ 7486 .extern MterpCheckBefore 7487 EXPORT_PC 7488 7489 movl rSELF, %ecx 7490 movl %ecx, OUT_ARG0(%esp) 7491 leal OFF_FP_SHADOWFRAME(rFP), %eax 7492 movl %eax, OUT_ARG1(%esp) 7493 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7494 REFRESH_IBASE 7495 jmp .L_op_nop+(45*128) 7496 7497/* ------------------------------ */ 7498 .balign 128 7499.L_ALT_op_cmpg_float: /* 0x2e */ 7500/* File: x86/alt_stub.S */ 7501/* 7502 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7503 * any interesting requests and then jump to the real instruction 7504 * handler. Unlike the Arm handler, we can't do this as a tail call 7505 * because rIBASE is caller save and we need to reload it. 7506 * 7507 * Note that unlike in the Arm implementation, we should never arrive 7508 * here with a zero breakFlag because we always refresh rIBASE on 7509 * return. 7510 */ 7511 .extern MterpCheckBefore 7512 EXPORT_PC 7513 7514 movl rSELF, %ecx 7515 movl %ecx, OUT_ARG0(%esp) 7516 leal OFF_FP_SHADOWFRAME(rFP), %eax 7517 movl %eax, OUT_ARG1(%esp) 7518 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7519 REFRESH_IBASE 7520 jmp .L_op_nop+(46*128) 7521 7522/* ------------------------------ */ 7523 .balign 128 7524.L_ALT_op_cmpl_double: /* 0x2f */ 7525/* File: x86/alt_stub.S */ 7526/* 7527 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7528 * any interesting requests and then jump to the real instruction 7529 * handler. Unlike the Arm handler, we can't do this as a tail call 7530 * because rIBASE is caller save and we need to reload it. 7531 * 7532 * Note that unlike in the Arm implementation, we should never arrive 7533 * here with a zero breakFlag because we always refresh rIBASE on 7534 * return. 7535 */ 7536 .extern MterpCheckBefore 7537 EXPORT_PC 7538 7539 movl rSELF, %ecx 7540 movl %ecx, OUT_ARG0(%esp) 7541 leal OFF_FP_SHADOWFRAME(rFP), %eax 7542 movl %eax, OUT_ARG1(%esp) 7543 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7544 REFRESH_IBASE 7545 jmp .L_op_nop+(47*128) 7546 7547/* ------------------------------ */ 7548 .balign 128 7549.L_ALT_op_cmpg_double: /* 0x30 */ 7550/* File: x86/alt_stub.S */ 7551/* 7552 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7553 * any interesting requests and then jump to the real instruction 7554 * handler. Unlike the Arm handler, we can't do this as a tail call 7555 * because rIBASE is caller save and we need to reload it. 7556 * 7557 * Note that unlike in the Arm implementation, we should never arrive 7558 * here with a zero breakFlag because we always refresh rIBASE on 7559 * return. 7560 */ 7561 .extern MterpCheckBefore 7562 EXPORT_PC 7563 7564 movl rSELF, %ecx 7565 movl %ecx, OUT_ARG0(%esp) 7566 leal OFF_FP_SHADOWFRAME(rFP), %eax 7567 movl %eax, OUT_ARG1(%esp) 7568 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7569 REFRESH_IBASE 7570 jmp .L_op_nop+(48*128) 7571 7572/* ------------------------------ */ 7573 .balign 128 7574.L_ALT_op_cmp_long: /* 0x31 */ 7575/* File: x86/alt_stub.S */ 7576/* 7577 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7578 * any interesting requests and then jump to the real instruction 7579 * handler. Unlike the Arm handler, we can't do this as a tail call 7580 * because rIBASE is caller save and we need to reload it. 7581 * 7582 * Note that unlike in the Arm implementation, we should never arrive 7583 * here with a zero breakFlag because we always refresh rIBASE on 7584 * return. 7585 */ 7586 .extern MterpCheckBefore 7587 EXPORT_PC 7588 7589 movl rSELF, %ecx 7590 movl %ecx, OUT_ARG0(%esp) 7591 leal OFF_FP_SHADOWFRAME(rFP), %eax 7592 movl %eax, OUT_ARG1(%esp) 7593 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7594 REFRESH_IBASE 7595 jmp .L_op_nop+(49*128) 7596 7597/* ------------------------------ */ 7598 .balign 128 7599.L_ALT_op_if_eq: /* 0x32 */ 7600/* File: x86/alt_stub.S */ 7601/* 7602 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7603 * any interesting requests and then jump to the real instruction 7604 * handler. Unlike the Arm handler, we can't do this as a tail call 7605 * because rIBASE is caller save and we need to reload it. 7606 * 7607 * Note that unlike in the Arm implementation, we should never arrive 7608 * here with a zero breakFlag because we always refresh rIBASE on 7609 * return. 7610 */ 7611 .extern MterpCheckBefore 7612 EXPORT_PC 7613 7614 movl rSELF, %ecx 7615 movl %ecx, OUT_ARG0(%esp) 7616 leal OFF_FP_SHADOWFRAME(rFP), %eax 7617 movl %eax, OUT_ARG1(%esp) 7618 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7619 REFRESH_IBASE 7620 jmp .L_op_nop+(50*128) 7621 7622/* ------------------------------ */ 7623 .balign 128 7624.L_ALT_op_if_ne: /* 0x33 */ 7625/* File: x86/alt_stub.S */ 7626/* 7627 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7628 * any interesting requests and then jump to the real instruction 7629 * handler. Unlike the Arm handler, we can't do this as a tail call 7630 * because rIBASE is caller save and we need to reload it. 7631 * 7632 * Note that unlike in the Arm implementation, we should never arrive 7633 * here with a zero breakFlag because we always refresh rIBASE on 7634 * return. 7635 */ 7636 .extern MterpCheckBefore 7637 EXPORT_PC 7638 7639 movl rSELF, %ecx 7640 movl %ecx, OUT_ARG0(%esp) 7641 leal OFF_FP_SHADOWFRAME(rFP), %eax 7642 movl %eax, OUT_ARG1(%esp) 7643 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7644 REFRESH_IBASE 7645 jmp .L_op_nop+(51*128) 7646 7647/* ------------------------------ */ 7648 .balign 128 7649.L_ALT_op_if_lt: /* 0x34 */ 7650/* File: x86/alt_stub.S */ 7651/* 7652 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7653 * any interesting requests and then jump to the real instruction 7654 * handler. Unlike the Arm handler, we can't do this as a tail call 7655 * because rIBASE is caller save and we need to reload it. 7656 * 7657 * Note that unlike in the Arm implementation, we should never arrive 7658 * here with a zero breakFlag because we always refresh rIBASE on 7659 * return. 7660 */ 7661 .extern MterpCheckBefore 7662 EXPORT_PC 7663 7664 movl rSELF, %ecx 7665 movl %ecx, OUT_ARG0(%esp) 7666 leal OFF_FP_SHADOWFRAME(rFP), %eax 7667 movl %eax, OUT_ARG1(%esp) 7668 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7669 REFRESH_IBASE 7670 jmp .L_op_nop+(52*128) 7671 7672/* ------------------------------ */ 7673 .balign 128 7674.L_ALT_op_if_ge: /* 0x35 */ 7675/* File: x86/alt_stub.S */ 7676/* 7677 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7678 * any interesting requests and then jump to the real instruction 7679 * handler. Unlike the Arm handler, we can't do this as a tail call 7680 * because rIBASE is caller save and we need to reload it. 7681 * 7682 * Note that unlike in the Arm implementation, we should never arrive 7683 * here with a zero breakFlag because we always refresh rIBASE on 7684 * return. 7685 */ 7686 .extern MterpCheckBefore 7687 EXPORT_PC 7688 7689 movl rSELF, %ecx 7690 movl %ecx, OUT_ARG0(%esp) 7691 leal OFF_FP_SHADOWFRAME(rFP), %eax 7692 movl %eax, OUT_ARG1(%esp) 7693 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7694 REFRESH_IBASE 7695 jmp .L_op_nop+(53*128) 7696 7697/* ------------------------------ */ 7698 .balign 128 7699.L_ALT_op_if_gt: /* 0x36 */ 7700/* File: x86/alt_stub.S */ 7701/* 7702 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7703 * any interesting requests and then jump to the real instruction 7704 * handler. Unlike the Arm handler, we can't do this as a tail call 7705 * because rIBASE is caller save and we need to reload it. 7706 * 7707 * Note that unlike in the Arm implementation, we should never arrive 7708 * here with a zero breakFlag because we always refresh rIBASE on 7709 * return. 7710 */ 7711 .extern MterpCheckBefore 7712 EXPORT_PC 7713 7714 movl rSELF, %ecx 7715 movl %ecx, OUT_ARG0(%esp) 7716 leal OFF_FP_SHADOWFRAME(rFP), %eax 7717 movl %eax, OUT_ARG1(%esp) 7718 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7719 REFRESH_IBASE 7720 jmp .L_op_nop+(54*128) 7721 7722/* ------------------------------ */ 7723 .balign 128 7724.L_ALT_op_if_le: /* 0x37 */ 7725/* File: x86/alt_stub.S */ 7726/* 7727 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7728 * any interesting requests and then jump to the real instruction 7729 * handler. Unlike the Arm handler, we can't do this as a tail call 7730 * because rIBASE is caller save and we need to reload it. 7731 * 7732 * Note that unlike in the Arm implementation, we should never arrive 7733 * here with a zero breakFlag because we always refresh rIBASE on 7734 * return. 7735 */ 7736 .extern MterpCheckBefore 7737 EXPORT_PC 7738 7739 movl rSELF, %ecx 7740 movl %ecx, OUT_ARG0(%esp) 7741 leal OFF_FP_SHADOWFRAME(rFP), %eax 7742 movl %eax, OUT_ARG1(%esp) 7743 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7744 REFRESH_IBASE 7745 jmp .L_op_nop+(55*128) 7746 7747/* ------------------------------ */ 7748 .balign 128 7749.L_ALT_op_if_eqz: /* 0x38 */ 7750/* File: x86/alt_stub.S */ 7751/* 7752 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7753 * any interesting requests and then jump to the real instruction 7754 * handler. Unlike the Arm handler, we can't do this as a tail call 7755 * because rIBASE is caller save and we need to reload it. 7756 * 7757 * Note that unlike in the Arm implementation, we should never arrive 7758 * here with a zero breakFlag because we always refresh rIBASE on 7759 * return. 7760 */ 7761 .extern MterpCheckBefore 7762 EXPORT_PC 7763 7764 movl rSELF, %ecx 7765 movl %ecx, OUT_ARG0(%esp) 7766 leal OFF_FP_SHADOWFRAME(rFP), %eax 7767 movl %eax, OUT_ARG1(%esp) 7768 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7769 REFRESH_IBASE 7770 jmp .L_op_nop+(56*128) 7771 7772/* ------------------------------ */ 7773 .balign 128 7774.L_ALT_op_if_nez: /* 0x39 */ 7775/* File: x86/alt_stub.S */ 7776/* 7777 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7778 * any interesting requests and then jump to the real instruction 7779 * handler. Unlike the Arm handler, we can't do this as a tail call 7780 * because rIBASE is caller save and we need to reload it. 7781 * 7782 * Note that unlike in the Arm implementation, we should never arrive 7783 * here with a zero breakFlag because we always refresh rIBASE on 7784 * return. 7785 */ 7786 .extern MterpCheckBefore 7787 EXPORT_PC 7788 7789 movl rSELF, %ecx 7790 movl %ecx, OUT_ARG0(%esp) 7791 leal OFF_FP_SHADOWFRAME(rFP), %eax 7792 movl %eax, OUT_ARG1(%esp) 7793 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7794 REFRESH_IBASE 7795 jmp .L_op_nop+(57*128) 7796 7797/* ------------------------------ */ 7798 .balign 128 7799.L_ALT_op_if_ltz: /* 0x3a */ 7800/* File: x86/alt_stub.S */ 7801/* 7802 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7803 * any interesting requests and then jump to the real instruction 7804 * handler. Unlike the Arm handler, we can't do this as a tail call 7805 * because rIBASE is caller save and we need to reload it. 7806 * 7807 * Note that unlike in the Arm implementation, we should never arrive 7808 * here with a zero breakFlag because we always refresh rIBASE on 7809 * return. 7810 */ 7811 .extern MterpCheckBefore 7812 EXPORT_PC 7813 7814 movl rSELF, %ecx 7815 movl %ecx, OUT_ARG0(%esp) 7816 leal OFF_FP_SHADOWFRAME(rFP), %eax 7817 movl %eax, OUT_ARG1(%esp) 7818 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7819 REFRESH_IBASE 7820 jmp .L_op_nop+(58*128) 7821 7822/* ------------------------------ */ 7823 .balign 128 7824.L_ALT_op_if_gez: /* 0x3b */ 7825/* File: x86/alt_stub.S */ 7826/* 7827 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7828 * any interesting requests and then jump to the real instruction 7829 * handler. Unlike the Arm handler, we can't do this as a tail call 7830 * because rIBASE is caller save and we need to reload it. 7831 * 7832 * Note that unlike in the Arm implementation, we should never arrive 7833 * here with a zero breakFlag because we always refresh rIBASE on 7834 * return. 7835 */ 7836 .extern MterpCheckBefore 7837 EXPORT_PC 7838 7839 movl rSELF, %ecx 7840 movl %ecx, OUT_ARG0(%esp) 7841 leal OFF_FP_SHADOWFRAME(rFP), %eax 7842 movl %eax, OUT_ARG1(%esp) 7843 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7844 REFRESH_IBASE 7845 jmp .L_op_nop+(59*128) 7846 7847/* ------------------------------ */ 7848 .balign 128 7849.L_ALT_op_if_gtz: /* 0x3c */ 7850/* File: x86/alt_stub.S */ 7851/* 7852 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7853 * any interesting requests and then jump to the real instruction 7854 * handler. Unlike the Arm handler, we can't do this as a tail call 7855 * because rIBASE is caller save and we need to reload it. 7856 * 7857 * Note that unlike in the Arm implementation, we should never arrive 7858 * here with a zero breakFlag because we always refresh rIBASE on 7859 * return. 7860 */ 7861 .extern MterpCheckBefore 7862 EXPORT_PC 7863 7864 movl rSELF, %ecx 7865 movl %ecx, OUT_ARG0(%esp) 7866 leal OFF_FP_SHADOWFRAME(rFP), %eax 7867 movl %eax, OUT_ARG1(%esp) 7868 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7869 REFRESH_IBASE 7870 jmp .L_op_nop+(60*128) 7871 7872/* ------------------------------ */ 7873 .balign 128 7874.L_ALT_op_if_lez: /* 0x3d */ 7875/* File: x86/alt_stub.S */ 7876/* 7877 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7878 * any interesting requests and then jump to the real instruction 7879 * handler. Unlike the Arm handler, we can't do this as a tail call 7880 * because rIBASE is caller save and we need to reload it. 7881 * 7882 * Note that unlike in the Arm implementation, we should never arrive 7883 * here with a zero breakFlag because we always refresh rIBASE on 7884 * return. 7885 */ 7886 .extern MterpCheckBefore 7887 EXPORT_PC 7888 7889 movl rSELF, %ecx 7890 movl %ecx, OUT_ARG0(%esp) 7891 leal OFF_FP_SHADOWFRAME(rFP), %eax 7892 movl %eax, OUT_ARG1(%esp) 7893 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7894 REFRESH_IBASE 7895 jmp .L_op_nop+(61*128) 7896 7897/* ------------------------------ */ 7898 .balign 128 7899.L_ALT_op_unused_3e: /* 0x3e */ 7900/* File: x86/alt_stub.S */ 7901/* 7902 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7903 * any interesting requests and then jump to the real instruction 7904 * handler. Unlike the Arm handler, we can't do this as a tail call 7905 * because rIBASE is caller save and we need to reload it. 7906 * 7907 * Note that unlike in the Arm implementation, we should never arrive 7908 * here with a zero breakFlag because we always refresh rIBASE on 7909 * return. 7910 */ 7911 .extern MterpCheckBefore 7912 EXPORT_PC 7913 7914 movl rSELF, %ecx 7915 movl %ecx, OUT_ARG0(%esp) 7916 leal OFF_FP_SHADOWFRAME(rFP), %eax 7917 movl %eax, OUT_ARG1(%esp) 7918 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7919 REFRESH_IBASE 7920 jmp .L_op_nop+(62*128) 7921 7922/* ------------------------------ */ 7923 .balign 128 7924.L_ALT_op_unused_3f: /* 0x3f */ 7925/* File: x86/alt_stub.S */ 7926/* 7927 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7928 * any interesting requests and then jump to the real instruction 7929 * handler. Unlike the Arm handler, we can't do this as a tail call 7930 * because rIBASE is caller save and we need to reload it. 7931 * 7932 * Note that unlike in the Arm implementation, we should never arrive 7933 * here with a zero breakFlag because we always refresh rIBASE on 7934 * return. 7935 */ 7936 .extern MterpCheckBefore 7937 EXPORT_PC 7938 7939 movl rSELF, %ecx 7940 movl %ecx, OUT_ARG0(%esp) 7941 leal OFF_FP_SHADOWFRAME(rFP), %eax 7942 movl %eax, OUT_ARG1(%esp) 7943 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7944 REFRESH_IBASE 7945 jmp .L_op_nop+(63*128) 7946 7947/* ------------------------------ */ 7948 .balign 128 7949.L_ALT_op_unused_40: /* 0x40 */ 7950/* File: x86/alt_stub.S */ 7951/* 7952 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7953 * any interesting requests and then jump to the real instruction 7954 * handler. Unlike the Arm handler, we can't do this as a tail call 7955 * because rIBASE is caller save and we need to reload it. 7956 * 7957 * Note that unlike in the Arm implementation, we should never arrive 7958 * here with a zero breakFlag because we always refresh rIBASE on 7959 * return. 7960 */ 7961 .extern MterpCheckBefore 7962 EXPORT_PC 7963 7964 movl rSELF, %ecx 7965 movl %ecx, OUT_ARG0(%esp) 7966 leal OFF_FP_SHADOWFRAME(rFP), %eax 7967 movl %eax, OUT_ARG1(%esp) 7968 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7969 REFRESH_IBASE 7970 jmp .L_op_nop+(64*128) 7971 7972/* ------------------------------ */ 7973 .balign 128 7974.L_ALT_op_unused_41: /* 0x41 */ 7975/* File: x86/alt_stub.S */ 7976/* 7977 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 7978 * any interesting requests and then jump to the real instruction 7979 * handler. Unlike the Arm handler, we can't do this as a tail call 7980 * because rIBASE is caller save and we need to reload it. 7981 * 7982 * Note that unlike in the Arm implementation, we should never arrive 7983 * here with a zero breakFlag because we always refresh rIBASE on 7984 * return. 7985 */ 7986 .extern MterpCheckBefore 7987 EXPORT_PC 7988 7989 movl rSELF, %ecx 7990 movl %ecx, OUT_ARG0(%esp) 7991 leal OFF_FP_SHADOWFRAME(rFP), %eax 7992 movl %eax, OUT_ARG1(%esp) 7993 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 7994 REFRESH_IBASE 7995 jmp .L_op_nop+(65*128) 7996 7997/* ------------------------------ */ 7998 .balign 128 7999.L_ALT_op_unused_42: /* 0x42 */ 8000/* File: x86/alt_stub.S */ 8001/* 8002 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8003 * any interesting requests and then jump to the real instruction 8004 * handler. Unlike the Arm handler, we can't do this as a tail call 8005 * because rIBASE is caller save and we need to reload it. 8006 * 8007 * Note that unlike in the Arm implementation, we should never arrive 8008 * here with a zero breakFlag because we always refresh rIBASE on 8009 * return. 8010 */ 8011 .extern MterpCheckBefore 8012 EXPORT_PC 8013 8014 movl rSELF, %ecx 8015 movl %ecx, OUT_ARG0(%esp) 8016 leal OFF_FP_SHADOWFRAME(rFP), %eax 8017 movl %eax, OUT_ARG1(%esp) 8018 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8019 REFRESH_IBASE 8020 jmp .L_op_nop+(66*128) 8021 8022/* ------------------------------ */ 8023 .balign 128 8024.L_ALT_op_unused_43: /* 0x43 */ 8025/* File: x86/alt_stub.S */ 8026/* 8027 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8028 * any interesting requests and then jump to the real instruction 8029 * handler. Unlike the Arm handler, we can't do this as a tail call 8030 * because rIBASE is caller save and we need to reload it. 8031 * 8032 * Note that unlike in the Arm implementation, we should never arrive 8033 * here with a zero breakFlag because we always refresh rIBASE on 8034 * return. 8035 */ 8036 .extern MterpCheckBefore 8037 EXPORT_PC 8038 8039 movl rSELF, %ecx 8040 movl %ecx, OUT_ARG0(%esp) 8041 leal OFF_FP_SHADOWFRAME(rFP), %eax 8042 movl %eax, OUT_ARG1(%esp) 8043 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8044 REFRESH_IBASE 8045 jmp .L_op_nop+(67*128) 8046 8047/* ------------------------------ */ 8048 .balign 128 8049.L_ALT_op_aget: /* 0x44 */ 8050/* File: x86/alt_stub.S */ 8051/* 8052 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8053 * any interesting requests and then jump to the real instruction 8054 * handler. Unlike the Arm handler, we can't do this as a tail call 8055 * because rIBASE is caller save and we need to reload it. 8056 * 8057 * Note that unlike in the Arm implementation, we should never arrive 8058 * here with a zero breakFlag because we always refresh rIBASE on 8059 * return. 8060 */ 8061 .extern MterpCheckBefore 8062 EXPORT_PC 8063 8064 movl rSELF, %ecx 8065 movl %ecx, OUT_ARG0(%esp) 8066 leal OFF_FP_SHADOWFRAME(rFP), %eax 8067 movl %eax, OUT_ARG1(%esp) 8068 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8069 REFRESH_IBASE 8070 jmp .L_op_nop+(68*128) 8071 8072/* ------------------------------ */ 8073 .balign 128 8074.L_ALT_op_aget_wide: /* 0x45 */ 8075/* File: x86/alt_stub.S */ 8076/* 8077 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8078 * any interesting requests and then jump to the real instruction 8079 * handler. Unlike the Arm handler, we can't do this as a tail call 8080 * because rIBASE is caller save and we need to reload it. 8081 * 8082 * Note that unlike in the Arm implementation, we should never arrive 8083 * here with a zero breakFlag because we always refresh rIBASE on 8084 * return. 8085 */ 8086 .extern MterpCheckBefore 8087 EXPORT_PC 8088 8089 movl rSELF, %ecx 8090 movl %ecx, OUT_ARG0(%esp) 8091 leal OFF_FP_SHADOWFRAME(rFP), %eax 8092 movl %eax, OUT_ARG1(%esp) 8093 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8094 REFRESH_IBASE 8095 jmp .L_op_nop+(69*128) 8096 8097/* ------------------------------ */ 8098 .balign 128 8099.L_ALT_op_aget_object: /* 0x46 */ 8100/* File: x86/alt_stub.S */ 8101/* 8102 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8103 * any interesting requests and then jump to the real instruction 8104 * handler. Unlike the Arm handler, we can't do this as a tail call 8105 * because rIBASE is caller save and we need to reload it. 8106 * 8107 * Note that unlike in the Arm implementation, we should never arrive 8108 * here with a zero breakFlag because we always refresh rIBASE on 8109 * return. 8110 */ 8111 .extern MterpCheckBefore 8112 EXPORT_PC 8113 8114 movl rSELF, %ecx 8115 movl %ecx, OUT_ARG0(%esp) 8116 leal OFF_FP_SHADOWFRAME(rFP), %eax 8117 movl %eax, OUT_ARG1(%esp) 8118 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8119 REFRESH_IBASE 8120 jmp .L_op_nop+(70*128) 8121 8122/* ------------------------------ */ 8123 .balign 128 8124.L_ALT_op_aget_boolean: /* 0x47 */ 8125/* File: x86/alt_stub.S */ 8126/* 8127 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8128 * any interesting requests and then jump to the real instruction 8129 * handler. Unlike the Arm handler, we can't do this as a tail call 8130 * because rIBASE is caller save and we need to reload it. 8131 * 8132 * Note that unlike in the Arm implementation, we should never arrive 8133 * here with a zero breakFlag because we always refresh rIBASE on 8134 * return. 8135 */ 8136 .extern MterpCheckBefore 8137 EXPORT_PC 8138 8139 movl rSELF, %ecx 8140 movl %ecx, OUT_ARG0(%esp) 8141 leal OFF_FP_SHADOWFRAME(rFP), %eax 8142 movl %eax, OUT_ARG1(%esp) 8143 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8144 REFRESH_IBASE 8145 jmp .L_op_nop+(71*128) 8146 8147/* ------------------------------ */ 8148 .balign 128 8149.L_ALT_op_aget_byte: /* 0x48 */ 8150/* File: x86/alt_stub.S */ 8151/* 8152 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8153 * any interesting requests and then jump to the real instruction 8154 * handler. Unlike the Arm handler, we can't do this as a tail call 8155 * because rIBASE is caller save and we need to reload it. 8156 * 8157 * Note that unlike in the Arm implementation, we should never arrive 8158 * here with a zero breakFlag because we always refresh rIBASE on 8159 * return. 8160 */ 8161 .extern MterpCheckBefore 8162 EXPORT_PC 8163 8164 movl rSELF, %ecx 8165 movl %ecx, OUT_ARG0(%esp) 8166 leal OFF_FP_SHADOWFRAME(rFP), %eax 8167 movl %eax, OUT_ARG1(%esp) 8168 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8169 REFRESH_IBASE 8170 jmp .L_op_nop+(72*128) 8171 8172/* ------------------------------ */ 8173 .balign 128 8174.L_ALT_op_aget_char: /* 0x49 */ 8175/* File: x86/alt_stub.S */ 8176/* 8177 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8178 * any interesting requests and then jump to the real instruction 8179 * handler. Unlike the Arm handler, we can't do this as a tail call 8180 * because rIBASE is caller save and we need to reload it. 8181 * 8182 * Note that unlike in the Arm implementation, we should never arrive 8183 * here with a zero breakFlag because we always refresh rIBASE on 8184 * return. 8185 */ 8186 .extern MterpCheckBefore 8187 EXPORT_PC 8188 8189 movl rSELF, %ecx 8190 movl %ecx, OUT_ARG0(%esp) 8191 leal OFF_FP_SHADOWFRAME(rFP), %eax 8192 movl %eax, OUT_ARG1(%esp) 8193 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8194 REFRESH_IBASE 8195 jmp .L_op_nop+(73*128) 8196 8197/* ------------------------------ */ 8198 .balign 128 8199.L_ALT_op_aget_short: /* 0x4a */ 8200/* File: x86/alt_stub.S */ 8201/* 8202 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8203 * any interesting requests and then jump to the real instruction 8204 * handler. Unlike the Arm handler, we can't do this as a tail call 8205 * because rIBASE is caller save and we need to reload it. 8206 * 8207 * Note that unlike in the Arm implementation, we should never arrive 8208 * here with a zero breakFlag because we always refresh rIBASE on 8209 * return. 8210 */ 8211 .extern MterpCheckBefore 8212 EXPORT_PC 8213 8214 movl rSELF, %ecx 8215 movl %ecx, OUT_ARG0(%esp) 8216 leal OFF_FP_SHADOWFRAME(rFP), %eax 8217 movl %eax, OUT_ARG1(%esp) 8218 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8219 REFRESH_IBASE 8220 jmp .L_op_nop+(74*128) 8221 8222/* ------------------------------ */ 8223 .balign 128 8224.L_ALT_op_aput: /* 0x4b */ 8225/* File: x86/alt_stub.S */ 8226/* 8227 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8228 * any interesting requests and then jump to the real instruction 8229 * handler. Unlike the Arm handler, we can't do this as a tail call 8230 * because rIBASE is caller save and we need to reload it. 8231 * 8232 * Note that unlike in the Arm implementation, we should never arrive 8233 * here with a zero breakFlag because we always refresh rIBASE on 8234 * return. 8235 */ 8236 .extern MterpCheckBefore 8237 EXPORT_PC 8238 8239 movl rSELF, %ecx 8240 movl %ecx, OUT_ARG0(%esp) 8241 leal OFF_FP_SHADOWFRAME(rFP), %eax 8242 movl %eax, OUT_ARG1(%esp) 8243 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8244 REFRESH_IBASE 8245 jmp .L_op_nop+(75*128) 8246 8247/* ------------------------------ */ 8248 .balign 128 8249.L_ALT_op_aput_wide: /* 0x4c */ 8250/* File: x86/alt_stub.S */ 8251/* 8252 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8253 * any interesting requests and then jump to the real instruction 8254 * handler. Unlike the Arm handler, we can't do this as a tail call 8255 * because rIBASE is caller save and we need to reload it. 8256 * 8257 * Note that unlike in the Arm implementation, we should never arrive 8258 * here with a zero breakFlag because we always refresh rIBASE on 8259 * return. 8260 */ 8261 .extern MterpCheckBefore 8262 EXPORT_PC 8263 8264 movl rSELF, %ecx 8265 movl %ecx, OUT_ARG0(%esp) 8266 leal OFF_FP_SHADOWFRAME(rFP), %eax 8267 movl %eax, OUT_ARG1(%esp) 8268 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8269 REFRESH_IBASE 8270 jmp .L_op_nop+(76*128) 8271 8272/* ------------------------------ */ 8273 .balign 128 8274.L_ALT_op_aput_object: /* 0x4d */ 8275/* File: x86/alt_stub.S */ 8276/* 8277 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8278 * any interesting requests and then jump to the real instruction 8279 * handler. Unlike the Arm handler, we can't do this as a tail call 8280 * because rIBASE is caller save and we need to reload it. 8281 * 8282 * Note that unlike in the Arm implementation, we should never arrive 8283 * here with a zero breakFlag because we always refresh rIBASE on 8284 * return. 8285 */ 8286 .extern MterpCheckBefore 8287 EXPORT_PC 8288 8289 movl rSELF, %ecx 8290 movl %ecx, OUT_ARG0(%esp) 8291 leal OFF_FP_SHADOWFRAME(rFP), %eax 8292 movl %eax, OUT_ARG1(%esp) 8293 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8294 REFRESH_IBASE 8295 jmp .L_op_nop+(77*128) 8296 8297/* ------------------------------ */ 8298 .balign 128 8299.L_ALT_op_aput_boolean: /* 0x4e */ 8300/* File: x86/alt_stub.S */ 8301/* 8302 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8303 * any interesting requests and then jump to the real instruction 8304 * handler. Unlike the Arm handler, we can't do this as a tail call 8305 * because rIBASE is caller save and we need to reload it. 8306 * 8307 * Note that unlike in the Arm implementation, we should never arrive 8308 * here with a zero breakFlag because we always refresh rIBASE on 8309 * return. 8310 */ 8311 .extern MterpCheckBefore 8312 EXPORT_PC 8313 8314 movl rSELF, %ecx 8315 movl %ecx, OUT_ARG0(%esp) 8316 leal OFF_FP_SHADOWFRAME(rFP), %eax 8317 movl %eax, OUT_ARG1(%esp) 8318 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8319 REFRESH_IBASE 8320 jmp .L_op_nop+(78*128) 8321 8322/* ------------------------------ */ 8323 .balign 128 8324.L_ALT_op_aput_byte: /* 0x4f */ 8325/* File: x86/alt_stub.S */ 8326/* 8327 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8328 * any interesting requests and then jump to the real instruction 8329 * handler. Unlike the Arm handler, we can't do this as a tail call 8330 * because rIBASE is caller save and we need to reload it. 8331 * 8332 * Note that unlike in the Arm implementation, we should never arrive 8333 * here with a zero breakFlag because we always refresh rIBASE on 8334 * return. 8335 */ 8336 .extern MterpCheckBefore 8337 EXPORT_PC 8338 8339 movl rSELF, %ecx 8340 movl %ecx, OUT_ARG0(%esp) 8341 leal OFF_FP_SHADOWFRAME(rFP), %eax 8342 movl %eax, OUT_ARG1(%esp) 8343 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8344 REFRESH_IBASE 8345 jmp .L_op_nop+(79*128) 8346 8347/* ------------------------------ */ 8348 .balign 128 8349.L_ALT_op_aput_char: /* 0x50 */ 8350/* File: x86/alt_stub.S */ 8351/* 8352 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8353 * any interesting requests and then jump to the real instruction 8354 * handler. Unlike the Arm handler, we can't do this as a tail call 8355 * because rIBASE is caller save and we need to reload it. 8356 * 8357 * Note that unlike in the Arm implementation, we should never arrive 8358 * here with a zero breakFlag because we always refresh rIBASE on 8359 * return. 8360 */ 8361 .extern MterpCheckBefore 8362 EXPORT_PC 8363 8364 movl rSELF, %ecx 8365 movl %ecx, OUT_ARG0(%esp) 8366 leal OFF_FP_SHADOWFRAME(rFP), %eax 8367 movl %eax, OUT_ARG1(%esp) 8368 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8369 REFRESH_IBASE 8370 jmp .L_op_nop+(80*128) 8371 8372/* ------------------------------ */ 8373 .balign 128 8374.L_ALT_op_aput_short: /* 0x51 */ 8375/* File: x86/alt_stub.S */ 8376/* 8377 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8378 * any interesting requests and then jump to the real instruction 8379 * handler. Unlike the Arm handler, we can't do this as a tail call 8380 * because rIBASE is caller save and we need to reload it. 8381 * 8382 * Note that unlike in the Arm implementation, we should never arrive 8383 * here with a zero breakFlag because we always refresh rIBASE on 8384 * return. 8385 */ 8386 .extern MterpCheckBefore 8387 EXPORT_PC 8388 8389 movl rSELF, %ecx 8390 movl %ecx, OUT_ARG0(%esp) 8391 leal OFF_FP_SHADOWFRAME(rFP), %eax 8392 movl %eax, OUT_ARG1(%esp) 8393 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8394 REFRESH_IBASE 8395 jmp .L_op_nop+(81*128) 8396 8397/* ------------------------------ */ 8398 .balign 128 8399.L_ALT_op_iget: /* 0x52 */ 8400/* File: x86/alt_stub.S */ 8401/* 8402 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8403 * any interesting requests and then jump to the real instruction 8404 * handler. Unlike the Arm handler, we can't do this as a tail call 8405 * because rIBASE is caller save and we need to reload it. 8406 * 8407 * Note that unlike in the Arm implementation, we should never arrive 8408 * here with a zero breakFlag because we always refresh rIBASE on 8409 * return. 8410 */ 8411 .extern MterpCheckBefore 8412 EXPORT_PC 8413 8414 movl rSELF, %ecx 8415 movl %ecx, OUT_ARG0(%esp) 8416 leal OFF_FP_SHADOWFRAME(rFP), %eax 8417 movl %eax, OUT_ARG1(%esp) 8418 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8419 REFRESH_IBASE 8420 jmp .L_op_nop+(82*128) 8421 8422/* ------------------------------ */ 8423 .balign 128 8424.L_ALT_op_iget_wide: /* 0x53 */ 8425/* File: x86/alt_stub.S */ 8426/* 8427 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8428 * any interesting requests and then jump to the real instruction 8429 * handler. Unlike the Arm handler, we can't do this as a tail call 8430 * because rIBASE is caller save and we need to reload it. 8431 * 8432 * Note that unlike in the Arm implementation, we should never arrive 8433 * here with a zero breakFlag because we always refresh rIBASE on 8434 * return. 8435 */ 8436 .extern MterpCheckBefore 8437 EXPORT_PC 8438 8439 movl rSELF, %ecx 8440 movl %ecx, OUT_ARG0(%esp) 8441 leal OFF_FP_SHADOWFRAME(rFP), %eax 8442 movl %eax, OUT_ARG1(%esp) 8443 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8444 REFRESH_IBASE 8445 jmp .L_op_nop+(83*128) 8446 8447/* ------------------------------ */ 8448 .balign 128 8449.L_ALT_op_iget_object: /* 0x54 */ 8450/* File: x86/alt_stub.S */ 8451/* 8452 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8453 * any interesting requests and then jump to the real instruction 8454 * handler. Unlike the Arm handler, we can't do this as a tail call 8455 * because rIBASE is caller save and we need to reload it. 8456 * 8457 * Note that unlike in the Arm implementation, we should never arrive 8458 * here with a zero breakFlag because we always refresh rIBASE on 8459 * return. 8460 */ 8461 .extern MterpCheckBefore 8462 EXPORT_PC 8463 8464 movl rSELF, %ecx 8465 movl %ecx, OUT_ARG0(%esp) 8466 leal OFF_FP_SHADOWFRAME(rFP), %eax 8467 movl %eax, OUT_ARG1(%esp) 8468 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8469 REFRESH_IBASE 8470 jmp .L_op_nop+(84*128) 8471 8472/* ------------------------------ */ 8473 .balign 128 8474.L_ALT_op_iget_boolean: /* 0x55 */ 8475/* File: x86/alt_stub.S */ 8476/* 8477 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8478 * any interesting requests and then jump to the real instruction 8479 * handler. Unlike the Arm handler, we can't do this as a tail call 8480 * because rIBASE is caller save and we need to reload it. 8481 * 8482 * Note that unlike in the Arm implementation, we should never arrive 8483 * here with a zero breakFlag because we always refresh rIBASE on 8484 * return. 8485 */ 8486 .extern MterpCheckBefore 8487 EXPORT_PC 8488 8489 movl rSELF, %ecx 8490 movl %ecx, OUT_ARG0(%esp) 8491 leal OFF_FP_SHADOWFRAME(rFP), %eax 8492 movl %eax, OUT_ARG1(%esp) 8493 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8494 REFRESH_IBASE 8495 jmp .L_op_nop+(85*128) 8496 8497/* ------------------------------ */ 8498 .balign 128 8499.L_ALT_op_iget_byte: /* 0x56 */ 8500/* File: x86/alt_stub.S */ 8501/* 8502 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8503 * any interesting requests and then jump to the real instruction 8504 * handler. Unlike the Arm handler, we can't do this as a tail call 8505 * because rIBASE is caller save and we need to reload it. 8506 * 8507 * Note that unlike in the Arm implementation, we should never arrive 8508 * here with a zero breakFlag because we always refresh rIBASE on 8509 * return. 8510 */ 8511 .extern MterpCheckBefore 8512 EXPORT_PC 8513 8514 movl rSELF, %ecx 8515 movl %ecx, OUT_ARG0(%esp) 8516 leal OFF_FP_SHADOWFRAME(rFP), %eax 8517 movl %eax, OUT_ARG1(%esp) 8518 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8519 REFRESH_IBASE 8520 jmp .L_op_nop+(86*128) 8521 8522/* ------------------------------ */ 8523 .balign 128 8524.L_ALT_op_iget_char: /* 0x57 */ 8525/* File: x86/alt_stub.S */ 8526/* 8527 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8528 * any interesting requests and then jump to the real instruction 8529 * handler. Unlike the Arm handler, we can't do this as a tail call 8530 * because rIBASE is caller save and we need to reload it. 8531 * 8532 * Note that unlike in the Arm implementation, we should never arrive 8533 * here with a zero breakFlag because we always refresh rIBASE on 8534 * return. 8535 */ 8536 .extern MterpCheckBefore 8537 EXPORT_PC 8538 8539 movl rSELF, %ecx 8540 movl %ecx, OUT_ARG0(%esp) 8541 leal OFF_FP_SHADOWFRAME(rFP), %eax 8542 movl %eax, OUT_ARG1(%esp) 8543 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8544 REFRESH_IBASE 8545 jmp .L_op_nop+(87*128) 8546 8547/* ------------------------------ */ 8548 .balign 128 8549.L_ALT_op_iget_short: /* 0x58 */ 8550/* File: x86/alt_stub.S */ 8551/* 8552 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8553 * any interesting requests and then jump to the real instruction 8554 * handler. Unlike the Arm handler, we can't do this as a tail call 8555 * because rIBASE is caller save and we need to reload it. 8556 * 8557 * Note that unlike in the Arm implementation, we should never arrive 8558 * here with a zero breakFlag because we always refresh rIBASE on 8559 * return. 8560 */ 8561 .extern MterpCheckBefore 8562 EXPORT_PC 8563 8564 movl rSELF, %ecx 8565 movl %ecx, OUT_ARG0(%esp) 8566 leal OFF_FP_SHADOWFRAME(rFP), %eax 8567 movl %eax, OUT_ARG1(%esp) 8568 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8569 REFRESH_IBASE 8570 jmp .L_op_nop+(88*128) 8571 8572/* ------------------------------ */ 8573 .balign 128 8574.L_ALT_op_iput: /* 0x59 */ 8575/* File: x86/alt_stub.S */ 8576/* 8577 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8578 * any interesting requests and then jump to the real instruction 8579 * handler. Unlike the Arm handler, we can't do this as a tail call 8580 * because rIBASE is caller save and we need to reload it. 8581 * 8582 * Note that unlike in the Arm implementation, we should never arrive 8583 * here with a zero breakFlag because we always refresh rIBASE on 8584 * return. 8585 */ 8586 .extern MterpCheckBefore 8587 EXPORT_PC 8588 8589 movl rSELF, %ecx 8590 movl %ecx, OUT_ARG0(%esp) 8591 leal OFF_FP_SHADOWFRAME(rFP), %eax 8592 movl %eax, OUT_ARG1(%esp) 8593 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8594 REFRESH_IBASE 8595 jmp .L_op_nop+(89*128) 8596 8597/* ------------------------------ */ 8598 .balign 128 8599.L_ALT_op_iput_wide: /* 0x5a */ 8600/* File: x86/alt_stub.S */ 8601/* 8602 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8603 * any interesting requests and then jump to the real instruction 8604 * handler. Unlike the Arm handler, we can't do this as a tail call 8605 * because rIBASE is caller save and we need to reload it. 8606 * 8607 * Note that unlike in the Arm implementation, we should never arrive 8608 * here with a zero breakFlag because we always refresh rIBASE on 8609 * return. 8610 */ 8611 .extern MterpCheckBefore 8612 EXPORT_PC 8613 8614 movl rSELF, %ecx 8615 movl %ecx, OUT_ARG0(%esp) 8616 leal OFF_FP_SHADOWFRAME(rFP), %eax 8617 movl %eax, OUT_ARG1(%esp) 8618 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8619 REFRESH_IBASE 8620 jmp .L_op_nop+(90*128) 8621 8622/* ------------------------------ */ 8623 .balign 128 8624.L_ALT_op_iput_object: /* 0x5b */ 8625/* File: x86/alt_stub.S */ 8626/* 8627 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8628 * any interesting requests and then jump to the real instruction 8629 * handler. Unlike the Arm handler, we can't do this as a tail call 8630 * because rIBASE is caller save and we need to reload it. 8631 * 8632 * Note that unlike in the Arm implementation, we should never arrive 8633 * here with a zero breakFlag because we always refresh rIBASE on 8634 * return. 8635 */ 8636 .extern MterpCheckBefore 8637 EXPORT_PC 8638 8639 movl rSELF, %ecx 8640 movl %ecx, OUT_ARG0(%esp) 8641 leal OFF_FP_SHADOWFRAME(rFP), %eax 8642 movl %eax, OUT_ARG1(%esp) 8643 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8644 REFRESH_IBASE 8645 jmp .L_op_nop+(91*128) 8646 8647/* ------------------------------ */ 8648 .balign 128 8649.L_ALT_op_iput_boolean: /* 0x5c */ 8650/* File: x86/alt_stub.S */ 8651/* 8652 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8653 * any interesting requests and then jump to the real instruction 8654 * handler. Unlike the Arm handler, we can't do this as a tail call 8655 * because rIBASE is caller save and we need to reload it. 8656 * 8657 * Note that unlike in the Arm implementation, we should never arrive 8658 * here with a zero breakFlag because we always refresh rIBASE on 8659 * return. 8660 */ 8661 .extern MterpCheckBefore 8662 EXPORT_PC 8663 8664 movl rSELF, %ecx 8665 movl %ecx, OUT_ARG0(%esp) 8666 leal OFF_FP_SHADOWFRAME(rFP), %eax 8667 movl %eax, OUT_ARG1(%esp) 8668 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8669 REFRESH_IBASE 8670 jmp .L_op_nop+(92*128) 8671 8672/* ------------------------------ */ 8673 .balign 128 8674.L_ALT_op_iput_byte: /* 0x5d */ 8675/* File: x86/alt_stub.S */ 8676/* 8677 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8678 * any interesting requests and then jump to the real instruction 8679 * handler. Unlike the Arm handler, we can't do this as a tail call 8680 * because rIBASE is caller save and we need to reload it. 8681 * 8682 * Note that unlike in the Arm implementation, we should never arrive 8683 * here with a zero breakFlag because we always refresh rIBASE on 8684 * return. 8685 */ 8686 .extern MterpCheckBefore 8687 EXPORT_PC 8688 8689 movl rSELF, %ecx 8690 movl %ecx, OUT_ARG0(%esp) 8691 leal OFF_FP_SHADOWFRAME(rFP), %eax 8692 movl %eax, OUT_ARG1(%esp) 8693 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8694 REFRESH_IBASE 8695 jmp .L_op_nop+(93*128) 8696 8697/* ------------------------------ */ 8698 .balign 128 8699.L_ALT_op_iput_char: /* 0x5e */ 8700/* File: x86/alt_stub.S */ 8701/* 8702 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8703 * any interesting requests and then jump to the real instruction 8704 * handler. Unlike the Arm handler, we can't do this as a tail call 8705 * because rIBASE is caller save and we need to reload it. 8706 * 8707 * Note that unlike in the Arm implementation, we should never arrive 8708 * here with a zero breakFlag because we always refresh rIBASE on 8709 * return. 8710 */ 8711 .extern MterpCheckBefore 8712 EXPORT_PC 8713 8714 movl rSELF, %ecx 8715 movl %ecx, OUT_ARG0(%esp) 8716 leal OFF_FP_SHADOWFRAME(rFP), %eax 8717 movl %eax, OUT_ARG1(%esp) 8718 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8719 REFRESH_IBASE 8720 jmp .L_op_nop+(94*128) 8721 8722/* ------------------------------ */ 8723 .balign 128 8724.L_ALT_op_iput_short: /* 0x5f */ 8725/* File: x86/alt_stub.S */ 8726/* 8727 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8728 * any interesting requests and then jump to the real instruction 8729 * handler. Unlike the Arm handler, we can't do this as a tail call 8730 * because rIBASE is caller save and we need to reload it. 8731 * 8732 * Note that unlike in the Arm implementation, we should never arrive 8733 * here with a zero breakFlag because we always refresh rIBASE on 8734 * return. 8735 */ 8736 .extern MterpCheckBefore 8737 EXPORT_PC 8738 8739 movl rSELF, %ecx 8740 movl %ecx, OUT_ARG0(%esp) 8741 leal OFF_FP_SHADOWFRAME(rFP), %eax 8742 movl %eax, OUT_ARG1(%esp) 8743 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8744 REFRESH_IBASE 8745 jmp .L_op_nop+(95*128) 8746 8747/* ------------------------------ */ 8748 .balign 128 8749.L_ALT_op_sget: /* 0x60 */ 8750/* File: x86/alt_stub.S */ 8751/* 8752 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8753 * any interesting requests and then jump to the real instruction 8754 * handler. Unlike the Arm handler, we can't do this as a tail call 8755 * because rIBASE is caller save and we need to reload it. 8756 * 8757 * Note that unlike in the Arm implementation, we should never arrive 8758 * here with a zero breakFlag because we always refresh rIBASE on 8759 * return. 8760 */ 8761 .extern MterpCheckBefore 8762 EXPORT_PC 8763 8764 movl rSELF, %ecx 8765 movl %ecx, OUT_ARG0(%esp) 8766 leal OFF_FP_SHADOWFRAME(rFP), %eax 8767 movl %eax, OUT_ARG1(%esp) 8768 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8769 REFRESH_IBASE 8770 jmp .L_op_nop+(96*128) 8771 8772/* ------------------------------ */ 8773 .balign 128 8774.L_ALT_op_sget_wide: /* 0x61 */ 8775/* File: x86/alt_stub.S */ 8776/* 8777 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8778 * any interesting requests and then jump to the real instruction 8779 * handler. Unlike the Arm handler, we can't do this as a tail call 8780 * because rIBASE is caller save and we need to reload it. 8781 * 8782 * Note that unlike in the Arm implementation, we should never arrive 8783 * here with a zero breakFlag because we always refresh rIBASE on 8784 * return. 8785 */ 8786 .extern MterpCheckBefore 8787 EXPORT_PC 8788 8789 movl rSELF, %ecx 8790 movl %ecx, OUT_ARG0(%esp) 8791 leal OFF_FP_SHADOWFRAME(rFP), %eax 8792 movl %eax, OUT_ARG1(%esp) 8793 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8794 REFRESH_IBASE 8795 jmp .L_op_nop+(97*128) 8796 8797/* ------------------------------ */ 8798 .balign 128 8799.L_ALT_op_sget_object: /* 0x62 */ 8800/* File: x86/alt_stub.S */ 8801/* 8802 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8803 * any interesting requests and then jump to the real instruction 8804 * handler. Unlike the Arm handler, we can't do this as a tail call 8805 * because rIBASE is caller save and we need to reload it. 8806 * 8807 * Note that unlike in the Arm implementation, we should never arrive 8808 * here with a zero breakFlag because we always refresh rIBASE on 8809 * return. 8810 */ 8811 .extern MterpCheckBefore 8812 EXPORT_PC 8813 8814 movl rSELF, %ecx 8815 movl %ecx, OUT_ARG0(%esp) 8816 leal OFF_FP_SHADOWFRAME(rFP), %eax 8817 movl %eax, OUT_ARG1(%esp) 8818 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8819 REFRESH_IBASE 8820 jmp .L_op_nop+(98*128) 8821 8822/* ------------------------------ */ 8823 .balign 128 8824.L_ALT_op_sget_boolean: /* 0x63 */ 8825/* File: x86/alt_stub.S */ 8826/* 8827 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8828 * any interesting requests and then jump to the real instruction 8829 * handler. Unlike the Arm handler, we can't do this as a tail call 8830 * because rIBASE is caller save and we need to reload it. 8831 * 8832 * Note that unlike in the Arm implementation, we should never arrive 8833 * here with a zero breakFlag because we always refresh rIBASE on 8834 * return. 8835 */ 8836 .extern MterpCheckBefore 8837 EXPORT_PC 8838 8839 movl rSELF, %ecx 8840 movl %ecx, OUT_ARG0(%esp) 8841 leal OFF_FP_SHADOWFRAME(rFP), %eax 8842 movl %eax, OUT_ARG1(%esp) 8843 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8844 REFRESH_IBASE 8845 jmp .L_op_nop+(99*128) 8846 8847/* ------------------------------ */ 8848 .balign 128 8849.L_ALT_op_sget_byte: /* 0x64 */ 8850/* File: x86/alt_stub.S */ 8851/* 8852 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8853 * any interesting requests and then jump to the real instruction 8854 * handler. Unlike the Arm handler, we can't do this as a tail call 8855 * because rIBASE is caller save and we need to reload it. 8856 * 8857 * Note that unlike in the Arm implementation, we should never arrive 8858 * here with a zero breakFlag because we always refresh rIBASE on 8859 * return. 8860 */ 8861 .extern MterpCheckBefore 8862 EXPORT_PC 8863 8864 movl rSELF, %ecx 8865 movl %ecx, OUT_ARG0(%esp) 8866 leal OFF_FP_SHADOWFRAME(rFP), %eax 8867 movl %eax, OUT_ARG1(%esp) 8868 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8869 REFRESH_IBASE 8870 jmp .L_op_nop+(100*128) 8871 8872/* ------------------------------ */ 8873 .balign 128 8874.L_ALT_op_sget_char: /* 0x65 */ 8875/* File: x86/alt_stub.S */ 8876/* 8877 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8878 * any interesting requests and then jump to the real instruction 8879 * handler. Unlike the Arm handler, we can't do this as a tail call 8880 * because rIBASE is caller save and we need to reload it. 8881 * 8882 * Note that unlike in the Arm implementation, we should never arrive 8883 * here with a zero breakFlag because we always refresh rIBASE on 8884 * return. 8885 */ 8886 .extern MterpCheckBefore 8887 EXPORT_PC 8888 8889 movl rSELF, %ecx 8890 movl %ecx, OUT_ARG0(%esp) 8891 leal OFF_FP_SHADOWFRAME(rFP), %eax 8892 movl %eax, OUT_ARG1(%esp) 8893 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8894 REFRESH_IBASE 8895 jmp .L_op_nop+(101*128) 8896 8897/* ------------------------------ */ 8898 .balign 128 8899.L_ALT_op_sget_short: /* 0x66 */ 8900/* File: x86/alt_stub.S */ 8901/* 8902 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8903 * any interesting requests and then jump to the real instruction 8904 * handler. Unlike the Arm handler, we can't do this as a tail call 8905 * because rIBASE is caller save and we need to reload it. 8906 * 8907 * Note that unlike in the Arm implementation, we should never arrive 8908 * here with a zero breakFlag because we always refresh rIBASE on 8909 * return. 8910 */ 8911 .extern MterpCheckBefore 8912 EXPORT_PC 8913 8914 movl rSELF, %ecx 8915 movl %ecx, OUT_ARG0(%esp) 8916 leal OFF_FP_SHADOWFRAME(rFP), %eax 8917 movl %eax, OUT_ARG1(%esp) 8918 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8919 REFRESH_IBASE 8920 jmp .L_op_nop+(102*128) 8921 8922/* ------------------------------ */ 8923 .balign 128 8924.L_ALT_op_sput: /* 0x67 */ 8925/* File: x86/alt_stub.S */ 8926/* 8927 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8928 * any interesting requests and then jump to the real instruction 8929 * handler. Unlike the Arm handler, we can't do this as a tail call 8930 * because rIBASE is caller save and we need to reload it. 8931 * 8932 * Note that unlike in the Arm implementation, we should never arrive 8933 * here with a zero breakFlag because we always refresh rIBASE on 8934 * return. 8935 */ 8936 .extern MterpCheckBefore 8937 EXPORT_PC 8938 8939 movl rSELF, %ecx 8940 movl %ecx, OUT_ARG0(%esp) 8941 leal OFF_FP_SHADOWFRAME(rFP), %eax 8942 movl %eax, OUT_ARG1(%esp) 8943 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8944 REFRESH_IBASE 8945 jmp .L_op_nop+(103*128) 8946 8947/* ------------------------------ */ 8948 .balign 128 8949.L_ALT_op_sput_wide: /* 0x68 */ 8950/* File: x86/alt_stub.S */ 8951/* 8952 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8953 * any interesting requests and then jump to the real instruction 8954 * handler. Unlike the Arm handler, we can't do this as a tail call 8955 * because rIBASE is caller save and we need to reload it. 8956 * 8957 * Note that unlike in the Arm implementation, we should never arrive 8958 * here with a zero breakFlag because we always refresh rIBASE on 8959 * return. 8960 */ 8961 .extern MterpCheckBefore 8962 EXPORT_PC 8963 8964 movl rSELF, %ecx 8965 movl %ecx, OUT_ARG0(%esp) 8966 leal OFF_FP_SHADOWFRAME(rFP), %eax 8967 movl %eax, OUT_ARG1(%esp) 8968 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8969 REFRESH_IBASE 8970 jmp .L_op_nop+(104*128) 8971 8972/* ------------------------------ */ 8973 .balign 128 8974.L_ALT_op_sput_object: /* 0x69 */ 8975/* File: x86/alt_stub.S */ 8976/* 8977 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 8978 * any interesting requests and then jump to the real instruction 8979 * handler. Unlike the Arm handler, we can't do this as a tail call 8980 * because rIBASE is caller save and we need to reload it. 8981 * 8982 * Note that unlike in the Arm implementation, we should never arrive 8983 * here with a zero breakFlag because we always refresh rIBASE on 8984 * return. 8985 */ 8986 .extern MterpCheckBefore 8987 EXPORT_PC 8988 8989 movl rSELF, %ecx 8990 movl %ecx, OUT_ARG0(%esp) 8991 leal OFF_FP_SHADOWFRAME(rFP), %eax 8992 movl %eax, OUT_ARG1(%esp) 8993 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 8994 REFRESH_IBASE 8995 jmp .L_op_nop+(105*128) 8996 8997/* ------------------------------ */ 8998 .balign 128 8999.L_ALT_op_sput_boolean: /* 0x6a */ 9000/* File: x86/alt_stub.S */ 9001/* 9002 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9003 * any interesting requests and then jump to the real instruction 9004 * handler. Unlike the Arm handler, we can't do this as a tail call 9005 * because rIBASE is caller save and we need to reload it. 9006 * 9007 * Note that unlike in the Arm implementation, we should never arrive 9008 * here with a zero breakFlag because we always refresh rIBASE on 9009 * return. 9010 */ 9011 .extern MterpCheckBefore 9012 EXPORT_PC 9013 9014 movl rSELF, %ecx 9015 movl %ecx, OUT_ARG0(%esp) 9016 leal OFF_FP_SHADOWFRAME(rFP), %eax 9017 movl %eax, OUT_ARG1(%esp) 9018 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9019 REFRESH_IBASE 9020 jmp .L_op_nop+(106*128) 9021 9022/* ------------------------------ */ 9023 .balign 128 9024.L_ALT_op_sput_byte: /* 0x6b */ 9025/* File: x86/alt_stub.S */ 9026/* 9027 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9028 * any interesting requests and then jump to the real instruction 9029 * handler. Unlike the Arm handler, we can't do this as a tail call 9030 * because rIBASE is caller save and we need to reload it. 9031 * 9032 * Note that unlike in the Arm implementation, we should never arrive 9033 * here with a zero breakFlag because we always refresh rIBASE on 9034 * return. 9035 */ 9036 .extern MterpCheckBefore 9037 EXPORT_PC 9038 9039 movl rSELF, %ecx 9040 movl %ecx, OUT_ARG0(%esp) 9041 leal OFF_FP_SHADOWFRAME(rFP), %eax 9042 movl %eax, OUT_ARG1(%esp) 9043 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9044 REFRESH_IBASE 9045 jmp .L_op_nop+(107*128) 9046 9047/* ------------------------------ */ 9048 .balign 128 9049.L_ALT_op_sput_char: /* 0x6c */ 9050/* File: x86/alt_stub.S */ 9051/* 9052 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9053 * any interesting requests and then jump to the real instruction 9054 * handler. Unlike the Arm handler, we can't do this as a tail call 9055 * because rIBASE is caller save and we need to reload it. 9056 * 9057 * Note that unlike in the Arm implementation, we should never arrive 9058 * here with a zero breakFlag because we always refresh rIBASE on 9059 * return. 9060 */ 9061 .extern MterpCheckBefore 9062 EXPORT_PC 9063 9064 movl rSELF, %ecx 9065 movl %ecx, OUT_ARG0(%esp) 9066 leal OFF_FP_SHADOWFRAME(rFP), %eax 9067 movl %eax, OUT_ARG1(%esp) 9068 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9069 REFRESH_IBASE 9070 jmp .L_op_nop+(108*128) 9071 9072/* ------------------------------ */ 9073 .balign 128 9074.L_ALT_op_sput_short: /* 0x6d */ 9075/* File: x86/alt_stub.S */ 9076/* 9077 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9078 * any interesting requests and then jump to the real instruction 9079 * handler. Unlike the Arm handler, we can't do this as a tail call 9080 * because rIBASE is caller save and we need to reload it. 9081 * 9082 * Note that unlike in the Arm implementation, we should never arrive 9083 * here with a zero breakFlag because we always refresh rIBASE on 9084 * return. 9085 */ 9086 .extern MterpCheckBefore 9087 EXPORT_PC 9088 9089 movl rSELF, %ecx 9090 movl %ecx, OUT_ARG0(%esp) 9091 leal OFF_FP_SHADOWFRAME(rFP), %eax 9092 movl %eax, OUT_ARG1(%esp) 9093 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9094 REFRESH_IBASE 9095 jmp .L_op_nop+(109*128) 9096 9097/* ------------------------------ */ 9098 .balign 128 9099.L_ALT_op_invoke_virtual: /* 0x6e */ 9100/* File: x86/alt_stub.S */ 9101/* 9102 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9103 * any interesting requests and then jump to the real instruction 9104 * handler. Unlike the Arm handler, we can't do this as a tail call 9105 * because rIBASE is caller save and we need to reload it. 9106 * 9107 * Note that unlike in the Arm implementation, we should never arrive 9108 * here with a zero breakFlag because we always refresh rIBASE on 9109 * return. 9110 */ 9111 .extern MterpCheckBefore 9112 EXPORT_PC 9113 9114 movl rSELF, %ecx 9115 movl %ecx, OUT_ARG0(%esp) 9116 leal OFF_FP_SHADOWFRAME(rFP), %eax 9117 movl %eax, OUT_ARG1(%esp) 9118 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9119 REFRESH_IBASE 9120 jmp .L_op_nop+(110*128) 9121 9122/* ------------------------------ */ 9123 .balign 128 9124.L_ALT_op_invoke_super: /* 0x6f */ 9125/* File: x86/alt_stub.S */ 9126/* 9127 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9128 * any interesting requests and then jump to the real instruction 9129 * handler. Unlike the Arm handler, we can't do this as a tail call 9130 * because rIBASE is caller save and we need to reload it. 9131 * 9132 * Note that unlike in the Arm implementation, we should never arrive 9133 * here with a zero breakFlag because we always refresh rIBASE on 9134 * return. 9135 */ 9136 .extern MterpCheckBefore 9137 EXPORT_PC 9138 9139 movl rSELF, %ecx 9140 movl %ecx, OUT_ARG0(%esp) 9141 leal OFF_FP_SHADOWFRAME(rFP), %eax 9142 movl %eax, OUT_ARG1(%esp) 9143 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9144 REFRESH_IBASE 9145 jmp .L_op_nop+(111*128) 9146 9147/* ------------------------------ */ 9148 .balign 128 9149.L_ALT_op_invoke_direct: /* 0x70 */ 9150/* File: x86/alt_stub.S */ 9151/* 9152 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9153 * any interesting requests and then jump to the real instruction 9154 * handler. Unlike the Arm handler, we can't do this as a tail call 9155 * because rIBASE is caller save and we need to reload it. 9156 * 9157 * Note that unlike in the Arm implementation, we should never arrive 9158 * here with a zero breakFlag because we always refresh rIBASE on 9159 * return. 9160 */ 9161 .extern MterpCheckBefore 9162 EXPORT_PC 9163 9164 movl rSELF, %ecx 9165 movl %ecx, OUT_ARG0(%esp) 9166 leal OFF_FP_SHADOWFRAME(rFP), %eax 9167 movl %eax, OUT_ARG1(%esp) 9168 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9169 REFRESH_IBASE 9170 jmp .L_op_nop+(112*128) 9171 9172/* ------------------------------ */ 9173 .balign 128 9174.L_ALT_op_invoke_static: /* 0x71 */ 9175/* File: x86/alt_stub.S */ 9176/* 9177 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9178 * any interesting requests and then jump to the real instruction 9179 * handler. Unlike the Arm handler, we can't do this as a tail call 9180 * because rIBASE is caller save and we need to reload it. 9181 * 9182 * Note that unlike in the Arm implementation, we should never arrive 9183 * here with a zero breakFlag because we always refresh rIBASE on 9184 * return. 9185 */ 9186 .extern MterpCheckBefore 9187 EXPORT_PC 9188 9189 movl rSELF, %ecx 9190 movl %ecx, OUT_ARG0(%esp) 9191 leal OFF_FP_SHADOWFRAME(rFP), %eax 9192 movl %eax, OUT_ARG1(%esp) 9193 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9194 REFRESH_IBASE 9195 jmp .L_op_nop+(113*128) 9196 9197/* ------------------------------ */ 9198 .balign 128 9199.L_ALT_op_invoke_interface: /* 0x72 */ 9200/* File: x86/alt_stub.S */ 9201/* 9202 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9203 * any interesting requests and then jump to the real instruction 9204 * handler. Unlike the Arm handler, we can't do this as a tail call 9205 * because rIBASE is caller save and we need to reload it. 9206 * 9207 * Note that unlike in the Arm implementation, we should never arrive 9208 * here with a zero breakFlag because we always refresh rIBASE on 9209 * return. 9210 */ 9211 .extern MterpCheckBefore 9212 EXPORT_PC 9213 9214 movl rSELF, %ecx 9215 movl %ecx, OUT_ARG0(%esp) 9216 leal OFF_FP_SHADOWFRAME(rFP), %eax 9217 movl %eax, OUT_ARG1(%esp) 9218 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9219 REFRESH_IBASE 9220 jmp .L_op_nop+(114*128) 9221 9222/* ------------------------------ */ 9223 .balign 128 9224.L_ALT_op_return_void_no_barrier: /* 0x73 */ 9225/* File: x86/alt_stub.S */ 9226/* 9227 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9228 * any interesting requests and then jump to the real instruction 9229 * handler. Unlike the Arm handler, we can't do this as a tail call 9230 * because rIBASE is caller save and we need to reload it. 9231 * 9232 * Note that unlike in the Arm implementation, we should never arrive 9233 * here with a zero breakFlag because we always refresh rIBASE on 9234 * return. 9235 */ 9236 .extern MterpCheckBefore 9237 EXPORT_PC 9238 9239 movl rSELF, %ecx 9240 movl %ecx, OUT_ARG0(%esp) 9241 leal OFF_FP_SHADOWFRAME(rFP), %eax 9242 movl %eax, OUT_ARG1(%esp) 9243 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9244 REFRESH_IBASE 9245 jmp .L_op_nop+(115*128) 9246 9247/* ------------------------------ */ 9248 .balign 128 9249.L_ALT_op_invoke_virtual_range: /* 0x74 */ 9250/* File: x86/alt_stub.S */ 9251/* 9252 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9253 * any interesting requests and then jump to the real instruction 9254 * handler. Unlike the Arm handler, we can't do this as a tail call 9255 * because rIBASE is caller save and we need to reload it. 9256 * 9257 * Note that unlike in the Arm implementation, we should never arrive 9258 * here with a zero breakFlag because we always refresh rIBASE on 9259 * return. 9260 */ 9261 .extern MterpCheckBefore 9262 EXPORT_PC 9263 9264 movl rSELF, %ecx 9265 movl %ecx, OUT_ARG0(%esp) 9266 leal OFF_FP_SHADOWFRAME(rFP), %eax 9267 movl %eax, OUT_ARG1(%esp) 9268 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9269 REFRESH_IBASE 9270 jmp .L_op_nop+(116*128) 9271 9272/* ------------------------------ */ 9273 .balign 128 9274.L_ALT_op_invoke_super_range: /* 0x75 */ 9275/* File: x86/alt_stub.S */ 9276/* 9277 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9278 * any interesting requests and then jump to the real instruction 9279 * handler. Unlike the Arm handler, we can't do this as a tail call 9280 * because rIBASE is caller save and we need to reload it. 9281 * 9282 * Note that unlike in the Arm implementation, we should never arrive 9283 * here with a zero breakFlag because we always refresh rIBASE on 9284 * return. 9285 */ 9286 .extern MterpCheckBefore 9287 EXPORT_PC 9288 9289 movl rSELF, %ecx 9290 movl %ecx, OUT_ARG0(%esp) 9291 leal OFF_FP_SHADOWFRAME(rFP), %eax 9292 movl %eax, OUT_ARG1(%esp) 9293 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9294 REFRESH_IBASE 9295 jmp .L_op_nop+(117*128) 9296 9297/* ------------------------------ */ 9298 .balign 128 9299.L_ALT_op_invoke_direct_range: /* 0x76 */ 9300/* File: x86/alt_stub.S */ 9301/* 9302 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9303 * any interesting requests and then jump to the real instruction 9304 * handler. Unlike the Arm handler, we can't do this as a tail call 9305 * because rIBASE is caller save and we need to reload it. 9306 * 9307 * Note that unlike in the Arm implementation, we should never arrive 9308 * here with a zero breakFlag because we always refresh rIBASE on 9309 * return. 9310 */ 9311 .extern MterpCheckBefore 9312 EXPORT_PC 9313 9314 movl rSELF, %ecx 9315 movl %ecx, OUT_ARG0(%esp) 9316 leal OFF_FP_SHADOWFRAME(rFP), %eax 9317 movl %eax, OUT_ARG1(%esp) 9318 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9319 REFRESH_IBASE 9320 jmp .L_op_nop+(118*128) 9321 9322/* ------------------------------ */ 9323 .balign 128 9324.L_ALT_op_invoke_static_range: /* 0x77 */ 9325/* File: x86/alt_stub.S */ 9326/* 9327 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9328 * any interesting requests and then jump to the real instruction 9329 * handler. Unlike the Arm handler, we can't do this as a tail call 9330 * because rIBASE is caller save and we need to reload it. 9331 * 9332 * Note that unlike in the Arm implementation, we should never arrive 9333 * here with a zero breakFlag because we always refresh rIBASE on 9334 * return. 9335 */ 9336 .extern MterpCheckBefore 9337 EXPORT_PC 9338 9339 movl rSELF, %ecx 9340 movl %ecx, OUT_ARG0(%esp) 9341 leal OFF_FP_SHADOWFRAME(rFP), %eax 9342 movl %eax, OUT_ARG1(%esp) 9343 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9344 REFRESH_IBASE 9345 jmp .L_op_nop+(119*128) 9346 9347/* ------------------------------ */ 9348 .balign 128 9349.L_ALT_op_invoke_interface_range: /* 0x78 */ 9350/* File: x86/alt_stub.S */ 9351/* 9352 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9353 * any interesting requests and then jump to the real instruction 9354 * handler. Unlike the Arm handler, we can't do this as a tail call 9355 * because rIBASE is caller save and we need to reload it. 9356 * 9357 * Note that unlike in the Arm implementation, we should never arrive 9358 * here with a zero breakFlag because we always refresh rIBASE on 9359 * return. 9360 */ 9361 .extern MterpCheckBefore 9362 EXPORT_PC 9363 9364 movl rSELF, %ecx 9365 movl %ecx, OUT_ARG0(%esp) 9366 leal OFF_FP_SHADOWFRAME(rFP), %eax 9367 movl %eax, OUT_ARG1(%esp) 9368 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9369 REFRESH_IBASE 9370 jmp .L_op_nop+(120*128) 9371 9372/* ------------------------------ */ 9373 .balign 128 9374.L_ALT_op_unused_79: /* 0x79 */ 9375/* File: x86/alt_stub.S */ 9376/* 9377 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9378 * any interesting requests and then jump to the real instruction 9379 * handler. Unlike the Arm handler, we can't do this as a tail call 9380 * because rIBASE is caller save and we need to reload it. 9381 * 9382 * Note that unlike in the Arm implementation, we should never arrive 9383 * here with a zero breakFlag because we always refresh rIBASE on 9384 * return. 9385 */ 9386 .extern MterpCheckBefore 9387 EXPORT_PC 9388 9389 movl rSELF, %ecx 9390 movl %ecx, OUT_ARG0(%esp) 9391 leal OFF_FP_SHADOWFRAME(rFP), %eax 9392 movl %eax, OUT_ARG1(%esp) 9393 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9394 REFRESH_IBASE 9395 jmp .L_op_nop+(121*128) 9396 9397/* ------------------------------ */ 9398 .balign 128 9399.L_ALT_op_unused_7a: /* 0x7a */ 9400/* File: x86/alt_stub.S */ 9401/* 9402 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9403 * any interesting requests and then jump to the real instruction 9404 * handler. Unlike the Arm handler, we can't do this as a tail call 9405 * because rIBASE is caller save and we need to reload it. 9406 * 9407 * Note that unlike in the Arm implementation, we should never arrive 9408 * here with a zero breakFlag because we always refresh rIBASE on 9409 * return. 9410 */ 9411 .extern MterpCheckBefore 9412 EXPORT_PC 9413 9414 movl rSELF, %ecx 9415 movl %ecx, OUT_ARG0(%esp) 9416 leal OFF_FP_SHADOWFRAME(rFP), %eax 9417 movl %eax, OUT_ARG1(%esp) 9418 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9419 REFRESH_IBASE 9420 jmp .L_op_nop+(122*128) 9421 9422/* ------------------------------ */ 9423 .balign 128 9424.L_ALT_op_neg_int: /* 0x7b */ 9425/* File: x86/alt_stub.S */ 9426/* 9427 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9428 * any interesting requests and then jump to the real instruction 9429 * handler. Unlike the Arm handler, we can't do this as a tail call 9430 * because rIBASE is caller save and we need to reload it. 9431 * 9432 * Note that unlike in the Arm implementation, we should never arrive 9433 * here with a zero breakFlag because we always refresh rIBASE on 9434 * return. 9435 */ 9436 .extern MterpCheckBefore 9437 EXPORT_PC 9438 9439 movl rSELF, %ecx 9440 movl %ecx, OUT_ARG0(%esp) 9441 leal OFF_FP_SHADOWFRAME(rFP), %eax 9442 movl %eax, OUT_ARG1(%esp) 9443 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9444 REFRESH_IBASE 9445 jmp .L_op_nop+(123*128) 9446 9447/* ------------------------------ */ 9448 .balign 128 9449.L_ALT_op_not_int: /* 0x7c */ 9450/* File: x86/alt_stub.S */ 9451/* 9452 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9453 * any interesting requests and then jump to the real instruction 9454 * handler. Unlike the Arm handler, we can't do this as a tail call 9455 * because rIBASE is caller save and we need to reload it. 9456 * 9457 * Note that unlike in the Arm implementation, we should never arrive 9458 * here with a zero breakFlag because we always refresh rIBASE on 9459 * return. 9460 */ 9461 .extern MterpCheckBefore 9462 EXPORT_PC 9463 9464 movl rSELF, %ecx 9465 movl %ecx, OUT_ARG0(%esp) 9466 leal OFF_FP_SHADOWFRAME(rFP), %eax 9467 movl %eax, OUT_ARG1(%esp) 9468 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9469 REFRESH_IBASE 9470 jmp .L_op_nop+(124*128) 9471 9472/* ------------------------------ */ 9473 .balign 128 9474.L_ALT_op_neg_long: /* 0x7d */ 9475/* File: x86/alt_stub.S */ 9476/* 9477 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9478 * any interesting requests and then jump to the real instruction 9479 * handler. Unlike the Arm handler, we can't do this as a tail call 9480 * because rIBASE is caller save and we need to reload it. 9481 * 9482 * Note that unlike in the Arm implementation, we should never arrive 9483 * here with a zero breakFlag because we always refresh rIBASE on 9484 * return. 9485 */ 9486 .extern MterpCheckBefore 9487 EXPORT_PC 9488 9489 movl rSELF, %ecx 9490 movl %ecx, OUT_ARG0(%esp) 9491 leal OFF_FP_SHADOWFRAME(rFP), %eax 9492 movl %eax, OUT_ARG1(%esp) 9493 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9494 REFRESH_IBASE 9495 jmp .L_op_nop+(125*128) 9496 9497/* ------------------------------ */ 9498 .balign 128 9499.L_ALT_op_not_long: /* 0x7e */ 9500/* File: x86/alt_stub.S */ 9501/* 9502 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9503 * any interesting requests and then jump to the real instruction 9504 * handler. Unlike the Arm handler, we can't do this as a tail call 9505 * because rIBASE is caller save and we need to reload it. 9506 * 9507 * Note that unlike in the Arm implementation, we should never arrive 9508 * here with a zero breakFlag because we always refresh rIBASE on 9509 * return. 9510 */ 9511 .extern MterpCheckBefore 9512 EXPORT_PC 9513 9514 movl rSELF, %ecx 9515 movl %ecx, OUT_ARG0(%esp) 9516 leal OFF_FP_SHADOWFRAME(rFP), %eax 9517 movl %eax, OUT_ARG1(%esp) 9518 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9519 REFRESH_IBASE 9520 jmp .L_op_nop+(126*128) 9521 9522/* ------------------------------ */ 9523 .balign 128 9524.L_ALT_op_neg_float: /* 0x7f */ 9525/* File: x86/alt_stub.S */ 9526/* 9527 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9528 * any interesting requests and then jump to the real instruction 9529 * handler. Unlike the Arm handler, we can't do this as a tail call 9530 * because rIBASE is caller save and we need to reload it. 9531 * 9532 * Note that unlike in the Arm implementation, we should never arrive 9533 * here with a zero breakFlag because we always refresh rIBASE on 9534 * return. 9535 */ 9536 .extern MterpCheckBefore 9537 EXPORT_PC 9538 9539 movl rSELF, %ecx 9540 movl %ecx, OUT_ARG0(%esp) 9541 leal OFF_FP_SHADOWFRAME(rFP), %eax 9542 movl %eax, OUT_ARG1(%esp) 9543 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9544 REFRESH_IBASE 9545 jmp .L_op_nop+(127*128) 9546 9547/* ------------------------------ */ 9548 .balign 128 9549.L_ALT_op_neg_double: /* 0x80 */ 9550/* File: x86/alt_stub.S */ 9551/* 9552 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9553 * any interesting requests and then jump to the real instruction 9554 * handler. Unlike the Arm handler, we can't do this as a tail call 9555 * because rIBASE is caller save and we need to reload it. 9556 * 9557 * Note that unlike in the Arm implementation, we should never arrive 9558 * here with a zero breakFlag because we always refresh rIBASE on 9559 * return. 9560 */ 9561 .extern MterpCheckBefore 9562 EXPORT_PC 9563 9564 movl rSELF, %ecx 9565 movl %ecx, OUT_ARG0(%esp) 9566 leal OFF_FP_SHADOWFRAME(rFP), %eax 9567 movl %eax, OUT_ARG1(%esp) 9568 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9569 REFRESH_IBASE 9570 jmp .L_op_nop+(128*128) 9571 9572/* ------------------------------ */ 9573 .balign 128 9574.L_ALT_op_int_to_long: /* 0x81 */ 9575/* File: x86/alt_stub.S */ 9576/* 9577 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9578 * any interesting requests and then jump to the real instruction 9579 * handler. Unlike the Arm handler, we can't do this as a tail call 9580 * because rIBASE is caller save and we need to reload it. 9581 * 9582 * Note that unlike in the Arm implementation, we should never arrive 9583 * here with a zero breakFlag because we always refresh rIBASE on 9584 * return. 9585 */ 9586 .extern MterpCheckBefore 9587 EXPORT_PC 9588 9589 movl rSELF, %ecx 9590 movl %ecx, OUT_ARG0(%esp) 9591 leal OFF_FP_SHADOWFRAME(rFP), %eax 9592 movl %eax, OUT_ARG1(%esp) 9593 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9594 REFRESH_IBASE 9595 jmp .L_op_nop+(129*128) 9596 9597/* ------------------------------ */ 9598 .balign 128 9599.L_ALT_op_int_to_float: /* 0x82 */ 9600/* File: x86/alt_stub.S */ 9601/* 9602 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9603 * any interesting requests and then jump to the real instruction 9604 * handler. Unlike the Arm handler, we can't do this as a tail call 9605 * because rIBASE is caller save and we need to reload it. 9606 * 9607 * Note that unlike in the Arm implementation, we should never arrive 9608 * here with a zero breakFlag because we always refresh rIBASE on 9609 * return. 9610 */ 9611 .extern MterpCheckBefore 9612 EXPORT_PC 9613 9614 movl rSELF, %ecx 9615 movl %ecx, OUT_ARG0(%esp) 9616 leal OFF_FP_SHADOWFRAME(rFP), %eax 9617 movl %eax, OUT_ARG1(%esp) 9618 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9619 REFRESH_IBASE 9620 jmp .L_op_nop+(130*128) 9621 9622/* ------------------------------ */ 9623 .balign 128 9624.L_ALT_op_int_to_double: /* 0x83 */ 9625/* File: x86/alt_stub.S */ 9626/* 9627 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9628 * any interesting requests and then jump to the real instruction 9629 * handler. Unlike the Arm handler, we can't do this as a tail call 9630 * because rIBASE is caller save and we need to reload it. 9631 * 9632 * Note that unlike in the Arm implementation, we should never arrive 9633 * here with a zero breakFlag because we always refresh rIBASE on 9634 * return. 9635 */ 9636 .extern MterpCheckBefore 9637 EXPORT_PC 9638 9639 movl rSELF, %ecx 9640 movl %ecx, OUT_ARG0(%esp) 9641 leal OFF_FP_SHADOWFRAME(rFP), %eax 9642 movl %eax, OUT_ARG1(%esp) 9643 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9644 REFRESH_IBASE 9645 jmp .L_op_nop+(131*128) 9646 9647/* ------------------------------ */ 9648 .balign 128 9649.L_ALT_op_long_to_int: /* 0x84 */ 9650/* File: x86/alt_stub.S */ 9651/* 9652 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9653 * any interesting requests and then jump to the real instruction 9654 * handler. Unlike the Arm handler, we can't do this as a tail call 9655 * because rIBASE is caller save and we need to reload it. 9656 * 9657 * Note that unlike in the Arm implementation, we should never arrive 9658 * here with a zero breakFlag because we always refresh rIBASE on 9659 * return. 9660 */ 9661 .extern MterpCheckBefore 9662 EXPORT_PC 9663 9664 movl rSELF, %ecx 9665 movl %ecx, OUT_ARG0(%esp) 9666 leal OFF_FP_SHADOWFRAME(rFP), %eax 9667 movl %eax, OUT_ARG1(%esp) 9668 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9669 REFRESH_IBASE 9670 jmp .L_op_nop+(132*128) 9671 9672/* ------------------------------ */ 9673 .balign 128 9674.L_ALT_op_long_to_float: /* 0x85 */ 9675/* File: x86/alt_stub.S */ 9676/* 9677 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9678 * any interesting requests and then jump to the real instruction 9679 * handler. Unlike the Arm handler, we can't do this as a tail call 9680 * because rIBASE is caller save and we need to reload it. 9681 * 9682 * Note that unlike in the Arm implementation, we should never arrive 9683 * here with a zero breakFlag because we always refresh rIBASE on 9684 * return. 9685 */ 9686 .extern MterpCheckBefore 9687 EXPORT_PC 9688 9689 movl rSELF, %ecx 9690 movl %ecx, OUT_ARG0(%esp) 9691 leal OFF_FP_SHADOWFRAME(rFP), %eax 9692 movl %eax, OUT_ARG1(%esp) 9693 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9694 REFRESH_IBASE 9695 jmp .L_op_nop+(133*128) 9696 9697/* ------------------------------ */ 9698 .balign 128 9699.L_ALT_op_long_to_double: /* 0x86 */ 9700/* File: x86/alt_stub.S */ 9701/* 9702 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9703 * any interesting requests and then jump to the real instruction 9704 * handler. Unlike the Arm handler, we can't do this as a tail call 9705 * because rIBASE is caller save and we need to reload it. 9706 * 9707 * Note that unlike in the Arm implementation, we should never arrive 9708 * here with a zero breakFlag because we always refresh rIBASE on 9709 * return. 9710 */ 9711 .extern MterpCheckBefore 9712 EXPORT_PC 9713 9714 movl rSELF, %ecx 9715 movl %ecx, OUT_ARG0(%esp) 9716 leal OFF_FP_SHADOWFRAME(rFP), %eax 9717 movl %eax, OUT_ARG1(%esp) 9718 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9719 REFRESH_IBASE 9720 jmp .L_op_nop+(134*128) 9721 9722/* ------------------------------ */ 9723 .balign 128 9724.L_ALT_op_float_to_int: /* 0x87 */ 9725/* File: x86/alt_stub.S */ 9726/* 9727 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9728 * any interesting requests and then jump to the real instruction 9729 * handler. Unlike the Arm handler, we can't do this as a tail call 9730 * because rIBASE is caller save and we need to reload it. 9731 * 9732 * Note that unlike in the Arm implementation, we should never arrive 9733 * here with a zero breakFlag because we always refresh rIBASE on 9734 * return. 9735 */ 9736 .extern MterpCheckBefore 9737 EXPORT_PC 9738 9739 movl rSELF, %ecx 9740 movl %ecx, OUT_ARG0(%esp) 9741 leal OFF_FP_SHADOWFRAME(rFP), %eax 9742 movl %eax, OUT_ARG1(%esp) 9743 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9744 REFRESH_IBASE 9745 jmp .L_op_nop+(135*128) 9746 9747/* ------------------------------ */ 9748 .balign 128 9749.L_ALT_op_float_to_long: /* 0x88 */ 9750/* File: x86/alt_stub.S */ 9751/* 9752 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9753 * any interesting requests and then jump to the real instruction 9754 * handler. Unlike the Arm handler, we can't do this as a tail call 9755 * because rIBASE is caller save and we need to reload it. 9756 * 9757 * Note that unlike in the Arm implementation, we should never arrive 9758 * here with a zero breakFlag because we always refresh rIBASE on 9759 * return. 9760 */ 9761 .extern MterpCheckBefore 9762 EXPORT_PC 9763 9764 movl rSELF, %ecx 9765 movl %ecx, OUT_ARG0(%esp) 9766 leal OFF_FP_SHADOWFRAME(rFP), %eax 9767 movl %eax, OUT_ARG1(%esp) 9768 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9769 REFRESH_IBASE 9770 jmp .L_op_nop+(136*128) 9771 9772/* ------------------------------ */ 9773 .balign 128 9774.L_ALT_op_float_to_double: /* 0x89 */ 9775/* File: x86/alt_stub.S */ 9776/* 9777 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9778 * any interesting requests and then jump to the real instruction 9779 * handler. Unlike the Arm handler, we can't do this as a tail call 9780 * because rIBASE is caller save and we need to reload it. 9781 * 9782 * Note that unlike in the Arm implementation, we should never arrive 9783 * here with a zero breakFlag because we always refresh rIBASE on 9784 * return. 9785 */ 9786 .extern MterpCheckBefore 9787 EXPORT_PC 9788 9789 movl rSELF, %ecx 9790 movl %ecx, OUT_ARG0(%esp) 9791 leal OFF_FP_SHADOWFRAME(rFP), %eax 9792 movl %eax, OUT_ARG1(%esp) 9793 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9794 REFRESH_IBASE 9795 jmp .L_op_nop+(137*128) 9796 9797/* ------------------------------ */ 9798 .balign 128 9799.L_ALT_op_double_to_int: /* 0x8a */ 9800/* File: x86/alt_stub.S */ 9801/* 9802 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9803 * any interesting requests and then jump to the real instruction 9804 * handler. Unlike the Arm handler, we can't do this as a tail call 9805 * because rIBASE is caller save and we need to reload it. 9806 * 9807 * Note that unlike in the Arm implementation, we should never arrive 9808 * here with a zero breakFlag because we always refresh rIBASE on 9809 * return. 9810 */ 9811 .extern MterpCheckBefore 9812 EXPORT_PC 9813 9814 movl rSELF, %ecx 9815 movl %ecx, OUT_ARG0(%esp) 9816 leal OFF_FP_SHADOWFRAME(rFP), %eax 9817 movl %eax, OUT_ARG1(%esp) 9818 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9819 REFRESH_IBASE 9820 jmp .L_op_nop+(138*128) 9821 9822/* ------------------------------ */ 9823 .balign 128 9824.L_ALT_op_double_to_long: /* 0x8b */ 9825/* File: x86/alt_stub.S */ 9826/* 9827 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9828 * any interesting requests and then jump to the real instruction 9829 * handler. Unlike the Arm handler, we can't do this as a tail call 9830 * because rIBASE is caller save and we need to reload it. 9831 * 9832 * Note that unlike in the Arm implementation, we should never arrive 9833 * here with a zero breakFlag because we always refresh rIBASE on 9834 * return. 9835 */ 9836 .extern MterpCheckBefore 9837 EXPORT_PC 9838 9839 movl rSELF, %ecx 9840 movl %ecx, OUT_ARG0(%esp) 9841 leal OFF_FP_SHADOWFRAME(rFP), %eax 9842 movl %eax, OUT_ARG1(%esp) 9843 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9844 REFRESH_IBASE 9845 jmp .L_op_nop+(139*128) 9846 9847/* ------------------------------ */ 9848 .balign 128 9849.L_ALT_op_double_to_float: /* 0x8c */ 9850/* File: x86/alt_stub.S */ 9851/* 9852 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9853 * any interesting requests and then jump to the real instruction 9854 * handler. Unlike the Arm handler, we can't do this as a tail call 9855 * because rIBASE is caller save and we need to reload it. 9856 * 9857 * Note that unlike in the Arm implementation, we should never arrive 9858 * here with a zero breakFlag because we always refresh rIBASE on 9859 * return. 9860 */ 9861 .extern MterpCheckBefore 9862 EXPORT_PC 9863 9864 movl rSELF, %ecx 9865 movl %ecx, OUT_ARG0(%esp) 9866 leal OFF_FP_SHADOWFRAME(rFP), %eax 9867 movl %eax, OUT_ARG1(%esp) 9868 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9869 REFRESH_IBASE 9870 jmp .L_op_nop+(140*128) 9871 9872/* ------------------------------ */ 9873 .balign 128 9874.L_ALT_op_int_to_byte: /* 0x8d */ 9875/* File: x86/alt_stub.S */ 9876/* 9877 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9878 * any interesting requests and then jump to the real instruction 9879 * handler. Unlike the Arm handler, we can't do this as a tail call 9880 * because rIBASE is caller save and we need to reload it. 9881 * 9882 * Note that unlike in the Arm implementation, we should never arrive 9883 * here with a zero breakFlag because we always refresh rIBASE on 9884 * return. 9885 */ 9886 .extern MterpCheckBefore 9887 EXPORT_PC 9888 9889 movl rSELF, %ecx 9890 movl %ecx, OUT_ARG0(%esp) 9891 leal OFF_FP_SHADOWFRAME(rFP), %eax 9892 movl %eax, OUT_ARG1(%esp) 9893 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9894 REFRESH_IBASE 9895 jmp .L_op_nop+(141*128) 9896 9897/* ------------------------------ */ 9898 .balign 128 9899.L_ALT_op_int_to_char: /* 0x8e */ 9900/* File: x86/alt_stub.S */ 9901/* 9902 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9903 * any interesting requests and then jump to the real instruction 9904 * handler. Unlike the Arm handler, we can't do this as a tail call 9905 * because rIBASE is caller save and we need to reload it. 9906 * 9907 * Note that unlike in the Arm implementation, we should never arrive 9908 * here with a zero breakFlag because we always refresh rIBASE on 9909 * return. 9910 */ 9911 .extern MterpCheckBefore 9912 EXPORT_PC 9913 9914 movl rSELF, %ecx 9915 movl %ecx, OUT_ARG0(%esp) 9916 leal OFF_FP_SHADOWFRAME(rFP), %eax 9917 movl %eax, OUT_ARG1(%esp) 9918 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9919 REFRESH_IBASE 9920 jmp .L_op_nop+(142*128) 9921 9922/* ------------------------------ */ 9923 .balign 128 9924.L_ALT_op_int_to_short: /* 0x8f */ 9925/* File: x86/alt_stub.S */ 9926/* 9927 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9928 * any interesting requests and then jump to the real instruction 9929 * handler. Unlike the Arm handler, we can't do this as a tail call 9930 * because rIBASE is caller save and we need to reload it. 9931 * 9932 * Note that unlike in the Arm implementation, we should never arrive 9933 * here with a zero breakFlag because we always refresh rIBASE on 9934 * return. 9935 */ 9936 .extern MterpCheckBefore 9937 EXPORT_PC 9938 9939 movl rSELF, %ecx 9940 movl %ecx, OUT_ARG0(%esp) 9941 leal OFF_FP_SHADOWFRAME(rFP), %eax 9942 movl %eax, OUT_ARG1(%esp) 9943 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9944 REFRESH_IBASE 9945 jmp .L_op_nop+(143*128) 9946 9947/* ------------------------------ */ 9948 .balign 128 9949.L_ALT_op_add_int: /* 0x90 */ 9950/* File: x86/alt_stub.S */ 9951/* 9952 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9953 * any interesting requests and then jump to the real instruction 9954 * handler. Unlike the Arm handler, we can't do this as a tail call 9955 * because rIBASE is caller save and we need to reload it. 9956 * 9957 * Note that unlike in the Arm implementation, we should never arrive 9958 * here with a zero breakFlag because we always refresh rIBASE on 9959 * return. 9960 */ 9961 .extern MterpCheckBefore 9962 EXPORT_PC 9963 9964 movl rSELF, %ecx 9965 movl %ecx, OUT_ARG0(%esp) 9966 leal OFF_FP_SHADOWFRAME(rFP), %eax 9967 movl %eax, OUT_ARG1(%esp) 9968 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9969 REFRESH_IBASE 9970 jmp .L_op_nop+(144*128) 9971 9972/* ------------------------------ */ 9973 .balign 128 9974.L_ALT_op_sub_int: /* 0x91 */ 9975/* File: x86/alt_stub.S */ 9976/* 9977 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 9978 * any interesting requests and then jump to the real instruction 9979 * handler. Unlike the Arm handler, we can't do this as a tail call 9980 * because rIBASE is caller save and we need to reload it. 9981 * 9982 * Note that unlike in the Arm implementation, we should never arrive 9983 * here with a zero breakFlag because we always refresh rIBASE on 9984 * return. 9985 */ 9986 .extern MterpCheckBefore 9987 EXPORT_PC 9988 9989 movl rSELF, %ecx 9990 movl %ecx, OUT_ARG0(%esp) 9991 leal OFF_FP_SHADOWFRAME(rFP), %eax 9992 movl %eax, OUT_ARG1(%esp) 9993 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 9994 REFRESH_IBASE 9995 jmp .L_op_nop+(145*128) 9996 9997/* ------------------------------ */ 9998 .balign 128 9999.L_ALT_op_mul_int: /* 0x92 */ 10000/* File: x86/alt_stub.S */ 10001/* 10002 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10003 * any interesting requests and then jump to the real instruction 10004 * handler. Unlike the Arm handler, we can't do this as a tail call 10005 * because rIBASE is caller save and we need to reload it. 10006 * 10007 * Note that unlike in the Arm implementation, we should never arrive 10008 * here with a zero breakFlag because we always refresh rIBASE on 10009 * return. 10010 */ 10011 .extern MterpCheckBefore 10012 EXPORT_PC 10013 10014 movl rSELF, %ecx 10015 movl %ecx, OUT_ARG0(%esp) 10016 leal OFF_FP_SHADOWFRAME(rFP), %eax 10017 movl %eax, OUT_ARG1(%esp) 10018 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10019 REFRESH_IBASE 10020 jmp .L_op_nop+(146*128) 10021 10022/* ------------------------------ */ 10023 .balign 128 10024.L_ALT_op_div_int: /* 0x93 */ 10025/* File: x86/alt_stub.S */ 10026/* 10027 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10028 * any interesting requests and then jump to the real instruction 10029 * handler. Unlike the Arm handler, we can't do this as a tail call 10030 * because rIBASE is caller save and we need to reload it. 10031 * 10032 * Note that unlike in the Arm implementation, we should never arrive 10033 * here with a zero breakFlag because we always refresh rIBASE on 10034 * return. 10035 */ 10036 .extern MterpCheckBefore 10037 EXPORT_PC 10038 10039 movl rSELF, %ecx 10040 movl %ecx, OUT_ARG0(%esp) 10041 leal OFF_FP_SHADOWFRAME(rFP), %eax 10042 movl %eax, OUT_ARG1(%esp) 10043 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10044 REFRESH_IBASE 10045 jmp .L_op_nop+(147*128) 10046 10047/* ------------------------------ */ 10048 .balign 128 10049.L_ALT_op_rem_int: /* 0x94 */ 10050/* File: x86/alt_stub.S */ 10051/* 10052 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10053 * any interesting requests and then jump to the real instruction 10054 * handler. Unlike the Arm handler, we can't do this as a tail call 10055 * because rIBASE is caller save and we need to reload it. 10056 * 10057 * Note that unlike in the Arm implementation, we should never arrive 10058 * here with a zero breakFlag because we always refresh rIBASE on 10059 * return. 10060 */ 10061 .extern MterpCheckBefore 10062 EXPORT_PC 10063 10064 movl rSELF, %ecx 10065 movl %ecx, OUT_ARG0(%esp) 10066 leal OFF_FP_SHADOWFRAME(rFP), %eax 10067 movl %eax, OUT_ARG1(%esp) 10068 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10069 REFRESH_IBASE 10070 jmp .L_op_nop+(148*128) 10071 10072/* ------------------------------ */ 10073 .balign 128 10074.L_ALT_op_and_int: /* 0x95 */ 10075/* File: x86/alt_stub.S */ 10076/* 10077 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10078 * any interesting requests and then jump to the real instruction 10079 * handler. Unlike the Arm handler, we can't do this as a tail call 10080 * because rIBASE is caller save and we need to reload it. 10081 * 10082 * Note that unlike in the Arm implementation, we should never arrive 10083 * here with a zero breakFlag because we always refresh rIBASE on 10084 * return. 10085 */ 10086 .extern MterpCheckBefore 10087 EXPORT_PC 10088 10089 movl rSELF, %ecx 10090 movl %ecx, OUT_ARG0(%esp) 10091 leal OFF_FP_SHADOWFRAME(rFP), %eax 10092 movl %eax, OUT_ARG1(%esp) 10093 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10094 REFRESH_IBASE 10095 jmp .L_op_nop+(149*128) 10096 10097/* ------------------------------ */ 10098 .balign 128 10099.L_ALT_op_or_int: /* 0x96 */ 10100/* File: x86/alt_stub.S */ 10101/* 10102 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10103 * any interesting requests and then jump to the real instruction 10104 * handler. Unlike the Arm handler, we can't do this as a tail call 10105 * because rIBASE is caller save and we need to reload it. 10106 * 10107 * Note that unlike in the Arm implementation, we should never arrive 10108 * here with a zero breakFlag because we always refresh rIBASE on 10109 * return. 10110 */ 10111 .extern MterpCheckBefore 10112 EXPORT_PC 10113 10114 movl rSELF, %ecx 10115 movl %ecx, OUT_ARG0(%esp) 10116 leal OFF_FP_SHADOWFRAME(rFP), %eax 10117 movl %eax, OUT_ARG1(%esp) 10118 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10119 REFRESH_IBASE 10120 jmp .L_op_nop+(150*128) 10121 10122/* ------------------------------ */ 10123 .balign 128 10124.L_ALT_op_xor_int: /* 0x97 */ 10125/* File: x86/alt_stub.S */ 10126/* 10127 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10128 * any interesting requests and then jump to the real instruction 10129 * handler. Unlike the Arm handler, we can't do this as a tail call 10130 * because rIBASE is caller save and we need to reload it. 10131 * 10132 * Note that unlike in the Arm implementation, we should never arrive 10133 * here with a zero breakFlag because we always refresh rIBASE on 10134 * return. 10135 */ 10136 .extern MterpCheckBefore 10137 EXPORT_PC 10138 10139 movl rSELF, %ecx 10140 movl %ecx, OUT_ARG0(%esp) 10141 leal OFF_FP_SHADOWFRAME(rFP), %eax 10142 movl %eax, OUT_ARG1(%esp) 10143 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10144 REFRESH_IBASE 10145 jmp .L_op_nop+(151*128) 10146 10147/* ------------------------------ */ 10148 .balign 128 10149.L_ALT_op_shl_int: /* 0x98 */ 10150/* File: x86/alt_stub.S */ 10151/* 10152 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10153 * any interesting requests and then jump to the real instruction 10154 * handler. Unlike the Arm handler, we can't do this as a tail call 10155 * because rIBASE is caller save and we need to reload it. 10156 * 10157 * Note that unlike in the Arm implementation, we should never arrive 10158 * here with a zero breakFlag because we always refresh rIBASE on 10159 * return. 10160 */ 10161 .extern MterpCheckBefore 10162 EXPORT_PC 10163 10164 movl rSELF, %ecx 10165 movl %ecx, OUT_ARG0(%esp) 10166 leal OFF_FP_SHADOWFRAME(rFP), %eax 10167 movl %eax, OUT_ARG1(%esp) 10168 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10169 REFRESH_IBASE 10170 jmp .L_op_nop+(152*128) 10171 10172/* ------------------------------ */ 10173 .balign 128 10174.L_ALT_op_shr_int: /* 0x99 */ 10175/* File: x86/alt_stub.S */ 10176/* 10177 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10178 * any interesting requests and then jump to the real instruction 10179 * handler. Unlike the Arm handler, we can't do this as a tail call 10180 * because rIBASE is caller save and we need to reload it. 10181 * 10182 * Note that unlike in the Arm implementation, we should never arrive 10183 * here with a zero breakFlag because we always refresh rIBASE on 10184 * return. 10185 */ 10186 .extern MterpCheckBefore 10187 EXPORT_PC 10188 10189 movl rSELF, %ecx 10190 movl %ecx, OUT_ARG0(%esp) 10191 leal OFF_FP_SHADOWFRAME(rFP), %eax 10192 movl %eax, OUT_ARG1(%esp) 10193 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10194 REFRESH_IBASE 10195 jmp .L_op_nop+(153*128) 10196 10197/* ------------------------------ */ 10198 .balign 128 10199.L_ALT_op_ushr_int: /* 0x9a */ 10200/* File: x86/alt_stub.S */ 10201/* 10202 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10203 * any interesting requests and then jump to the real instruction 10204 * handler. Unlike the Arm handler, we can't do this as a tail call 10205 * because rIBASE is caller save and we need to reload it. 10206 * 10207 * Note that unlike in the Arm implementation, we should never arrive 10208 * here with a zero breakFlag because we always refresh rIBASE on 10209 * return. 10210 */ 10211 .extern MterpCheckBefore 10212 EXPORT_PC 10213 10214 movl rSELF, %ecx 10215 movl %ecx, OUT_ARG0(%esp) 10216 leal OFF_FP_SHADOWFRAME(rFP), %eax 10217 movl %eax, OUT_ARG1(%esp) 10218 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10219 REFRESH_IBASE 10220 jmp .L_op_nop+(154*128) 10221 10222/* ------------------------------ */ 10223 .balign 128 10224.L_ALT_op_add_long: /* 0x9b */ 10225/* File: x86/alt_stub.S */ 10226/* 10227 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10228 * any interesting requests and then jump to the real instruction 10229 * handler. Unlike the Arm handler, we can't do this as a tail call 10230 * because rIBASE is caller save and we need to reload it. 10231 * 10232 * Note that unlike in the Arm implementation, we should never arrive 10233 * here with a zero breakFlag because we always refresh rIBASE on 10234 * return. 10235 */ 10236 .extern MterpCheckBefore 10237 EXPORT_PC 10238 10239 movl rSELF, %ecx 10240 movl %ecx, OUT_ARG0(%esp) 10241 leal OFF_FP_SHADOWFRAME(rFP), %eax 10242 movl %eax, OUT_ARG1(%esp) 10243 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10244 REFRESH_IBASE 10245 jmp .L_op_nop+(155*128) 10246 10247/* ------------------------------ */ 10248 .balign 128 10249.L_ALT_op_sub_long: /* 0x9c */ 10250/* File: x86/alt_stub.S */ 10251/* 10252 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10253 * any interesting requests and then jump to the real instruction 10254 * handler. Unlike the Arm handler, we can't do this as a tail call 10255 * because rIBASE is caller save and we need to reload it. 10256 * 10257 * Note that unlike in the Arm implementation, we should never arrive 10258 * here with a zero breakFlag because we always refresh rIBASE on 10259 * return. 10260 */ 10261 .extern MterpCheckBefore 10262 EXPORT_PC 10263 10264 movl rSELF, %ecx 10265 movl %ecx, OUT_ARG0(%esp) 10266 leal OFF_FP_SHADOWFRAME(rFP), %eax 10267 movl %eax, OUT_ARG1(%esp) 10268 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10269 REFRESH_IBASE 10270 jmp .L_op_nop+(156*128) 10271 10272/* ------------------------------ */ 10273 .balign 128 10274.L_ALT_op_mul_long: /* 0x9d */ 10275/* File: x86/alt_stub.S */ 10276/* 10277 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10278 * any interesting requests and then jump to the real instruction 10279 * handler. Unlike the Arm handler, we can't do this as a tail call 10280 * because rIBASE is caller save and we need to reload it. 10281 * 10282 * Note that unlike in the Arm implementation, we should never arrive 10283 * here with a zero breakFlag because we always refresh rIBASE on 10284 * return. 10285 */ 10286 .extern MterpCheckBefore 10287 EXPORT_PC 10288 10289 movl rSELF, %ecx 10290 movl %ecx, OUT_ARG0(%esp) 10291 leal OFF_FP_SHADOWFRAME(rFP), %eax 10292 movl %eax, OUT_ARG1(%esp) 10293 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10294 REFRESH_IBASE 10295 jmp .L_op_nop+(157*128) 10296 10297/* ------------------------------ */ 10298 .balign 128 10299.L_ALT_op_div_long: /* 0x9e */ 10300/* File: x86/alt_stub.S */ 10301/* 10302 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10303 * any interesting requests and then jump to the real instruction 10304 * handler. Unlike the Arm handler, we can't do this as a tail call 10305 * because rIBASE is caller save and we need to reload it. 10306 * 10307 * Note that unlike in the Arm implementation, we should never arrive 10308 * here with a zero breakFlag because we always refresh rIBASE on 10309 * return. 10310 */ 10311 .extern MterpCheckBefore 10312 EXPORT_PC 10313 10314 movl rSELF, %ecx 10315 movl %ecx, OUT_ARG0(%esp) 10316 leal OFF_FP_SHADOWFRAME(rFP), %eax 10317 movl %eax, OUT_ARG1(%esp) 10318 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10319 REFRESH_IBASE 10320 jmp .L_op_nop+(158*128) 10321 10322/* ------------------------------ */ 10323 .balign 128 10324.L_ALT_op_rem_long: /* 0x9f */ 10325/* File: x86/alt_stub.S */ 10326/* 10327 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10328 * any interesting requests and then jump to the real instruction 10329 * handler. Unlike the Arm handler, we can't do this as a tail call 10330 * because rIBASE is caller save and we need to reload it. 10331 * 10332 * Note that unlike in the Arm implementation, we should never arrive 10333 * here with a zero breakFlag because we always refresh rIBASE on 10334 * return. 10335 */ 10336 .extern MterpCheckBefore 10337 EXPORT_PC 10338 10339 movl rSELF, %ecx 10340 movl %ecx, OUT_ARG0(%esp) 10341 leal OFF_FP_SHADOWFRAME(rFP), %eax 10342 movl %eax, OUT_ARG1(%esp) 10343 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10344 REFRESH_IBASE 10345 jmp .L_op_nop+(159*128) 10346 10347/* ------------------------------ */ 10348 .balign 128 10349.L_ALT_op_and_long: /* 0xa0 */ 10350/* File: x86/alt_stub.S */ 10351/* 10352 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10353 * any interesting requests and then jump to the real instruction 10354 * handler. Unlike the Arm handler, we can't do this as a tail call 10355 * because rIBASE is caller save and we need to reload it. 10356 * 10357 * Note that unlike in the Arm implementation, we should never arrive 10358 * here with a zero breakFlag because we always refresh rIBASE on 10359 * return. 10360 */ 10361 .extern MterpCheckBefore 10362 EXPORT_PC 10363 10364 movl rSELF, %ecx 10365 movl %ecx, OUT_ARG0(%esp) 10366 leal OFF_FP_SHADOWFRAME(rFP), %eax 10367 movl %eax, OUT_ARG1(%esp) 10368 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10369 REFRESH_IBASE 10370 jmp .L_op_nop+(160*128) 10371 10372/* ------------------------------ */ 10373 .balign 128 10374.L_ALT_op_or_long: /* 0xa1 */ 10375/* File: x86/alt_stub.S */ 10376/* 10377 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10378 * any interesting requests and then jump to the real instruction 10379 * handler. Unlike the Arm handler, we can't do this as a tail call 10380 * because rIBASE is caller save and we need to reload it. 10381 * 10382 * Note that unlike in the Arm implementation, we should never arrive 10383 * here with a zero breakFlag because we always refresh rIBASE on 10384 * return. 10385 */ 10386 .extern MterpCheckBefore 10387 EXPORT_PC 10388 10389 movl rSELF, %ecx 10390 movl %ecx, OUT_ARG0(%esp) 10391 leal OFF_FP_SHADOWFRAME(rFP), %eax 10392 movl %eax, OUT_ARG1(%esp) 10393 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10394 REFRESH_IBASE 10395 jmp .L_op_nop+(161*128) 10396 10397/* ------------------------------ */ 10398 .balign 128 10399.L_ALT_op_xor_long: /* 0xa2 */ 10400/* File: x86/alt_stub.S */ 10401/* 10402 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10403 * any interesting requests and then jump to the real instruction 10404 * handler. Unlike the Arm handler, we can't do this as a tail call 10405 * because rIBASE is caller save and we need to reload it. 10406 * 10407 * Note that unlike in the Arm implementation, we should never arrive 10408 * here with a zero breakFlag because we always refresh rIBASE on 10409 * return. 10410 */ 10411 .extern MterpCheckBefore 10412 EXPORT_PC 10413 10414 movl rSELF, %ecx 10415 movl %ecx, OUT_ARG0(%esp) 10416 leal OFF_FP_SHADOWFRAME(rFP), %eax 10417 movl %eax, OUT_ARG1(%esp) 10418 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10419 REFRESH_IBASE 10420 jmp .L_op_nop+(162*128) 10421 10422/* ------------------------------ */ 10423 .balign 128 10424.L_ALT_op_shl_long: /* 0xa3 */ 10425/* File: x86/alt_stub.S */ 10426/* 10427 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10428 * any interesting requests and then jump to the real instruction 10429 * handler. Unlike the Arm handler, we can't do this as a tail call 10430 * because rIBASE is caller save and we need to reload it. 10431 * 10432 * Note that unlike in the Arm implementation, we should never arrive 10433 * here with a zero breakFlag because we always refresh rIBASE on 10434 * return. 10435 */ 10436 .extern MterpCheckBefore 10437 EXPORT_PC 10438 10439 movl rSELF, %ecx 10440 movl %ecx, OUT_ARG0(%esp) 10441 leal OFF_FP_SHADOWFRAME(rFP), %eax 10442 movl %eax, OUT_ARG1(%esp) 10443 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10444 REFRESH_IBASE 10445 jmp .L_op_nop+(163*128) 10446 10447/* ------------------------------ */ 10448 .balign 128 10449.L_ALT_op_shr_long: /* 0xa4 */ 10450/* File: x86/alt_stub.S */ 10451/* 10452 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10453 * any interesting requests and then jump to the real instruction 10454 * handler. Unlike the Arm handler, we can't do this as a tail call 10455 * because rIBASE is caller save and we need to reload it. 10456 * 10457 * Note that unlike in the Arm implementation, we should never arrive 10458 * here with a zero breakFlag because we always refresh rIBASE on 10459 * return. 10460 */ 10461 .extern MterpCheckBefore 10462 EXPORT_PC 10463 10464 movl rSELF, %ecx 10465 movl %ecx, OUT_ARG0(%esp) 10466 leal OFF_FP_SHADOWFRAME(rFP), %eax 10467 movl %eax, OUT_ARG1(%esp) 10468 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10469 REFRESH_IBASE 10470 jmp .L_op_nop+(164*128) 10471 10472/* ------------------------------ */ 10473 .balign 128 10474.L_ALT_op_ushr_long: /* 0xa5 */ 10475/* File: x86/alt_stub.S */ 10476/* 10477 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10478 * any interesting requests and then jump to the real instruction 10479 * handler. Unlike the Arm handler, we can't do this as a tail call 10480 * because rIBASE is caller save and we need to reload it. 10481 * 10482 * Note that unlike in the Arm implementation, we should never arrive 10483 * here with a zero breakFlag because we always refresh rIBASE on 10484 * return. 10485 */ 10486 .extern MterpCheckBefore 10487 EXPORT_PC 10488 10489 movl rSELF, %ecx 10490 movl %ecx, OUT_ARG0(%esp) 10491 leal OFF_FP_SHADOWFRAME(rFP), %eax 10492 movl %eax, OUT_ARG1(%esp) 10493 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10494 REFRESH_IBASE 10495 jmp .L_op_nop+(165*128) 10496 10497/* ------------------------------ */ 10498 .balign 128 10499.L_ALT_op_add_float: /* 0xa6 */ 10500/* File: x86/alt_stub.S */ 10501/* 10502 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10503 * any interesting requests and then jump to the real instruction 10504 * handler. Unlike the Arm handler, we can't do this as a tail call 10505 * because rIBASE is caller save and we need to reload it. 10506 * 10507 * Note that unlike in the Arm implementation, we should never arrive 10508 * here with a zero breakFlag because we always refresh rIBASE on 10509 * return. 10510 */ 10511 .extern MterpCheckBefore 10512 EXPORT_PC 10513 10514 movl rSELF, %ecx 10515 movl %ecx, OUT_ARG0(%esp) 10516 leal OFF_FP_SHADOWFRAME(rFP), %eax 10517 movl %eax, OUT_ARG1(%esp) 10518 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10519 REFRESH_IBASE 10520 jmp .L_op_nop+(166*128) 10521 10522/* ------------------------------ */ 10523 .balign 128 10524.L_ALT_op_sub_float: /* 0xa7 */ 10525/* File: x86/alt_stub.S */ 10526/* 10527 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10528 * any interesting requests and then jump to the real instruction 10529 * handler. Unlike the Arm handler, we can't do this as a tail call 10530 * because rIBASE is caller save and we need to reload it. 10531 * 10532 * Note that unlike in the Arm implementation, we should never arrive 10533 * here with a zero breakFlag because we always refresh rIBASE on 10534 * return. 10535 */ 10536 .extern MterpCheckBefore 10537 EXPORT_PC 10538 10539 movl rSELF, %ecx 10540 movl %ecx, OUT_ARG0(%esp) 10541 leal OFF_FP_SHADOWFRAME(rFP), %eax 10542 movl %eax, OUT_ARG1(%esp) 10543 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10544 REFRESH_IBASE 10545 jmp .L_op_nop+(167*128) 10546 10547/* ------------------------------ */ 10548 .balign 128 10549.L_ALT_op_mul_float: /* 0xa8 */ 10550/* File: x86/alt_stub.S */ 10551/* 10552 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10553 * any interesting requests and then jump to the real instruction 10554 * handler. Unlike the Arm handler, we can't do this as a tail call 10555 * because rIBASE is caller save and we need to reload it. 10556 * 10557 * Note that unlike in the Arm implementation, we should never arrive 10558 * here with a zero breakFlag because we always refresh rIBASE on 10559 * return. 10560 */ 10561 .extern MterpCheckBefore 10562 EXPORT_PC 10563 10564 movl rSELF, %ecx 10565 movl %ecx, OUT_ARG0(%esp) 10566 leal OFF_FP_SHADOWFRAME(rFP), %eax 10567 movl %eax, OUT_ARG1(%esp) 10568 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10569 REFRESH_IBASE 10570 jmp .L_op_nop+(168*128) 10571 10572/* ------------------------------ */ 10573 .balign 128 10574.L_ALT_op_div_float: /* 0xa9 */ 10575/* File: x86/alt_stub.S */ 10576/* 10577 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10578 * any interesting requests and then jump to the real instruction 10579 * handler. Unlike the Arm handler, we can't do this as a tail call 10580 * because rIBASE is caller save and we need to reload it. 10581 * 10582 * Note that unlike in the Arm implementation, we should never arrive 10583 * here with a zero breakFlag because we always refresh rIBASE on 10584 * return. 10585 */ 10586 .extern MterpCheckBefore 10587 EXPORT_PC 10588 10589 movl rSELF, %ecx 10590 movl %ecx, OUT_ARG0(%esp) 10591 leal OFF_FP_SHADOWFRAME(rFP), %eax 10592 movl %eax, OUT_ARG1(%esp) 10593 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10594 REFRESH_IBASE 10595 jmp .L_op_nop+(169*128) 10596 10597/* ------------------------------ */ 10598 .balign 128 10599.L_ALT_op_rem_float: /* 0xaa */ 10600/* File: x86/alt_stub.S */ 10601/* 10602 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10603 * any interesting requests and then jump to the real instruction 10604 * handler. Unlike the Arm handler, we can't do this as a tail call 10605 * because rIBASE is caller save and we need to reload it. 10606 * 10607 * Note that unlike in the Arm implementation, we should never arrive 10608 * here with a zero breakFlag because we always refresh rIBASE on 10609 * return. 10610 */ 10611 .extern MterpCheckBefore 10612 EXPORT_PC 10613 10614 movl rSELF, %ecx 10615 movl %ecx, OUT_ARG0(%esp) 10616 leal OFF_FP_SHADOWFRAME(rFP), %eax 10617 movl %eax, OUT_ARG1(%esp) 10618 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10619 REFRESH_IBASE 10620 jmp .L_op_nop+(170*128) 10621 10622/* ------------------------------ */ 10623 .balign 128 10624.L_ALT_op_add_double: /* 0xab */ 10625/* File: x86/alt_stub.S */ 10626/* 10627 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10628 * any interesting requests and then jump to the real instruction 10629 * handler. Unlike the Arm handler, we can't do this as a tail call 10630 * because rIBASE is caller save and we need to reload it. 10631 * 10632 * Note that unlike in the Arm implementation, we should never arrive 10633 * here with a zero breakFlag because we always refresh rIBASE on 10634 * return. 10635 */ 10636 .extern MterpCheckBefore 10637 EXPORT_PC 10638 10639 movl rSELF, %ecx 10640 movl %ecx, OUT_ARG0(%esp) 10641 leal OFF_FP_SHADOWFRAME(rFP), %eax 10642 movl %eax, OUT_ARG1(%esp) 10643 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10644 REFRESH_IBASE 10645 jmp .L_op_nop+(171*128) 10646 10647/* ------------------------------ */ 10648 .balign 128 10649.L_ALT_op_sub_double: /* 0xac */ 10650/* File: x86/alt_stub.S */ 10651/* 10652 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10653 * any interesting requests and then jump to the real instruction 10654 * handler. Unlike the Arm handler, we can't do this as a tail call 10655 * because rIBASE is caller save and we need to reload it. 10656 * 10657 * Note that unlike in the Arm implementation, we should never arrive 10658 * here with a zero breakFlag because we always refresh rIBASE on 10659 * return. 10660 */ 10661 .extern MterpCheckBefore 10662 EXPORT_PC 10663 10664 movl rSELF, %ecx 10665 movl %ecx, OUT_ARG0(%esp) 10666 leal OFF_FP_SHADOWFRAME(rFP), %eax 10667 movl %eax, OUT_ARG1(%esp) 10668 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10669 REFRESH_IBASE 10670 jmp .L_op_nop+(172*128) 10671 10672/* ------------------------------ */ 10673 .balign 128 10674.L_ALT_op_mul_double: /* 0xad */ 10675/* File: x86/alt_stub.S */ 10676/* 10677 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10678 * any interesting requests and then jump to the real instruction 10679 * handler. Unlike the Arm handler, we can't do this as a tail call 10680 * because rIBASE is caller save and we need to reload it. 10681 * 10682 * Note that unlike in the Arm implementation, we should never arrive 10683 * here with a zero breakFlag because we always refresh rIBASE on 10684 * return. 10685 */ 10686 .extern MterpCheckBefore 10687 EXPORT_PC 10688 10689 movl rSELF, %ecx 10690 movl %ecx, OUT_ARG0(%esp) 10691 leal OFF_FP_SHADOWFRAME(rFP), %eax 10692 movl %eax, OUT_ARG1(%esp) 10693 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10694 REFRESH_IBASE 10695 jmp .L_op_nop+(173*128) 10696 10697/* ------------------------------ */ 10698 .balign 128 10699.L_ALT_op_div_double: /* 0xae */ 10700/* File: x86/alt_stub.S */ 10701/* 10702 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10703 * any interesting requests and then jump to the real instruction 10704 * handler. Unlike the Arm handler, we can't do this as a tail call 10705 * because rIBASE is caller save and we need to reload it. 10706 * 10707 * Note that unlike in the Arm implementation, we should never arrive 10708 * here with a zero breakFlag because we always refresh rIBASE on 10709 * return. 10710 */ 10711 .extern MterpCheckBefore 10712 EXPORT_PC 10713 10714 movl rSELF, %ecx 10715 movl %ecx, OUT_ARG0(%esp) 10716 leal OFF_FP_SHADOWFRAME(rFP), %eax 10717 movl %eax, OUT_ARG1(%esp) 10718 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10719 REFRESH_IBASE 10720 jmp .L_op_nop+(174*128) 10721 10722/* ------------------------------ */ 10723 .balign 128 10724.L_ALT_op_rem_double: /* 0xaf */ 10725/* File: x86/alt_stub.S */ 10726/* 10727 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10728 * any interesting requests and then jump to the real instruction 10729 * handler. Unlike the Arm handler, we can't do this as a tail call 10730 * because rIBASE is caller save and we need to reload it. 10731 * 10732 * Note that unlike in the Arm implementation, we should never arrive 10733 * here with a zero breakFlag because we always refresh rIBASE on 10734 * return. 10735 */ 10736 .extern MterpCheckBefore 10737 EXPORT_PC 10738 10739 movl rSELF, %ecx 10740 movl %ecx, OUT_ARG0(%esp) 10741 leal OFF_FP_SHADOWFRAME(rFP), %eax 10742 movl %eax, OUT_ARG1(%esp) 10743 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10744 REFRESH_IBASE 10745 jmp .L_op_nop+(175*128) 10746 10747/* ------------------------------ */ 10748 .balign 128 10749.L_ALT_op_add_int_2addr: /* 0xb0 */ 10750/* File: x86/alt_stub.S */ 10751/* 10752 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10753 * any interesting requests and then jump to the real instruction 10754 * handler. Unlike the Arm handler, we can't do this as a tail call 10755 * because rIBASE is caller save and we need to reload it. 10756 * 10757 * Note that unlike in the Arm implementation, we should never arrive 10758 * here with a zero breakFlag because we always refresh rIBASE on 10759 * return. 10760 */ 10761 .extern MterpCheckBefore 10762 EXPORT_PC 10763 10764 movl rSELF, %ecx 10765 movl %ecx, OUT_ARG0(%esp) 10766 leal OFF_FP_SHADOWFRAME(rFP), %eax 10767 movl %eax, OUT_ARG1(%esp) 10768 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10769 REFRESH_IBASE 10770 jmp .L_op_nop+(176*128) 10771 10772/* ------------------------------ */ 10773 .balign 128 10774.L_ALT_op_sub_int_2addr: /* 0xb1 */ 10775/* File: x86/alt_stub.S */ 10776/* 10777 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10778 * any interesting requests and then jump to the real instruction 10779 * handler. Unlike the Arm handler, we can't do this as a tail call 10780 * because rIBASE is caller save and we need to reload it. 10781 * 10782 * Note that unlike in the Arm implementation, we should never arrive 10783 * here with a zero breakFlag because we always refresh rIBASE on 10784 * return. 10785 */ 10786 .extern MterpCheckBefore 10787 EXPORT_PC 10788 10789 movl rSELF, %ecx 10790 movl %ecx, OUT_ARG0(%esp) 10791 leal OFF_FP_SHADOWFRAME(rFP), %eax 10792 movl %eax, OUT_ARG1(%esp) 10793 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10794 REFRESH_IBASE 10795 jmp .L_op_nop+(177*128) 10796 10797/* ------------------------------ */ 10798 .balign 128 10799.L_ALT_op_mul_int_2addr: /* 0xb2 */ 10800/* File: x86/alt_stub.S */ 10801/* 10802 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10803 * any interesting requests and then jump to the real instruction 10804 * handler. Unlike the Arm handler, we can't do this as a tail call 10805 * because rIBASE is caller save and we need to reload it. 10806 * 10807 * Note that unlike in the Arm implementation, we should never arrive 10808 * here with a zero breakFlag because we always refresh rIBASE on 10809 * return. 10810 */ 10811 .extern MterpCheckBefore 10812 EXPORT_PC 10813 10814 movl rSELF, %ecx 10815 movl %ecx, OUT_ARG0(%esp) 10816 leal OFF_FP_SHADOWFRAME(rFP), %eax 10817 movl %eax, OUT_ARG1(%esp) 10818 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10819 REFRESH_IBASE 10820 jmp .L_op_nop+(178*128) 10821 10822/* ------------------------------ */ 10823 .balign 128 10824.L_ALT_op_div_int_2addr: /* 0xb3 */ 10825/* File: x86/alt_stub.S */ 10826/* 10827 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10828 * any interesting requests and then jump to the real instruction 10829 * handler. Unlike the Arm handler, we can't do this as a tail call 10830 * because rIBASE is caller save and we need to reload it. 10831 * 10832 * Note that unlike in the Arm implementation, we should never arrive 10833 * here with a zero breakFlag because we always refresh rIBASE on 10834 * return. 10835 */ 10836 .extern MterpCheckBefore 10837 EXPORT_PC 10838 10839 movl rSELF, %ecx 10840 movl %ecx, OUT_ARG0(%esp) 10841 leal OFF_FP_SHADOWFRAME(rFP), %eax 10842 movl %eax, OUT_ARG1(%esp) 10843 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10844 REFRESH_IBASE 10845 jmp .L_op_nop+(179*128) 10846 10847/* ------------------------------ */ 10848 .balign 128 10849.L_ALT_op_rem_int_2addr: /* 0xb4 */ 10850/* File: x86/alt_stub.S */ 10851/* 10852 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10853 * any interesting requests and then jump to the real instruction 10854 * handler. Unlike the Arm handler, we can't do this as a tail call 10855 * because rIBASE is caller save and we need to reload it. 10856 * 10857 * Note that unlike in the Arm implementation, we should never arrive 10858 * here with a zero breakFlag because we always refresh rIBASE on 10859 * return. 10860 */ 10861 .extern MterpCheckBefore 10862 EXPORT_PC 10863 10864 movl rSELF, %ecx 10865 movl %ecx, OUT_ARG0(%esp) 10866 leal OFF_FP_SHADOWFRAME(rFP), %eax 10867 movl %eax, OUT_ARG1(%esp) 10868 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10869 REFRESH_IBASE 10870 jmp .L_op_nop+(180*128) 10871 10872/* ------------------------------ */ 10873 .balign 128 10874.L_ALT_op_and_int_2addr: /* 0xb5 */ 10875/* File: x86/alt_stub.S */ 10876/* 10877 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10878 * any interesting requests and then jump to the real instruction 10879 * handler. Unlike the Arm handler, we can't do this as a tail call 10880 * because rIBASE is caller save and we need to reload it. 10881 * 10882 * Note that unlike in the Arm implementation, we should never arrive 10883 * here with a zero breakFlag because we always refresh rIBASE on 10884 * return. 10885 */ 10886 .extern MterpCheckBefore 10887 EXPORT_PC 10888 10889 movl rSELF, %ecx 10890 movl %ecx, OUT_ARG0(%esp) 10891 leal OFF_FP_SHADOWFRAME(rFP), %eax 10892 movl %eax, OUT_ARG1(%esp) 10893 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10894 REFRESH_IBASE 10895 jmp .L_op_nop+(181*128) 10896 10897/* ------------------------------ */ 10898 .balign 128 10899.L_ALT_op_or_int_2addr: /* 0xb6 */ 10900/* File: x86/alt_stub.S */ 10901/* 10902 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10903 * any interesting requests and then jump to the real instruction 10904 * handler. Unlike the Arm handler, we can't do this as a tail call 10905 * because rIBASE is caller save and we need to reload it. 10906 * 10907 * Note that unlike in the Arm implementation, we should never arrive 10908 * here with a zero breakFlag because we always refresh rIBASE on 10909 * return. 10910 */ 10911 .extern MterpCheckBefore 10912 EXPORT_PC 10913 10914 movl rSELF, %ecx 10915 movl %ecx, OUT_ARG0(%esp) 10916 leal OFF_FP_SHADOWFRAME(rFP), %eax 10917 movl %eax, OUT_ARG1(%esp) 10918 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10919 REFRESH_IBASE 10920 jmp .L_op_nop+(182*128) 10921 10922/* ------------------------------ */ 10923 .balign 128 10924.L_ALT_op_xor_int_2addr: /* 0xb7 */ 10925/* File: x86/alt_stub.S */ 10926/* 10927 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10928 * any interesting requests and then jump to the real instruction 10929 * handler. Unlike the Arm handler, we can't do this as a tail call 10930 * because rIBASE is caller save and we need to reload it. 10931 * 10932 * Note that unlike in the Arm implementation, we should never arrive 10933 * here with a zero breakFlag because we always refresh rIBASE on 10934 * return. 10935 */ 10936 .extern MterpCheckBefore 10937 EXPORT_PC 10938 10939 movl rSELF, %ecx 10940 movl %ecx, OUT_ARG0(%esp) 10941 leal OFF_FP_SHADOWFRAME(rFP), %eax 10942 movl %eax, OUT_ARG1(%esp) 10943 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10944 REFRESH_IBASE 10945 jmp .L_op_nop+(183*128) 10946 10947/* ------------------------------ */ 10948 .balign 128 10949.L_ALT_op_shl_int_2addr: /* 0xb8 */ 10950/* File: x86/alt_stub.S */ 10951/* 10952 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10953 * any interesting requests and then jump to the real instruction 10954 * handler. Unlike the Arm handler, we can't do this as a tail call 10955 * because rIBASE is caller save and we need to reload it. 10956 * 10957 * Note that unlike in the Arm implementation, we should never arrive 10958 * here with a zero breakFlag because we always refresh rIBASE on 10959 * return. 10960 */ 10961 .extern MterpCheckBefore 10962 EXPORT_PC 10963 10964 movl rSELF, %ecx 10965 movl %ecx, OUT_ARG0(%esp) 10966 leal OFF_FP_SHADOWFRAME(rFP), %eax 10967 movl %eax, OUT_ARG1(%esp) 10968 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10969 REFRESH_IBASE 10970 jmp .L_op_nop+(184*128) 10971 10972/* ------------------------------ */ 10973 .balign 128 10974.L_ALT_op_shr_int_2addr: /* 0xb9 */ 10975/* File: x86/alt_stub.S */ 10976/* 10977 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 10978 * any interesting requests and then jump to the real instruction 10979 * handler. Unlike the Arm handler, we can't do this as a tail call 10980 * because rIBASE is caller save and we need to reload it. 10981 * 10982 * Note that unlike in the Arm implementation, we should never arrive 10983 * here with a zero breakFlag because we always refresh rIBASE on 10984 * return. 10985 */ 10986 .extern MterpCheckBefore 10987 EXPORT_PC 10988 10989 movl rSELF, %ecx 10990 movl %ecx, OUT_ARG0(%esp) 10991 leal OFF_FP_SHADOWFRAME(rFP), %eax 10992 movl %eax, OUT_ARG1(%esp) 10993 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 10994 REFRESH_IBASE 10995 jmp .L_op_nop+(185*128) 10996 10997/* ------------------------------ */ 10998 .balign 128 10999.L_ALT_op_ushr_int_2addr: /* 0xba */ 11000/* File: x86/alt_stub.S */ 11001/* 11002 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11003 * any interesting requests and then jump to the real instruction 11004 * handler. Unlike the Arm handler, we can't do this as a tail call 11005 * because rIBASE is caller save and we need to reload it. 11006 * 11007 * Note that unlike in the Arm implementation, we should never arrive 11008 * here with a zero breakFlag because we always refresh rIBASE on 11009 * return. 11010 */ 11011 .extern MterpCheckBefore 11012 EXPORT_PC 11013 11014 movl rSELF, %ecx 11015 movl %ecx, OUT_ARG0(%esp) 11016 leal OFF_FP_SHADOWFRAME(rFP), %eax 11017 movl %eax, OUT_ARG1(%esp) 11018 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11019 REFRESH_IBASE 11020 jmp .L_op_nop+(186*128) 11021 11022/* ------------------------------ */ 11023 .balign 128 11024.L_ALT_op_add_long_2addr: /* 0xbb */ 11025/* File: x86/alt_stub.S */ 11026/* 11027 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11028 * any interesting requests and then jump to the real instruction 11029 * handler. Unlike the Arm handler, we can't do this as a tail call 11030 * because rIBASE is caller save and we need to reload it. 11031 * 11032 * Note that unlike in the Arm implementation, we should never arrive 11033 * here with a zero breakFlag because we always refresh rIBASE on 11034 * return. 11035 */ 11036 .extern MterpCheckBefore 11037 EXPORT_PC 11038 11039 movl rSELF, %ecx 11040 movl %ecx, OUT_ARG0(%esp) 11041 leal OFF_FP_SHADOWFRAME(rFP), %eax 11042 movl %eax, OUT_ARG1(%esp) 11043 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11044 REFRESH_IBASE 11045 jmp .L_op_nop+(187*128) 11046 11047/* ------------------------------ */ 11048 .balign 128 11049.L_ALT_op_sub_long_2addr: /* 0xbc */ 11050/* File: x86/alt_stub.S */ 11051/* 11052 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11053 * any interesting requests and then jump to the real instruction 11054 * handler. Unlike the Arm handler, we can't do this as a tail call 11055 * because rIBASE is caller save and we need to reload it. 11056 * 11057 * Note that unlike in the Arm implementation, we should never arrive 11058 * here with a zero breakFlag because we always refresh rIBASE on 11059 * return. 11060 */ 11061 .extern MterpCheckBefore 11062 EXPORT_PC 11063 11064 movl rSELF, %ecx 11065 movl %ecx, OUT_ARG0(%esp) 11066 leal OFF_FP_SHADOWFRAME(rFP), %eax 11067 movl %eax, OUT_ARG1(%esp) 11068 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11069 REFRESH_IBASE 11070 jmp .L_op_nop+(188*128) 11071 11072/* ------------------------------ */ 11073 .balign 128 11074.L_ALT_op_mul_long_2addr: /* 0xbd */ 11075/* File: x86/alt_stub.S */ 11076/* 11077 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11078 * any interesting requests and then jump to the real instruction 11079 * handler. Unlike the Arm handler, we can't do this as a tail call 11080 * because rIBASE is caller save and we need to reload it. 11081 * 11082 * Note that unlike in the Arm implementation, we should never arrive 11083 * here with a zero breakFlag because we always refresh rIBASE on 11084 * return. 11085 */ 11086 .extern MterpCheckBefore 11087 EXPORT_PC 11088 11089 movl rSELF, %ecx 11090 movl %ecx, OUT_ARG0(%esp) 11091 leal OFF_FP_SHADOWFRAME(rFP), %eax 11092 movl %eax, OUT_ARG1(%esp) 11093 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11094 REFRESH_IBASE 11095 jmp .L_op_nop+(189*128) 11096 11097/* ------------------------------ */ 11098 .balign 128 11099.L_ALT_op_div_long_2addr: /* 0xbe */ 11100/* File: x86/alt_stub.S */ 11101/* 11102 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11103 * any interesting requests and then jump to the real instruction 11104 * handler. Unlike the Arm handler, we can't do this as a tail call 11105 * because rIBASE is caller save and we need to reload it. 11106 * 11107 * Note that unlike in the Arm implementation, we should never arrive 11108 * here with a zero breakFlag because we always refresh rIBASE on 11109 * return. 11110 */ 11111 .extern MterpCheckBefore 11112 EXPORT_PC 11113 11114 movl rSELF, %ecx 11115 movl %ecx, OUT_ARG0(%esp) 11116 leal OFF_FP_SHADOWFRAME(rFP), %eax 11117 movl %eax, OUT_ARG1(%esp) 11118 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11119 REFRESH_IBASE 11120 jmp .L_op_nop+(190*128) 11121 11122/* ------------------------------ */ 11123 .balign 128 11124.L_ALT_op_rem_long_2addr: /* 0xbf */ 11125/* File: x86/alt_stub.S */ 11126/* 11127 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11128 * any interesting requests and then jump to the real instruction 11129 * handler. Unlike the Arm handler, we can't do this as a tail call 11130 * because rIBASE is caller save and we need to reload it. 11131 * 11132 * Note that unlike in the Arm implementation, we should never arrive 11133 * here with a zero breakFlag because we always refresh rIBASE on 11134 * return. 11135 */ 11136 .extern MterpCheckBefore 11137 EXPORT_PC 11138 11139 movl rSELF, %ecx 11140 movl %ecx, OUT_ARG0(%esp) 11141 leal OFF_FP_SHADOWFRAME(rFP), %eax 11142 movl %eax, OUT_ARG1(%esp) 11143 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11144 REFRESH_IBASE 11145 jmp .L_op_nop+(191*128) 11146 11147/* ------------------------------ */ 11148 .balign 128 11149.L_ALT_op_and_long_2addr: /* 0xc0 */ 11150/* File: x86/alt_stub.S */ 11151/* 11152 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11153 * any interesting requests and then jump to the real instruction 11154 * handler. Unlike the Arm handler, we can't do this as a tail call 11155 * because rIBASE is caller save and we need to reload it. 11156 * 11157 * Note that unlike in the Arm implementation, we should never arrive 11158 * here with a zero breakFlag because we always refresh rIBASE on 11159 * return. 11160 */ 11161 .extern MterpCheckBefore 11162 EXPORT_PC 11163 11164 movl rSELF, %ecx 11165 movl %ecx, OUT_ARG0(%esp) 11166 leal OFF_FP_SHADOWFRAME(rFP), %eax 11167 movl %eax, OUT_ARG1(%esp) 11168 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11169 REFRESH_IBASE 11170 jmp .L_op_nop+(192*128) 11171 11172/* ------------------------------ */ 11173 .balign 128 11174.L_ALT_op_or_long_2addr: /* 0xc1 */ 11175/* File: x86/alt_stub.S */ 11176/* 11177 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11178 * any interesting requests and then jump to the real instruction 11179 * handler. Unlike the Arm handler, we can't do this as a tail call 11180 * because rIBASE is caller save and we need to reload it. 11181 * 11182 * Note that unlike in the Arm implementation, we should never arrive 11183 * here with a zero breakFlag because we always refresh rIBASE on 11184 * return. 11185 */ 11186 .extern MterpCheckBefore 11187 EXPORT_PC 11188 11189 movl rSELF, %ecx 11190 movl %ecx, OUT_ARG0(%esp) 11191 leal OFF_FP_SHADOWFRAME(rFP), %eax 11192 movl %eax, OUT_ARG1(%esp) 11193 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11194 REFRESH_IBASE 11195 jmp .L_op_nop+(193*128) 11196 11197/* ------------------------------ */ 11198 .balign 128 11199.L_ALT_op_xor_long_2addr: /* 0xc2 */ 11200/* File: x86/alt_stub.S */ 11201/* 11202 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11203 * any interesting requests and then jump to the real instruction 11204 * handler. Unlike the Arm handler, we can't do this as a tail call 11205 * because rIBASE is caller save and we need to reload it. 11206 * 11207 * Note that unlike in the Arm implementation, we should never arrive 11208 * here with a zero breakFlag because we always refresh rIBASE on 11209 * return. 11210 */ 11211 .extern MterpCheckBefore 11212 EXPORT_PC 11213 11214 movl rSELF, %ecx 11215 movl %ecx, OUT_ARG0(%esp) 11216 leal OFF_FP_SHADOWFRAME(rFP), %eax 11217 movl %eax, OUT_ARG1(%esp) 11218 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11219 REFRESH_IBASE 11220 jmp .L_op_nop+(194*128) 11221 11222/* ------------------------------ */ 11223 .balign 128 11224.L_ALT_op_shl_long_2addr: /* 0xc3 */ 11225/* File: x86/alt_stub.S */ 11226/* 11227 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11228 * any interesting requests and then jump to the real instruction 11229 * handler. Unlike the Arm handler, we can't do this as a tail call 11230 * because rIBASE is caller save and we need to reload it. 11231 * 11232 * Note that unlike in the Arm implementation, we should never arrive 11233 * here with a zero breakFlag because we always refresh rIBASE on 11234 * return. 11235 */ 11236 .extern MterpCheckBefore 11237 EXPORT_PC 11238 11239 movl rSELF, %ecx 11240 movl %ecx, OUT_ARG0(%esp) 11241 leal OFF_FP_SHADOWFRAME(rFP), %eax 11242 movl %eax, OUT_ARG1(%esp) 11243 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11244 REFRESH_IBASE 11245 jmp .L_op_nop+(195*128) 11246 11247/* ------------------------------ */ 11248 .balign 128 11249.L_ALT_op_shr_long_2addr: /* 0xc4 */ 11250/* File: x86/alt_stub.S */ 11251/* 11252 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11253 * any interesting requests and then jump to the real instruction 11254 * handler. Unlike the Arm handler, we can't do this as a tail call 11255 * because rIBASE is caller save and we need to reload it. 11256 * 11257 * Note that unlike in the Arm implementation, we should never arrive 11258 * here with a zero breakFlag because we always refresh rIBASE on 11259 * return. 11260 */ 11261 .extern MterpCheckBefore 11262 EXPORT_PC 11263 11264 movl rSELF, %ecx 11265 movl %ecx, OUT_ARG0(%esp) 11266 leal OFF_FP_SHADOWFRAME(rFP), %eax 11267 movl %eax, OUT_ARG1(%esp) 11268 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11269 REFRESH_IBASE 11270 jmp .L_op_nop+(196*128) 11271 11272/* ------------------------------ */ 11273 .balign 128 11274.L_ALT_op_ushr_long_2addr: /* 0xc5 */ 11275/* File: x86/alt_stub.S */ 11276/* 11277 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11278 * any interesting requests and then jump to the real instruction 11279 * handler. Unlike the Arm handler, we can't do this as a tail call 11280 * because rIBASE is caller save and we need to reload it. 11281 * 11282 * Note that unlike in the Arm implementation, we should never arrive 11283 * here with a zero breakFlag because we always refresh rIBASE on 11284 * return. 11285 */ 11286 .extern MterpCheckBefore 11287 EXPORT_PC 11288 11289 movl rSELF, %ecx 11290 movl %ecx, OUT_ARG0(%esp) 11291 leal OFF_FP_SHADOWFRAME(rFP), %eax 11292 movl %eax, OUT_ARG1(%esp) 11293 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11294 REFRESH_IBASE 11295 jmp .L_op_nop+(197*128) 11296 11297/* ------------------------------ */ 11298 .balign 128 11299.L_ALT_op_add_float_2addr: /* 0xc6 */ 11300/* File: x86/alt_stub.S */ 11301/* 11302 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11303 * any interesting requests and then jump to the real instruction 11304 * handler. Unlike the Arm handler, we can't do this as a tail call 11305 * because rIBASE is caller save and we need to reload it. 11306 * 11307 * Note that unlike in the Arm implementation, we should never arrive 11308 * here with a zero breakFlag because we always refresh rIBASE on 11309 * return. 11310 */ 11311 .extern MterpCheckBefore 11312 EXPORT_PC 11313 11314 movl rSELF, %ecx 11315 movl %ecx, OUT_ARG0(%esp) 11316 leal OFF_FP_SHADOWFRAME(rFP), %eax 11317 movl %eax, OUT_ARG1(%esp) 11318 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11319 REFRESH_IBASE 11320 jmp .L_op_nop+(198*128) 11321 11322/* ------------------------------ */ 11323 .balign 128 11324.L_ALT_op_sub_float_2addr: /* 0xc7 */ 11325/* File: x86/alt_stub.S */ 11326/* 11327 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11328 * any interesting requests and then jump to the real instruction 11329 * handler. Unlike the Arm handler, we can't do this as a tail call 11330 * because rIBASE is caller save and we need to reload it. 11331 * 11332 * Note that unlike in the Arm implementation, we should never arrive 11333 * here with a zero breakFlag because we always refresh rIBASE on 11334 * return. 11335 */ 11336 .extern MterpCheckBefore 11337 EXPORT_PC 11338 11339 movl rSELF, %ecx 11340 movl %ecx, OUT_ARG0(%esp) 11341 leal OFF_FP_SHADOWFRAME(rFP), %eax 11342 movl %eax, OUT_ARG1(%esp) 11343 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11344 REFRESH_IBASE 11345 jmp .L_op_nop+(199*128) 11346 11347/* ------------------------------ */ 11348 .balign 128 11349.L_ALT_op_mul_float_2addr: /* 0xc8 */ 11350/* File: x86/alt_stub.S */ 11351/* 11352 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11353 * any interesting requests and then jump to the real instruction 11354 * handler. Unlike the Arm handler, we can't do this as a tail call 11355 * because rIBASE is caller save and we need to reload it. 11356 * 11357 * Note that unlike in the Arm implementation, we should never arrive 11358 * here with a zero breakFlag because we always refresh rIBASE on 11359 * return. 11360 */ 11361 .extern MterpCheckBefore 11362 EXPORT_PC 11363 11364 movl rSELF, %ecx 11365 movl %ecx, OUT_ARG0(%esp) 11366 leal OFF_FP_SHADOWFRAME(rFP), %eax 11367 movl %eax, OUT_ARG1(%esp) 11368 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11369 REFRESH_IBASE 11370 jmp .L_op_nop+(200*128) 11371 11372/* ------------------------------ */ 11373 .balign 128 11374.L_ALT_op_div_float_2addr: /* 0xc9 */ 11375/* File: x86/alt_stub.S */ 11376/* 11377 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11378 * any interesting requests and then jump to the real instruction 11379 * handler. Unlike the Arm handler, we can't do this as a tail call 11380 * because rIBASE is caller save and we need to reload it. 11381 * 11382 * Note that unlike in the Arm implementation, we should never arrive 11383 * here with a zero breakFlag because we always refresh rIBASE on 11384 * return. 11385 */ 11386 .extern MterpCheckBefore 11387 EXPORT_PC 11388 11389 movl rSELF, %ecx 11390 movl %ecx, OUT_ARG0(%esp) 11391 leal OFF_FP_SHADOWFRAME(rFP), %eax 11392 movl %eax, OUT_ARG1(%esp) 11393 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11394 REFRESH_IBASE 11395 jmp .L_op_nop+(201*128) 11396 11397/* ------------------------------ */ 11398 .balign 128 11399.L_ALT_op_rem_float_2addr: /* 0xca */ 11400/* File: x86/alt_stub.S */ 11401/* 11402 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11403 * any interesting requests and then jump to the real instruction 11404 * handler. Unlike the Arm handler, we can't do this as a tail call 11405 * because rIBASE is caller save and we need to reload it. 11406 * 11407 * Note that unlike in the Arm implementation, we should never arrive 11408 * here with a zero breakFlag because we always refresh rIBASE on 11409 * return. 11410 */ 11411 .extern MterpCheckBefore 11412 EXPORT_PC 11413 11414 movl rSELF, %ecx 11415 movl %ecx, OUT_ARG0(%esp) 11416 leal OFF_FP_SHADOWFRAME(rFP), %eax 11417 movl %eax, OUT_ARG1(%esp) 11418 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11419 REFRESH_IBASE 11420 jmp .L_op_nop+(202*128) 11421 11422/* ------------------------------ */ 11423 .balign 128 11424.L_ALT_op_add_double_2addr: /* 0xcb */ 11425/* File: x86/alt_stub.S */ 11426/* 11427 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11428 * any interesting requests and then jump to the real instruction 11429 * handler. Unlike the Arm handler, we can't do this as a tail call 11430 * because rIBASE is caller save and we need to reload it. 11431 * 11432 * Note that unlike in the Arm implementation, we should never arrive 11433 * here with a zero breakFlag because we always refresh rIBASE on 11434 * return. 11435 */ 11436 .extern MterpCheckBefore 11437 EXPORT_PC 11438 11439 movl rSELF, %ecx 11440 movl %ecx, OUT_ARG0(%esp) 11441 leal OFF_FP_SHADOWFRAME(rFP), %eax 11442 movl %eax, OUT_ARG1(%esp) 11443 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11444 REFRESH_IBASE 11445 jmp .L_op_nop+(203*128) 11446 11447/* ------------------------------ */ 11448 .balign 128 11449.L_ALT_op_sub_double_2addr: /* 0xcc */ 11450/* File: x86/alt_stub.S */ 11451/* 11452 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11453 * any interesting requests and then jump to the real instruction 11454 * handler. Unlike the Arm handler, we can't do this as a tail call 11455 * because rIBASE is caller save and we need to reload it. 11456 * 11457 * Note that unlike in the Arm implementation, we should never arrive 11458 * here with a zero breakFlag because we always refresh rIBASE on 11459 * return. 11460 */ 11461 .extern MterpCheckBefore 11462 EXPORT_PC 11463 11464 movl rSELF, %ecx 11465 movl %ecx, OUT_ARG0(%esp) 11466 leal OFF_FP_SHADOWFRAME(rFP), %eax 11467 movl %eax, OUT_ARG1(%esp) 11468 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11469 REFRESH_IBASE 11470 jmp .L_op_nop+(204*128) 11471 11472/* ------------------------------ */ 11473 .balign 128 11474.L_ALT_op_mul_double_2addr: /* 0xcd */ 11475/* File: x86/alt_stub.S */ 11476/* 11477 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11478 * any interesting requests and then jump to the real instruction 11479 * handler. Unlike the Arm handler, we can't do this as a tail call 11480 * because rIBASE is caller save and we need to reload it. 11481 * 11482 * Note that unlike in the Arm implementation, we should never arrive 11483 * here with a zero breakFlag because we always refresh rIBASE on 11484 * return. 11485 */ 11486 .extern MterpCheckBefore 11487 EXPORT_PC 11488 11489 movl rSELF, %ecx 11490 movl %ecx, OUT_ARG0(%esp) 11491 leal OFF_FP_SHADOWFRAME(rFP), %eax 11492 movl %eax, OUT_ARG1(%esp) 11493 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11494 REFRESH_IBASE 11495 jmp .L_op_nop+(205*128) 11496 11497/* ------------------------------ */ 11498 .balign 128 11499.L_ALT_op_div_double_2addr: /* 0xce */ 11500/* File: x86/alt_stub.S */ 11501/* 11502 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11503 * any interesting requests and then jump to the real instruction 11504 * handler. Unlike the Arm handler, we can't do this as a tail call 11505 * because rIBASE is caller save and we need to reload it. 11506 * 11507 * Note that unlike in the Arm implementation, we should never arrive 11508 * here with a zero breakFlag because we always refresh rIBASE on 11509 * return. 11510 */ 11511 .extern MterpCheckBefore 11512 EXPORT_PC 11513 11514 movl rSELF, %ecx 11515 movl %ecx, OUT_ARG0(%esp) 11516 leal OFF_FP_SHADOWFRAME(rFP), %eax 11517 movl %eax, OUT_ARG1(%esp) 11518 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11519 REFRESH_IBASE 11520 jmp .L_op_nop+(206*128) 11521 11522/* ------------------------------ */ 11523 .balign 128 11524.L_ALT_op_rem_double_2addr: /* 0xcf */ 11525/* File: x86/alt_stub.S */ 11526/* 11527 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11528 * any interesting requests and then jump to the real instruction 11529 * handler. Unlike the Arm handler, we can't do this as a tail call 11530 * because rIBASE is caller save and we need to reload it. 11531 * 11532 * Note that unlike in the Arm implementation, we should never arrive 11533 * here with a zero breakFlag because we always refresh rIBASE on 11534 * return. 11535 */ 11536 .extern MterpCheckBefore 11537 EXPORT_PC 11538 11539 movl rSELF, %ecx 11540 movl %ecx, OUT_ARG0(%esp) 11541 leal OFF_FP_SHADOWFRAME(rFP), %eax 11542 movl %eax, OUT_ARG1(%esp) 11543 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11544 REFRESH_IBASE 11545 jmp .L_op_nop+(207*128) 11546 11547/* ------------------------------ */ 11548 .balign 128 11549.L_ALT_op_add_int_lit16: /* 0xd0 */ 11550/* File: x86/alt_stub.S */ 11551/* 11552 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11553 * any interesting requests and then jump to the real instruction 11554 * handler. Unlike the Arm handler, we can't do this as a tail call 11555 * because rIBASE is caller save and we need to reload it. 11556 * 11557 * Note that unlike in the Arm implementation, we should never arrive 11558 * here with a zero breakFlag because we always refresh rIBASE on 11559 * return. 11560 */ 11561 .extern MterpCheckBefore 11562 EXPORT_PC 11563 11564 movl rSELF, %ecx 11565 movl %ecx, OUT_ARG0(%esp) 11566 leal OFF_FP_SHADOWFRAME(rFP), %eax 11567 movl %eax, OUT_ARG1(%esp) 11568 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11569 REFRESH_IBASE 11570 jmp .L_op_nop+(208*128) 11571 11572/* ------------------------------ */ 11573 .balign 128 11574.L_ALT_op_rsub_int: /* 0xd1 */ 11575/* File: x86/alt_stub.S */ 11576/* 11577 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11578 * any interesting requests and then jump to the real instruction 11579 * handler. Unlike the Arm handler, we can't do this as a tail call 11580 * because rIBASE is caller save and we need to reload it. 11581 * 11582 * Note that unlike in the Arm implementation, we should never arrive 11583 * here with a zero breakFlag because we always refresh rIBASE on 11584 * return. 11585 */ 11586 .extern MterpCheckBefore 11587 EXPORT_PC 11588 11589 movl rSELF, %ecx 11590 movl %ecx, OUT_ARG0(%esp) 11591 leal OFF_FP_SHADOWFRAME(rFP), %eax 11592 movl %eax, OUT_ARG1(%esp) 11593 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11594 REFRESH_IBASE 11595 jmp .L_op_nop+(209*128) 11596 11597/* ------------------------------ */ 11598 .balign 128 11599.L_ALT_op_mul_int_lit16: /* 0xd2 */ 11600/* File: x86/alt_stub.S */ 11601/* 11602 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11603 * any interesting requests and then jump to the real instruction 11604 * handler. Unlike the Arm handler, we can't do this as a tail call 11605 * because rIBASE is caller save and we need to reload it. 11606 * 11607 * Note that unlike in the Arm implementation, we should never arrive 11608 * here with a zero breakFlag because we always refresh rIBASE on 11609 * return. 11610 */ 11611 .extern MterpCheckBefore 11612 EXPORT_PC 11613 11614 movl rSELF, %ecx 11615 movl %ecx, OUT_ARG0(%esp) 11616 leal OFF_FP_SHADOWFRAME(rFP), %eax 11617 movl %eax, OUT_ARG1(%esp) 11618 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11619 REFRESH_IBASE 11620 jmp .L_op_nop+(210*128) 11621 11622/* ------------------------------ */ 11623 .balign 128 11624.L_ALT_op_div_int_lit16: /* 0xd3 */ 11625/* File: x86/alt_stub.S */ 11626/* 11627 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11628 * any interesting requests and then jump to the real instruction 11629 * handler. Unlike the Arm handler, we can't do this as a tail call 11630 * because rIBASE is caller save and we need to reload it. 11631 * 11632 * Note that unlike in the Arm implementation, we should never arrive 11633 * here with a zero breakFlag because we always refresh rIBASE on 11634 * return. 11635 */ 11636 .extern MterpCheckBefore 11637 EXPORT_PC 11638 11639 movl rSELF, %ecx 11640 movl %ecx, OUT_ARG0(%esp) 11641 leal OFF_FP_SHADOWFRAME(rFP), %eax 11642 movl %eax, OUT_ARG1(%esp) 11643 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11644 REFRESH_IBASE 11645 jmp .L_op_nop+(211*128) 11646 11647/* ------------------------------ */ 11648 .balign 128 11649.L_ALT_op_rem_int_lit16: /* 0xd4 */ 11650/* File: x86/alt_stub.S */ 11651/* 11652 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11653 * any interesting requests and then jump to the real instruction 11654 * handler. Unlike the Arm handler, we can't do this as a tail call 11655 * because rIBASE is caller save and we need to reload it. 11656 * 11657 * Note that unlike in the Arm implementation, we should never arrive 11658 * here with a zero breakFlag because we always refresh rIBASE on 11659 * return. 11660 */ 11661 .extern MterpCheckBefore 11662 EXPORT_PC 11663 11664 movl rSELF, %ecx 11665 movl %ecx, OUT_ARG0(%esp) 11666 leal OFF_FP_SHADOWFRAME(rFP), %eax 11667 movl %eax, OUT_ARG1(%esp) 11668 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11669 REFRESH_IBASE 11670 jmp .L_op_nop+(212*128) 11671 11672/* ------------------------------ */ 11673 .balign 128 11674.L_ALT_op_and_int_lit16: /* 0xd5 */ 11675/* File: x86/alt_stub.S */ 11676/* 11677 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11678 * any interesting requests and then jump to the real instruction 11679 * handler. Unlike the Arm handler, we can't do this as a tail call 11680 * because rIBASE is caller save and we need to reload it. 11681 * 11682 * Note that unlike in the Arm implementation, we should never arrive 11683 * here with a zero breakFlag because we always refresh rIBASE on 11684 * return. 11685 */ 11686 .extern MterpCheckBefore 11687 EXPORT_PC 11688 11689 movl rSELF, %ecx 11690 movl %ecx, OUT_ARG0(%esp) 11691 leal OFF_FP_SHADOWFRAME(rFP), %eax 11692 movl %eax, OUT_ARG1(%esp) 11693 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11694 REFRESH_IBASE 11695 jmp .L_op_nop+(213*128) 11696 11697/* ------------------------------ */ 11698 .balign 128 11699.L_ALT_op_or_int_lit16: /* 0xd6 */ 11700/* File: x86/alt_stub.S */ 11701/* 11702 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11703 * any interesting requests and then jump to the real instruction 11704 * handler. Unlike the Arm handler, we can't do this as a tail call 11705 * because rIBASE is caller save and we need to reload it. 11706 * 11707 * Note that unlike in the Arm implementation, we should never arrive 11708 * here with a zero breakFlag because we always refresh rIBASE on 11709 * return. 11710 */ 11711 .extern MterpCheckBefore 11712 EXPORT_PC 11713 11714 movl rSELF, %ecx 11715 movl %ecx, OUT_ARG0(%esp) 11716 leal OFF_FP_SHADOWFRAME(rFP), %eax 11717 movl %eax, OUT_ARG1(%esp) 11718 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11719 REFRESH_IBASE 11720 jmp .L_op_nop+(214*128) 11721 11722/* ------------------------------ */ 11723 .balign 128 11724.L_ALT_op_xor_int_lit16: /* 0xd7 */ 11725/* File: x86/alt_stub.S */ 11726/* 11727 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11728 * any interesting requests and then jump to the real instruction 11729 * handler. Unlike the Arm handler, we can't do this as a tail call 11730 * because rIBASE is caller save and we need to reload it. 11731 * 11732 * Note that unlike in the Arm implementation, we should never arrive 11733 * here with a zero breakFlag because we always refresh rIBASE on 11734 * return. 11735 */ 11736 .extern MterpCheckBefore 11737 EXPORT_PC 11738 11739 movl rSELF, %ecx 11740 movl %ecx, OUT_ARG0(%esp) 11741 leal OFF_FP_SHADOWFRAME(rFP), %eax 11742 movl %eax, OUT_ARG1(%esp) 11743 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11744 REFRESH_IBASE 11745 jmp .L_op_nop+(215*128) 11746 11747/* ------------------------------ */ 11748 .balign 128 11749.L_ALT_op_add_int_lit8: /* 0xd8 */ 11750/* File: x86/alt_stub.S */ 11751/* 11752 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11753 * any interesting requests and then jump to the real instruction 11754 * handler. Unlike the Arm handler, we can't do this as a tail call 11755 * because rIBASE is caller save and we need to reload it. 11756 * 11757 * Note that unlike in the Arm implementation, we should never arrive 11758 * here with a zero breakFlag because we always refresh rIBASE on 11759 * return. 11760 */ 11761 .extern MterpCheckBefore 11762 EXPORT_PC 11763 11764 movl rSELF, %ecx 11765 movl %ecx, OUT_ARG0(%esp) 11766 leal OFF_FP_SHADOWFRAME(rFP), %eax 11767 movl %eax, OUT_ARG1(%esp) 11768 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11769 REFRESH_IBASE 11770 jmp .L_op_nop+(216*128) 11771 11772/* ------------------------------ */ 11773 .balign 128 11774.L_ALT_op_rsub_int_lit8: /* 0xd9 */ 11775/* File: x86/alt_stub.S */ 11776/* 11777 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11778 * any interesting requests and then jump to the real instruction 11779 * handler. Unlike the Arm handler, we can't do this as a tail call 11780 * because rIBASE is caller save and we need to reload it. 11781 * 11782 * Note that unlike in the Arm implementation, we should never arrive 11783 * here with a zero breakFlag because we always refresh rIBASE on 11784 * return. 11785 */ 11786 .extern MterpCheckBefore 11787 EXPORT_PC 11788 11789 movl rSELF, %ecx 11790 movl %ecx, OUT_ARG0(%esp) 11791 leal OFF_FP_SHADOWFRAME(rFP), %eax 11792 movl %eax, OUT_ARG1(%esp) 11793 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11794 REFRESH_IBASE 11795 jmp .L_op_nop+(217*128) 11796 11797/* ------------------------------ */ 11798 .balign 128 11799.L_ALT_op_mul_int_lit8: /* 0xda */ 11800/* File: x86/alt_stub.S */ 11801/* 11802 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11803 * any interesting requests and then jump to the real instruction 11804 * handler. Unlike the Arm handler, we can't do this as a tail call 11805 * because rIBASE is caller save and we need to reload it. 11806 * 11807 * Note that unlike in the Arm implementation, we should never arrive 11808 * here with a zero breakFlag because we always refresh rIBASE on 11809 * return. 11810 */ 11811 .extern MterpCheckBefore 11812 EXPORT_PC 11813 11814 movl rSELF, %ecx 11815 movl %ecx, OUT_ARG0(%esp) 11816 leal OFF_FP_SHADOWFRAME(rFP), %eax 11817 movl %eax, OUT_ARG1(%esp) 11818 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11819 REFRESH_IBASE 11820 jmp .L_op_nop+(218*128) 11821 11822/* ------------------------------ */ 11823 .balign 128 11824.L_ALT_op_div_int_lit8: /* 0xdb */ 11825/* File: x86/alt_stub.S */ 11826/* 11827 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11828 * any interesting requests and then jump to the real instruction 11829 * handler. Unlike the Arm handler, we can't do this as a tail call 11830 * because rIBASE is caller save and we need to reload it. 11831 * 11832 * Note that unlike in the Arm implementation, we should never arrive 11833 * here with a zero breakFlag because we always refresh rIBASE on 11834 * return. 11835 */ 11836 .extern MterpCheckBefore 11837 EXPORT_PC 11838 11839 movl rSELF, %ecx 11840 movl %ecx, OUT_ARG0(%esp) 11841 leal OFF_FP_SHADOWFRAME(rFP), %eax 11842 movl %eax, OUT_ARG1(%esp) 11843 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11844 REFRESH_IBASE 11845 jmp .L_op_nop+(219*128) 11846 11847/* ------------------------------ */ 11848 .balign 128 11849.L_ALT_op_rem_int_lit8: /* 0xdc */ 11850/* File: x86/alt_stub.S */ 11851/* 11852 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11853 * any interesting requests and then jump to the real instruction 11854 * handler. Unlike the Arm handler, we can't do this as a tail call 11855 * because rIBASE is caller save and we need to reload it. 11856 * 11857 * Note that unlike in the Arm implementation, we should never arrive 11858 * here with a zero breakFlag because we always refresh rIBASE on 11859 * return. 11860 */ 11861 .extern MterpCheckBefore 11862 EXPORT_PC 11863 11864 movl rSELF, %ecx 11865 movl %ecx, OUT_ARG0(%esp) 11866 leal OFF_FP_SHADOWFRAME(rFP), %eax 11867 movl %eax, OUT_ARG1(%esp) 11868 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11869 REFRESH_IBASE 11870 jmp .L_op_nop+(220*128) 11871 11872/* ------------------------------ */ 11873 .balign 128 11874.L_ALT_op_and_int_lit8: /* 0xdd */ 11875/* File: x86/alt_stub.S */ 11876/* 11877 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11878 * any interesting requests and then jump to the real instruction 11879 * handler. Unlike the Arm handler, we can't do this as a tail call 11880 * because rIBASE is caller save and we need to reload it. 11881 * 11882 * Note that unlike in the Arm implementation, we should never arrive 11883 * here with a zero breakFlag because we always refresh rIBASE on 11884 * return. 11885 */ 11886 .extern MterpCheckBefore 11887 EXPORT_PC 11888 11889 movl rSELF, %ecx 11890 movl %ecx, OUT_ARG0(%esp) 11891 leal OFF_FP_SHADOWFRAME(rFP), %eax 11892 movl %eax, OUT_ARG1(%esp) 11893 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11894 REFRESH_IBASE 11895 jmp .L_op_nop+(221*128) 11896 11897/* ------------------------------ */ 11898 .balign 128 11899.L_ALT_op_or_int_lit8: /* 0xde */ 11900/* File: x86/alt_stub.S */ 11901/* 11902 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11903 * any interesting requests and then jump to the real instruction 11904 * handler. Unlike the Arm handler, we can't do this as a tail call 11905 * because rIBASE is caller save and we need to reload it. 11906 * 11907 * Note that unlike in the Arm implementation, we should never arrive 11908 * here with a zero breakFlag because we always refresh rIBASE on 11909 * return. 11910 */ 11911 .extern MterpCheckBefore 11912 EXPORT_PC 11913 11914 movl rSELF, %ecx 11915 movl %ecx, OUT_ARG0(%esp) 11916 leal OFF_FP_SHADOWFRAME(rFP), %eax 11917 movl %eax, OUT_ARG1(%esp) 11918 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11919 REFRESH_IBASE 11920 jmp .L_op_nop+(222*128) 11921 11922/* ------------------------------ */ 11923 .balign 128 11924.L_ALT_op_xor_int_lit8: /* 0xdf */ 11925/* File: x86/alt_stub.S */ 11926/* 11927 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11928 * any interesting requests and then jump to the real instruction 11929 * handler. Unlike the Arm handler, we can't do this as a tail call 11930 * because rIBASE is caller save and we need to reload it. 11931 * 11932 * Note that unlike in the Arm implementation, we should never arrive 11933 * here with a zero breakFlag because we always refresh rIBASE on 11934 * return. 11935 */ 11936 .extern MterpCheckBefore 11937 EXPORT_PC 11938 11939 movl rSELF, %ecx 11940 movl %ecx, OUT_ARG0(%esp) 11941 leal OFF_FP_SHADOWFRAME(rFP), %eax 11942 movl %eax, OUT_ARG1(%esp) 11943 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11944 REFRESH_IBASE 11945 jmp .L_op_nop+(223*128) 11946 11947/* ------------------------------ */ 11948 .balign 128 11949.L_ALT_op_shl_int_lit8: /* 0xe0 */ 11950/* File: x86/alt_stub.S */ 11951/* 11952 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11953 * any interesting requests and then jump to the real instruction 11954 * handler. Unlike the Arm handler, we can't do this as a tail call 11955 * because rIBASE is caller save and we need to reload it. 11956 * 11957 * Note that unlike in the Arm implementation, we should never arrive 11958 * here with a zero breakFlag because we always refresh rIBASE on 11959 * return. 11960 */ 11961 .extern MterpCheckBefore 11962 EXPORT_PC 11963 11964 movl rSELF, %ecx 11965 movl %ecx, OUT_ARG0(%esp) 11966 leal OFF_FP_SHADOWFRAME(rFP), %eax 11967 movl %eax, OUT_ARG1(%esp) 11968 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11969 REFRESH_IBASE 11970 jmp .L_op_nop+(224*128) 11971 11972/* ------------------------------ */ 11973 .balign 128 11974.L_ALT_op_shr_int_lit8: /* 0xe1 */ 11975/* File: x86/alt_stub.S */ 11976/* 11977 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 11978 * any interesting requests and then jump to the real instruction 11979 * handler. Unlike the Arm handler, we can't do this as a tail call 11980 * because rIBASE is caller save and we need to reload it. 11981 * 11982 * Note that unlike in the Arm implementation, we should never arrive 11983 * here with a zero breakFlag because we always refresh rIBASE on 11984 * return. 11985 */ 11986 .extern MterpCheckBefore 11987 EXPORT_PC 11988 11989 movl rSELF, %ecx 11990 movl %ecx, OUT_ARG0(%esp) 11991 leal OFF_FP_SHADOWFRAME(rFP), %eax 11992 movl %eax, OUT_ARG1(%esp) 11993 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 11994 REFRESH_IBASE 11995 jmp .L_op_nop+(225*128) 11996 11997/* ------------------------------ */ 11998 .balign 128 11999.L_ALT_op_ushr_int_lit8: /* 0xe2 */ 12000/* File: x86/alt_stub.S */ 12001/* 12002 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12003 * any interesting requests and then jump to the real instruction 12004 * handler. Unlike the Arm handler, we can't do this as a tail call 12005 * because rIBASE is caller save and we need to reload it. 12006 * 12007 * Note that unlike in the Arm implementation, we should never arrive 12008 * here with a zero breakFlag because we always refresh rIBASE on 12009 * return. 12010 */ 12011 .extern MterpCheckBefore 12012 EXPORT_PC 12013 12014 movl rSELF, %ecx 12015 movl %ecx, OUT_ARG0(%esp) 12016 leal OFF_FP_SHADOWFRAME(rFP), %eax 12017 movl %eax, OUT_ARG1(%esp) 12018 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12019 REFRESH_IBASE 12020 jmp .L_op_nop+(226*128) 12021 12022/* ------------------------------ */ 12023 .balign 128 12024.L_ALT_op_iget_quick: /* 0xe3 */ 12025/* File: x86/alt_stub.S */ 12026/* 12027 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12028 * any interesting requests and then jump to the real instruction 12029 * handler. Unlike the Arm handler, we can't do this as a tail call 12030 * because rIBASE is caller save and we need to reload it. 12031 * 12032 * Note that unlike in the Arm implementation, we should never arrive 12033 * here with a zero breakFlag because we always refresh rIBASE on 12034 * return. 12035 */ 12036 .extern MterpCheckBefore 12037 EXPORT_PC 12038 12039 movl rSELF, %ecx 12040 movl %ecx, OUT_ARG0(%esp) 12041 leal OFF_FP_SHADOWFRAME(rFP), %eax 12042 movl %eax, OUT_ARG1(%esp) 12043 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12044 REFRESH_IBASE 12045 jmp .L_op_nop+(227*128) 12046 12047/* ------------------------------ */ 12048 .balign 128 12049.L_ALT_op_iget_wide_quick: /* 0xe4 */ 12050/* File: x86/alt_stub.S */ 12051/* 12052 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12053 * any interesting requests and then jump to the real instruction 12054 * handler. Unlike the Arm handler, we can't do this as a tail call 12055 * because rIBASE is caller save and we need to reload it. 12056 * 12057 * Note that unlike in the Arm implementation, we should never arrive 12058 * here with a zero breakFlag because we always refresh rIBASE on 12059 * return. 12060 */ 12061 .extern MterpCheckBefore 12062 EXPORT_PC 12063 12064 movl rSELF, %ecx 12065 movl %ecx, OUT_ARG0(%esp) 12066 leal OFF_FP_SHADOWFRAME(rFP), %eax 12067 movl %eax, OUT_ARG1(%esp) 12068 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12069 REFRESH_IBASE 12070 jmp .L_op_nop+(228*128) 12071 12072/* ------------------------------ */ 12073 .balign 128 12074.L_ALT_op_iget_object_quick: /* 0xe5 */ 12075/* File: x86/alt_stub.S */ 12076/* 12077 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12078 * any interesting requests and then jump to the real instruction 12079 * handler. Unlike the Arm handler, we can't do this as a tail call 12080 * because rIBASE is caller save and we need to reload it. 12081 * 12082 * Note that unlike in the Arm implementation, we should never arrive 12083 * here with a zero breakFlag because we always refresh rIBASE on 12084 * return. 12085 */ 12086 .extern MterpCheckBefore 12087 EXPORT_PC 12088 12089 movl rSELF, %ecx 12090 movl %ecx, OUT_ARG0(%esp) 12091 leal OFF_FP_SHADOWFRAME(rFP), %eax 12092 movl %eax, OUT_ARG1(%esp) 12093 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12094 REFRESH_IBASE 12095 jmp .L_op_nop+(229*128) 12096 12097/* ------------------------------ */ 12098 .balign 128 12099.L_ALT_op_iput_quick: /* 0xe6 */ 12100/* File: x86/alt_stub.S */ 12101/* 12102 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12103 * any interesting requests and then jump to the real instruction 12104 * handler. Unlike the Arm handler, we can't do this as a tail call 12105 * because rIBASE is caller save and we need to reload it. 12106 * 12107 * Note that unlike in the Arm implementation, we should never arrive 12108 * here with a zero breakFlag because we always refresh rIBASE on 12109 * return. 12110 */ 12111 .extern MterpCheckBefore 12112 EXPORT_PC 12113 12114 movl rSELF, %ecx 12115 movl %ecx, OUT_ARG0(%esp) 12116 leal OFF_FP_SHADOWFRAME(rFP), %eax 12117 movl %eax, OUT_ARG1(%esp) 12118 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12119 REFRESH_IBASE 12120 jmp .L_op_nop+(230*128) 12121 12122/* ------------------------------ */ 12123 .balign 128 12124.L_ALT_op_iput_wide_quick: /* 0xe7 */ 12125/* File: x86/alt_stub.S */ 12126/* 12127 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12128 * any interesting requests and then jump to the real instruction 12129 * handler. Unlike the Arm handler, we can't do this as a tail call 12130 * because rIBASE is caller save and we need to reload it. 12131 * 12132 * Note that unlike in the Arm implementation, we should never arrive 12133 * here with a zero breakFlag because we always refresh rIBASE on 12134 * return. 12135 */ 12136 .extern MterpCheckBefore 12137 EXPORT_PC 12138 12139 movl rSELF, %ecx 12140 movl %ecx, OUT_ARG0(%esp) 12141 leal OFF_FP_SHADOWFRAME(rFP), %eax 12142 movl %eax, OUT_ARG1(%esp) 12143 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12144 REFRESH_IBASE 12145 jmp .L_op_nop+(231*128) 12146 12147/* ------------------------------ */ 12148 .balign 128 12149.L_ALT_op_iput_object_quick: /* 0xe8 */ 12150/* File: x86/alt_stub.S */ 12151/* 12152 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12153 * any interesting requests and then jump to the real instruction 12154 * handler. Unlike the Arm handler, we can't do this as a tail call 12155 * because rIBASE is caller save and we need to reload it. 12156 * 12157 * Note that unlike in the Arm implementation, we should never arrive 12158 * here with a zero breakFlag because we always refresh rIBASE on 12159 * return. 12160 */ 12161 .extern MterpCheckBefore 12162 EXPORT_PC 12163 12164 movl rSELF, %ecx 12165 movl %ecx, OUT_ARG0(%esp) 12166 leal OFF_FP_SHADOWFRAME(rFP), %eax 12167 movl %eax, OUT_ARG1(%esp) 12168 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12169 REFRESH_IBASE 12170 jmp .L_op_nop+(232*128) 12171 12172/* ------------------------------ */ 12173 .balign 128 12174.L_ALT_op_invoke_virtual_quick: /* 0xe9 */ 12175/* File: x86/alt_stub.S */ 12176/* 12177 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12178 * any interesting requests and then jump to the real instruction 12179 * handler. Unlike the Arm handler, we can't do this as a tail call 12180 * because rIBASE is caller save and we need to reload it. 12181 * 12182 * Note that unlike in the Arm implementation, we should never arrive 12183 * here with a zero breakFlag because we always refresh rIBASE on 12184 * return. 12185 */ 12186 .extern MterpCheckBefore 12187 EXPORT_PC 12188 12189 movl rSELF, %ecx 12190 movl %ecx, OUT_ARG0(%esp) 12191 leal OFF_FP_SHADOWFRAME(rFP), %eax 12192 movl %eax, OUT_ARG1(%esp) 12193 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12194 REFRESH_IBASE 12195 jmp .L_op_nop+(233*128) 12196 12197/* ------------------------------ */ 12198 .balign 128 12199.L_ALT_op_invoke_virtual_range_quick: /* 0xea */ 12200/* File: x86/alt_stub.S */ 12201/* 12202 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12203 * any interesting requests and then jump to the real instruction 12204 * handler. Unlike the Arm handler, we can't do this as a tail call 12205 * because rIBASE is caller save and we need to reload it. 12206 * 12207 * Note that unlike in the Arm implementation, we should never arrive 12208 * here with a zero breakFlag because we always refresh rIBASE on 12209 * return. 12210 */ 12211 .extern MterpCheckBefore 12212 EXPORT_PC 12213 12214 movl rSELF, %ecx 12215 movl %ecx, OUT_ARG0(%esp) 12216 leal OFF_FP_SHADOWFRAME(rFP), %eax 12217 movl %eax, OUT_ARG1(%esp) 12218 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12219 REFRESH_IBASE 12220 jmp .L_op_nop+(234*128) 12221 12222/* ------------------------------ */ 12223 .balign 128 12224.L_ALT_op_iput_boolean_quick: /* 0xeb */ 12225/* File: x86/alt_stub.S */ 12226/* 12227 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12228 * any interesting requests and then jump to the real instruction 12229 * handler. Unlike the Arm handler, we can't do this as a tail call 12230 * because rIBASE is caller save and we need to reload it. 12231 * 12232 * Note that unlike in the Arm implementation, we should never arrive 12233 * here with a zero breakFlag because we always refresh rIBASE on 12234 * return. 12235 */ 12236 .extern MterpCheckBefore 12237 EXPORT_PC 12238 12239 movl rSELF, %ecx 12240 movl %ecx, OUT_ARG0(%esp) 12241 leal OFF_FP_SHADOWFRAME(rFP), %eax 12242 movl %eax, OUT_ARG1(%esp) 12243 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12244 REFRESH_IBASE 12245 jmp .L_op_nop+(235*128) 12246 12247/* ------------------------------ */ 12248 .balign 128 12249.L_ALT_op_iput_byte_quick: /* 0xec */ 12250/* File: x86/alt_stub.S */ 12251/* 12252 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12253 * any interesting requests and then jump to the real instruction 12254 * handler. Unlike the Arm handler, we can't do this as a tail call 12255 * because rIBASE is caller save and we need to reload it. 12256 * 12257 * Note that unlike in the Arm implementation, we should never arrive 12258 * here with a zero breakFlag because we always refresh rIBASE on 12259 * return. 12260 */ 12261 .extern MterpCheckBefore 12262 EXPORT_PC 12263 12264 movl rSELF, %ecx 12265 movl %ecx, OUT_ARG0(%esp) 12266 leal OFF_FP_SHADOWFRAME(rFP), %eax 12267 movl %eax, OUT_ARG1(%esp) 12268 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12269 REFRESH_IBASE 12270 jmp .L_op_nop+(236*128) 12271 12272/* ------------------------------ */ 12273 .balign 128 12274.L_ALT_op_iput_char_quick: /* 0xed */ 12275/* File: x86/alt_stub.S */ 12276/* 12277 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12278 * any interesting requests and then jump to the real instruction 12279 * handler. Unlike the Arm handler, we can't do this as a tail call 12280 * because rIBASE is caller save and we need to reload it. 12281 * 12282 * Note that unlike in the Arm implementation, we should never arrive 12283 * here with a zero breakFlag because we always refresh rIBASE on 12284 * return. 12285 */ 12286 .extern MterpCheckBefore 12287 EXPORT_PC 12288 12289 movl rSELF, %ecx 12290 movl %ecx, OUT_ARG0(%esp) 12291 leal OFF_FP_SHADOWFRAME(rFP), %eax 12292 movl %eax, OUT_ARG1(%esp) 12293 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12294 REFRESH_IBASE 12295 jmp .L_op_nop+(237*128) 12296 12297/* ------------------------------ */ 12298 .balign 128 12299.L_ALT_op_iput_short_quick: /* 0xee */ 12300/* File: x86/alt_stub.S */ 12301/* 12302 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12303 * any interesting requests and then jump to the real instruction 12304 * handler. Unlike the Arm handler, we can't do this as a tail call 12305 * because rIBASE is caller save and we need to reload it. 12306 * 12307 * Note that unlike in the Arm implementation, we should never arrive 12308 * here with a zero breakFlag because we always refresh rIBASE on 12309 * return. 12310 */ 12311 .extern MterpCheckBefore 12312 EXPORT_PC 12313 12314 movl rSELF, %ecx 12315 movl %ecx, OUT_ARG0(%esp) 12316 leal OFF_FP_SHADOWFRAME(rFP), %eax 12317 movl %eax, OUT_ARG1(%esp) 12318 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12319 REFRESH_IBASE 12320 jmp .L_op_nop+(238*128) 12321 12322/* ------------------------------ */ 12323 .balign 128 12324.L_ALT_op_iget_boolean_quick: /* 0xef */ 12325/* File: x86/alt_stub.S */ 12326/* 12327 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12328 * any interesting requests and then jump to the real instruction 12329 * handler. Unlike the Arm handler, we can't do this as a tail call 12330 * because rIBASE is caller save and we need to reload it. 12331 * 12332 * Note that unlike in the Arm implementation, we should never arrive 12333 * here with a zero breakFlag because we always refresh rIBASE on 12334 * return. 12335 */ 12336 .extern MterpCheckBefore 12337 EXPORT_PC 12338 12339 movl rSELF, %ecx 12340 movl %ecx, OUT_ARG0(%esp) 12341 leal OFF_FP_SHADOWFRAME(rFP), %eax 12342 movl %eax, OUT_ARG1(%esp) 12343 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12344 REFRESH_IBASE 12345 jmp .L_op_nop+(239*128) 12346 12347/* ------------------------------ */ 12348 .balign 128 12349.L_ALT_op_iget_byte_quick: /* 0xf0 */ 12350/* File: x86/alt_stub.S */ 12351/* 12352 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12353 * any interesting requests and then jump to the real instruction 12354 * handler. Unlike the Arm handler, we can't do this as a tail call 12355 * because rIBASE is caller save and we need to reload it. 12356 * 12357 * Note that unlike in the Arm implementation, we should never arrive 12358 * here with a zero breakFlag because we always refresh rIBASE on 12359 * return. 12360 */ 12361 .extern MterpCheckBefore 12362 EXPORT_PC 12363 12364 movl rSELF, %ecx 12365 movl %ecx, OUT_ARG0(%esp) 12366 leal OFF_FP_SHADOWFRAME(rFP), %eax 12367 movl %eax, OUT_ARG1(%esp) 12368 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12369 REFRESH_IBASE 12370 jmp .L_op_nop+(240*128) 12371 12372/* ------------------------------ */ 12373 .balign 128 12374.L_ALT_op_iget_char_quick: /* 0xf1 */ 12375/* File: x86/alt_stub.S */ 12376/* 12377 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12378 * any interesting requests and then jump to the real instruction 12379 * handler. Unlike the Arm handler, we can't do this as a tail call 12380 * because rIBASE is caller save and we need to reload it. 12381 * 12382 * Note that unlike in the Arm implementation, we should never arrive 12383 * here with a zero breakFlag because we always refresh rIBASE on 12384 * return. 12385 */ 12386 .extern MterpCheckBefore 12387 EXPORT_PC 12388 12389 movl rSELF, %ecx 12390 movl %ecx, OUT_ARG0(%esp) 12391 leal OFF_FP_SHADOWFRAME(rFP), %eax 12392 movl %eax, OUT_ARG1(%esp) 12393 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12394 REFRESH_IBASE 12395 jmp .L_op_nop+(241*128) 12396 12397/* ------------------------------ */ 12398 .balign 128 12399.L_ALT_op_iget_short_quick: /* 0xf2 */ 12400/* File: x86/alt_stub.S */ 12401/* 12402 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12403 * any interesting requests and then jump to the real instruction 12404 * handler. Unlike the Arm handler, we can't do this as a tail call 12405 * because rIBASE is caller save and we need to reload it. 12406 * 12407 * Note that unlike in the Arm implementation, we should never arrive 12408 * here with a zero breakFlag because we always refresh rIBASE on 12409 * return. 12410 */ 12411 .extern MterpCheckBefore 12412 EXPORT_PC 12413 12414 movl rSELF, %ecx 12415 movl %ecx, OUT_ARG0(%esp) 12416 leal OFF_FP_SHADOWFRAME(rFP), %eax 12417 movl %eax, OUT_ARG1(%esp) 12418 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12419 REFRESH_IBASE 12420 jmp .L_op_nop+(242*128) 12421 12422/* ------------------------------ */ 12423 .balign 128 12424.L_ALT_op_invoke_lambda: /* 0xf3 */ 12425/* File: x86/alt_stub.S */ 12426/* 12427 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12428 * any interesting requests and then jump to the real instruction 12429 * handler. Unlike the Arm handler, we can't do this as a tail call 12430 * because rIBASE is caller save and we need to reload it. 12431 * 12432 * Note that unlike in the Arm implementation, we should never arrive 12433 * here with a zero breakFlag because we always refresh rIBASE on 12434 * return. 12435 */ 12436 .extern MterpCheckBefore 12437 EXPORT_PC 12438 12439 movl rSELF, %ecx 12440 movl %ecx, OUT_ARG0(%esp) 12441 leal OFF_FP_SHADOWFRAME(rFP), %eax 12442 movl %eax, OUT_ARG1(%esp) 12443 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12444 REFRESH_IBASE 12445 jmp .L_op_nop+(243*128) 12446 12447/* ------------------------------ */ 12448 .balign 128 12449.L_ALT_op_unused_f4: /* 0xf4 */ 12450/* File: x86/alt_stub.S */ 12451/* 12452 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12453 * any interesting requests and then jump to the real instruction 12454 * handler. Unlike the Arm handler, we can't do this as a tail call 12455 * because rIBASE is caller save and we need to reload it. 12456 * 12457 * Note that unlike in the Arm implementation, we should never arrive 12458 * here with a zero breakFlag because we always refresh rIBASE on 12459 * return. 12460 */ 12461 .extern MterpCheckBefore 12462 EXPORT_PC 12463 12464 movl rSELF, %ecx 12465 movl %ecx, OUT_ARG0(%esp) 12466 leal OFF_FP_SHADOWFRAME(rFP), %eax 12467 movl %eax, OUT_ARG1(%esp) 12468 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12469 REFRESH_IBASE 12470 jmp .L_op_nop+(244*128) 12471 12472/* ------------------------------ */ 12473 .balign 128 12474.L_ALT_op_capture_variable: /* 0xf5 */ 12475/* File: x86/alt_stub.S */ 12476/* 12477 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12478 * any interesting requests and then jump to the real instruction 12479 * handler. Unlike the Arm handler, we can't do this as a tail call 12480 * because rIBASE is caller save and we need to reload it. 12481 * 12482 * Note that unlike in the Arm implementation, we should never arrive 12483 * here with a zero breakFlag because we always refresh rIBASE on 12484 * return. 12485 */ 12486 .extern MterpCheckBefore 12487 EXPORT_PC 12488 12489 movl rSELF, %ecx 12490 movl %ecx, OUT_ARG0(%esp) 12491 leal OFF_FP_SHADOWFRAME(rFP), %eax 12492 movl %eax, OUT_ARG1(%esp) 12493 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12494 REFRESH_IBASE 12495 jmp .L_op_nop+(245*128) 12496 12497/* ------------------------------ */ 12498 .balign 128 12499.L_ALT_op_create_lambda: /* 0xf6 */ 12500/* File: x86/alt_stub.S */ 12501/* 12502 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12503 * any interesting requests and then jump to the real instruction 12504 * handler. Unlike the Arm handler, we can't do this as a tail call 12505 * because rIBASE is caller save and we need to reload it. 12506 * 12507 * Note that unlike in the Arm implementation, we should never arrive 12508 * here with a zero breakFlag because we always refresh rIBASE on 12509 * return. 12510 */ 12511 .extern MterpCheckBefore 12512 EXPORT_PC 12513 12514 movl rSELF, %ecx 12515 movl %ecx, OUT_ARG0(%esp) 12516 leal OFF_FP_SHADOWFRAME(rFP), %eax 12517 movl %eax, OUT_ARG1(%esp) 12518 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12519 REFRESH_IBASE 12520 jmp .L_op_nop+(246*128) 12521 12522/* ------------------------------ */ 12523 .balign 128 12524.L_ALT_op_liberate_variable: /* 0xf7 */ 12525/* File: x86/alt_stub.S */ 12526/* 12527 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12528 * any interesting requests and then jump to the real instruction 12529 * handler. Unlike the Arm handler, we can't do this as a tail call 12530 * because rIBASE is caller save and we need to reload it. 12531 * 12532 * Note that unlike in the Arm implementation, we should never arrive 12533 * here with a zero breakFlag because we always refresh rIBASE on 12534 * return. 12535 */ 12536 .extern MterpCheckBefore 12537 EXPORT_PC 12538 12539 movl rSELF, %ecx 12540 movl %ecx, OUT_ARG0(%esp) 12541 leal OFF_FP_SHADOWFRAME(rFP), %eax 12542 movl %eax, OUT_ARG1(%esp) 12543 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12544 REFRESH_IBASE 12545 jmp .L_op_nop+(247*128) 12546 12547/* ------------------------------ */ 12548 .balign 128 12549.L_ALT_op_box_lambda: /* 0xf8 */ 12550/* File: x86/alt_stub.S */ 12551/* 12552 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12553 * any interesting requests and then jump to the real instruction 12554 * handler. Unlike the Arm handler, we can't do this as a tail call 12555 * because rIBASE is caller save and we need to reload it. 12556 * 12557 * Note that unlike in the Arm implementation, we should never arrive 12558 * here with a zero breakFlag because we always refresh rIBASE on 12559 * return. 12560 */ 12561 .extern MterpCheckBefore 12562 EXPORT_PC 12563 12564 movl rSELF, %ecx 12565 movl %ecx, OUT_ARG0(%esp) 12566 leal OFF_FP_SHADOWFRAME(rFP), %eax 12567 movl %eax, OUT_ARG1(%esp) 12568 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12569 REFRESH_IBASE 12570 jmp .L_op_nop+(248*128) 12571 12572/* ------------------------------ */ 12573 .balign 128 12574.L_ALT_op_unbox_lambda: /* 0xf9 */ 12575/* File: x86/alt_stub.S */ 12576/* 12577 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12578 * any interesting requests and then jump to the real instruction 12579 * handler. Unlike the Arm handler, we can't do this as a tail call 12580 * because rIBASE is caller save and we need to reload it. 12581 * 12582 * Note that unlike in the Arm implementation, we should never arrive 12583 * here with a zero breakFlag because we always refresh rIBASE on 12584 * return. 12585 */ 12586 .extern MterpCheckBefore 12587 EXPORT_PC 12588 12589 movl rSELF, %ecx 12590 movl %ecx, OUT_ARG0(%esp) 12591 leal OFF_FP_SHADOWFRAME(rFP), %eax 12592 movl %eax, OUT_ARG1(%esp) 12593 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12594 REFRESH_IBASE 12595 jmp .L_op_nop+(249*128) 12596 12597/* ------------------------------ */ 12598 .balign 128 12599.L_ALT_op_unused_fa: /* 0xfa */ 12600/* File: x86/alt_stub.S */ 12601/* 12602 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12603 * any interesting requests and then jump to the real instruction 12604 * handler. Unlike the Arm handler, we can't do this as a tail call 12605 * because rIBASE is caller save and we need to reload it. 12606 * 12607 * Note that unlike in the Arm implementation, we should never arrive 12608 * here with a zero breakFlag because we always refresh rIBASE on 12609 * return. 12610 */ 12611 .extern MterpCheckBefore 12612 EXPORT_PC 12613 12614 movl rSELF, %ecx 12615 movl %ecx, OUT_ARG0(%esp) 12616 leal OFF_FP_SHADOWFRAME(rFP), %eax 12617 movl %eax, OUT_ARG1(%esp) 12618 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12619 REFRESH_IBASE 12620 jmp .L_op_nop+(250*128) 12621 12622/* ------------------------------ */ 12623 .balign 128 12624.L_ALT_op_unused_fb: /* 0xfb */ 12625/* File: x86/alt_stub.S */ 12626/* 12627 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12628 * any interesting requests and then jump to the real instruction 12629 * handler. Unlike the Arm handler, we can't do this as a tail call 12630 * because rIBASE is caller save and we need to reload it. 12631 * 12632 * Note that unlike in the Arm implementation, we should never arrive 12633 * here with a zero breakFlag because we always refresh rIBASE on 12634 * return. 12635 */ 12636 .extern MterpCheckBefore 12637 EXPORT_PC 12638 12639 movl rSELF, %ecx 12640 movl %ecx, OUT_ARG0(%esp) 12641 leal OFF_FP_SHADOWFRAME(rFP), %eax 12642 movl %eax, OUT_ARG1(%esp) 12643 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12644 REFRESH_IBASE 12645 jmp .L_op_nop+(251*128) 12646 12647/* ------------------------------ */ 12648 .balign 128 12649.L_ALT_op_unused_fc: /* 0xfc */ 12650/* File: x86/alt_stub.S */ 12651/* 12652 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12653 * any interesting requests and then jump to the real instruction 12654 * handler. Unlike the Arm handler, we can't do this as a tail call 12655 * because rIBASE is caller save and we need to reload it. 12656 * 12657 * Note that unlike in the Arm implementation, we should never arrive 12658 * here with a zero breakFlag because we always refresh rIBASE on 12659 * return. 12660 */ 12661 .extern MterpCheckBefore 12662 EXPORT_PC 12663 12664 movl rSELF, %ecx 12665 movl %ecx, OUT_ARG0(%esp) 12666 leal OFF_FP_SHADOWFRAME(rFP), %eax 12667 movl %eax, OUT_ARG1(%esp) 12668 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12669 REFRESH_IBASE 12670 jmp .L_op_nop+(252*128) 12671 12672/* ------------------------------ */ 12673 .balign 128 12674.L_ALT_op_unused_fd: /* 0xfd */ 12675/* File: x86/alt_stub.S */ 12676/* 12677 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12678 * any interesting requests and then jump to the real instruction 12679 * handler. Unlike the Arm handler, we can't do this as a tail call 12680 * because rIBASE is caller save and we need to reload it. 12681 * 12682 * Note that unlike in the Arm implementation, we should never arrive 12683 * here with a zero breakFlag because we always refresh rIBASE on 12684 * return. 12685 */ 12686 .extern MterpCheckBefore 12687 EXPORT_PC 12688 12689 movl rSELF, %ecx 12690 movl %ecx, OUT_ARG0(%esp) 12691 leal OFF_FP_SHADOWFRAME(rFP), %eax 12692 movl %eax, OUT_ARG1(%esp) 12693 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12694 REFRESH_IBASE 12695 jmp .L_op_nop+(253*128) 12696 12697/* ------------------------------ */ 12698 .balign 128 12699.L_ALT_op_unused_fe: /* 0xfe */ 12700/* File: x86/alt_stub.S */ 12701/* 12702 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12703 * any interesting requests and then jump to the real instruction 12704 * handler. Unlike the Arm handler, we can't do this as a tail call 12705 * because rIBASE is caller save and we need to reload it. 12706 * 12707 * Note that unlike in the Arm implementation, we should never arrive 12708 * here with a zero breakFlag because we always refresh rIBASE on 12709 * return. 12710 */ 12711 .extern MterpCheckBefore 12712 EXPORT_PC 12713 12714 movl rSELF, %ecx 12715 movl %ecx, OUT_ARG0(%esp) 12716 leal OFF_FP_SHADOWFRAME(rFP), %eax 12717 movl %eax, OUT_ARG1(%esp) 12718 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12719 REFRESH_IBASE 12720 jmp .L_op_nop+(254*128) 12721 12722/* ------------------------------ */ 12723 .balign 128 12724.L_ALT_op_unused_ff: /* 0xff */ 12725/* File: x86/alt_stub.S */ 12726/* 12727 * Inter-instruction transfer stub. Call out to MterpCheckBefore to handle 12728 * any interesting requests and then jump to the real instruction 12729 * handler. Unlike the Arm handler, we can't do this as a tail call 12730 * because rIBASE is caller save and we need to reload it. 12731 * 12732 * Note that unlike in the Arm implementation, we should never arrive 12733 * here with a zero breakFlag because we always refresh rIBASE on 12734 * return. 12735 */ 12736 .extern MterpCheckBefore 12737 EXPORT_PC 12738 12739 movl rSELF, %ecx 12740 movl %ecx, OUT_ARG0(%esp) 12741 leal OFF_FP_SHADOWFRAME(rFP), %eax 12742 movl %eax, OUT_ARG1(%esp) 12743 call SYMBOL(MterpCheckBefore) # (self, shadow_frame) 12744 REFRESH_IBASE 12745 jmp .L_op_nop+(255*128) 12746 12747 .balign 128 12748 SIZE(SYMBOL(artMterpAsmAltInstructionStart),SYMBOL(artMterpAsmAltInstructionStart)) 12749 .global SYMBOL(artMterpAsmAltInstructionEnd) 12750SYMBOL(artMterpAsmAltInstructionEnd): 12751/* File: x86/footer.S */ 12752/* 12753 * =========================================================================== 12754 * Common subroutines and data 12755 * =========================================================================== 12756 */ 12757 12758 .text 12759 .align 2 12760 12761/* 12762 * We've detected a condition that will result in an exception, but the exception 12763 * has not yet been thrown. Just bail out to the reference interpreter to deal with it. 12764 * TUNING: for consistency, we may want to just go ahead and handle these here. 12765 */ 12766common_errDivideByZero: 12767 EXPORT_PC 12768#if MTERP_LOGGING 12769 movl rSELF, %eax 12770 movl %eax, OUT_ARG0(%esp) 12771 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12772 movl %ecx, OUT_ARG1(%esp) 12773 call SYMBOL(MterpLogDivideByZeroException) 12774#endif 12775 jmp MterpCommonFallback 12776 12777common_errArrayIndex: 12778 EXPORT_PC 12779#if MTERP_LOGGING 12780 movl rSELF, %eax 12781 movl %eax, OUT_ARG0(%esp) 12782 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12783 movl %ecx, OUT_ARG1(%esp) 12784 call SYMBOL(MterpLogArrayIndexException) 12785#endif 12786 jmp MterpCommonFallback 12787 12788common_errNegativeArraySize: 12789 EXPORT_PC 12790#if MTERP_LOGGING 12791 movl rSELF, %eax 12792 movl %eax, OUT_ARG0(%esp) 12793 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12794 movl %ecx, OUT_ARG1(%esp) 12795 call SYMBOL(MterpLogNegativeArraySizeException) 12796#endif 12797 jmp MterpCommonFallback 12798 12799common_errNoSuchMethod: 12800 EXPORT_PC 12801#if MTERP_LOGGING 12802 movl rSELF, %eax 12803 movl %eax, OUT_ARG0(%esp) 12804 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12805 movl %ecx, OUT_ARG1(%esp) 12806 call SYMBOL(MterpLogNoSuchMethodException) 12807#endif 12808 jmp MterpCommonFallback 12809 12810common_errNullObject: 12811 EXPORT_PC 12812#if MTERP_LOGGING 12813 movl rSELF, %eax 12814 movl %eax, OUT_ARG0(%esp) 12815 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12816 movl %ecx, OUT_ARG1(%esp) 12817 call SYMBOL(MterpLogNullObjectException) 12818#endif 12819 jmp MterpCommonFallback 12820 12821common_exceptionThrown: 12822 EXPORT_PC 12823#if MTERP_LOGGING 12824 movl rSELF, %eax 12825 movl %eax, OUT_ARG0(%esp) 12826 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12827 movl %ecx, OUT_ARG0(%esp) 12828 call SYMBOL(MterpLogExceptionThrownException) 12829#endif 12830 jmp MterpCommonFallback 12831 12832MterpSuspendFallback: 12833 EXPORT_PC 12834#if MTERP_LOGGING 12835 movl rSELF, %eax 12836 movl %eax, OUT_ARG0(%esp) 12837 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12838 movl %ecx, OUT_ARG0(%esp) 12839 movl THREAD_FLAGS_OFFSET(%eax), %eax 12840 movl %eax, OUT_ARG2(%esp) 12841 call SYMBOL(MterpLogSuspendFallback) 12842#endif 12843 jmp MterpCommonFallback 12844 12845/* 12846 * If we're here, something is out of the ordinary. If there is a pending 12847 * exception, handle it. Otherwise, roll back and retry with the reference 12848 * interpreter. 12849 */ 12850MterpPossibleException: 12851 movl rSELF, %eax 12852 testl $-1, THREAD_EXCEPTION_OFFSET(%eax) 12853 jz MterpFallback 12854 /* intentional fallthrough - handle pending exception. */ 12855 12856/* 12857 * On return from a runtime helper routine, we've found a pending exception. 12858 * Can we handle it here - or need to bail out to caller? 12859 * 12860 */ 12861MterpException: 12862 movl rSELF, %eax 12863 movl %eax, OUT_ARG0(%esp) 12864 lea OFF_FP_SHADOWFRAME(rFP), %ecx 12865 movl %ecx, OUT_ARG1(%esp) 12866 call SYMBOL(MterpHandleException) 12867 testb %al, %al 12868 jz MterpExceptionReturn 12869 movl OFF_FP_CODE_ITEM(rFP), %eax 12870 movl OFF_FP_DEX_PC(rFP), %ecx 12871 lea CODEITEM_INSNS_OFFSET(%eax), rPC 12872 lea (rPC, %ecx, 2), rPC 12873 movl rPC, OFF_FP_DEX_PC_PTR(rFP) 12874 /* Do we need to switch interpreters? */ 12875 call SYMBOL(MterpShouldSwitchInterpreters) 12876 testb %al, %al 12877 jnz MterpFallback 12878 /* resume execution at catch block */ 12879 REFRESH_IBASE 12880 FETCH_INST 12881 GOTO_NEXT 12882 /* NOTE: no fallthrough */ 12883 12884/* 12885 * Common handling for branches with support for Jit profiling. 12886 * On entry: 12887 * rINST <= signed offset 12888 * condition bits <= set to establish sign of offset (use "NoFlags" entry if not) 12889 * 12890 * We have quite a few different cases for branch profiling, OSR detection and 12891 * suspend check support here. 12892 * 12893 * Taken backward branches: 12894 * If profiling active, do hotness countdown and report if we hit zero. 12895 * If in osr check mode, see if our target is a compiled loop header entry and do OSR if so. 12896 * Is there a pending suspend request? If so, suspend. 12897 * 12898 * Taken forward branches and not-taken backward branches: 12899 * If in osr check mode, see if our target is a compiled loop header entry and do OSR if so. 12900 * 12901 * Our most common case is expected to be a taken backward branch with active jit profiling, 12902 * but no full OSR check and no pending suspend request. 12903 * Next most common case is not-taken branch with no full OSR check. 12904 * 12905 */ 12906MterpCommonTakenBranch: 12907 jg .L_forward_branch # don't add forward branches to hotness 12908/* 12909 * We need to subtract 1 from positive values and we should not see 0 here, 12910 * so we may use the result of the comparison with -1. 12911 */ 12912#if JIT_CHECK_OSR != -1 12913# error "JIT_CHECK_OSR must be -1." 12914#endif 12915 cmpw $JIT_CHECK_OSR, rPROFILE 12916 je .L_osr_check 12917 decw rPROFILE 12918 je .L_add_batch # counted down to zero - report 12919.L_resume_backward_branch: 12920 movl rSELF, %eax 12921 testl $(THREAD_SUSPEND_REQUEST | THREAD_CHECKPOINT_REQUEST), THREAD_FLAGS_OFFSET(%eax) 12922 leal (rPC, rINST, 2), rPC 12923 FETCH_INST 12924 jnz .L_suspend_request_pending 12925 REFRESH_IBASE 12926 GOTO_NEXT 12927 12928.L_suspend_request_pending: 12929 EXPORT_PC 12930 movl %eax, OUT_ARG0(%esp) # rSELF in eax 12931 call SYMBOL(MterpSuspendCheck) # (self) 12932 testb %al, %al 12933 jnz MterpFallback 12934 REFRESH_IBASE # might have changed during suspend 12935 GOTO_NEXT 12936 12937.L_no_count_backwards: 12938 cmpw $JIT_CHECK_OSR, rPROFILE # possible OSR re-entry? 12939 jne .L_resume_backward_branch 12940.L_osr_check: 12941 EXPORT_PC 12942 movl rSELF, %eax 12943 movl %eax, OUT_ARG0(%esp) 12944 leal OFF_FP_SHADOWFRAME(rFP), %ecx 12945 movl %ecx, OUT_ARG1(%esp) 12946 movl rINST, OUT_ARG2(%esp) 12947 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 12948 testb %al, %al 12949 jz .L_resume_backward_branch 12950 jmp MterpOnStackReplacement 12951 12952.L_forward_branch: 12953 cmpw $JIT_CHECK_OSR, rPROFILE # possible OSR re-entry? 12954 je .L_check_osr_forward 12955.L_resume_forward_branch: 12956 leal (rPC, rINST, 2), rPC 12957 FETCH_INST 12958 GOTO_NEXT 12959 12960.L_check_osr_forward: 12961 EXPORT_PC 12962 movl rSELF, %eax 12963 movl %eax, OUT_ARG0(%esp) 12964 leal OFF_FP_SHADOWFRAME(rFP), %ecx 12965 movl %ecx, OUT_ARG1(%esp) 12966 movl rINST, OUT_ARG2(%esp) 12967 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 12968 testb %al, %al 12969 REFRESH_IBASE 12970 jz .L_resume_forward_branch 12971 jmp MterpOnStackReplacement 12972 12973.L_add_batch: 12974 movl OFF_FP_METHOD(rFP), %eax 12975 movl %eax, OUT_ARG0(%esp) 12976 leal OFF_FP_SHADOWFRAME(rFP), %ecx 12977 movl %ecx, OUT_ARG1(%esp) 12978 movl rSELF, %eax 12979 movl %eax, OUT_ARG2(%esp) 12980 call SYMBOL(MterpAddHotnessBatch) # (method, shadow_frame, self) 12981 jmp .L_no_count_backwards 12982 12983/* 12984 * Entered from the conditional branch handlers when OSR check request active on 12985 * not-taken path. All Dalvik not-taken conditional branch offsets are 2. 12986 */ 12987.L_check_not_taken_osr: 12988 EXPORT_PC 12989 movl rSELF, %eax 12990 movl %eax, OUT_ARG0(%esp) 12991 leal OFF_FP_SHADOWFRAME(rFP), %ecx 12992 movl %ecx, OUT_ARG1(%esp) 12993 movl $2, OUT_ARG2(%esp) 12994 call SYMBOL(MterpMaybeDoOnStackReplacement) # (self, shadow_frame, offset) 12995 testb %al, %al 12996 REFRESH_IBASE 12997 jnz MterpOnStackReplacement 12998 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 12999 13000/* 13001 * On-stack replacement has happened, and now we've returned from the compiled method. 13002 */ 13003MterpOnStackReplacement: 13004#if MTERP_LOGGING 13005 movl rSELF, %eax 13006 movl %eax, OUT_ARG0(%esp) 13007 lea OFF_FP_SHADOWFRAME(rFP), %ecx 13008 movl %ecx, OUT_ARG1(%esp) 13009 movl rINST, OUT_ARG2(%esp) 13010 call SYMBOL(MterpLogOSR) 13011#endif 13012 movl $1, %eax 13013 jmp MterpDone 13014 13015/* 13016 * Bail out to reference interpreter. 13017 */ 13018MterpFallback: 13019 EXPORT_PC 13020#if MTERP_LOGGING 13021 movl rSELF, %eax 13022 movl %eax, OUT_ARG0(%esp) 13023 lea OFF_FP_SHADOWFRAME(rFP), %ecx 13024 movl %ecx, OUT_ARG1(%esp) 13025 call SYMBOL(MterpLogFallback) 13026#endif 13027MterpCommonFallback: 13028 xor %eax, %eax 13029 jmp MterpDone 13030 13031/* 13032 * On entry: 13033 * uint32_t* rFP (should still be live, pointer to base of vregs) 13034 */ 13035MterpExceptionReturn: 13036 movl $1, %eax 13037 jmp MterpDone 13038MterpReturn: 13039 movl OFF_FP_RESULT_REGISTER(rFP), %edx 13040 movl %eax, (%edx) 13041 movl %ecx, 4(%edx) 13042 mov $1, %eax 13043MterpDone: 13044/* 13045 * At this point, we expect rPROFILE to be non-zero. If negative, hotness is disabled or we're 13046 * checking for OSR. If greater than zero, we might have unreported hotness to register 13047 * (the difference between the ending rPROFILE and the cached hotness counter). rPROFILE 13048 * should only reach zero immediately after a hotness decrement, and is then reset to either 13049 * a negative special state or the new non-zero countdown value. 13050 */ 13051 cmpw $0, rPROFILE 13052 jle MRestoreFrame # if > 0, we may have some counts to report. 13053 13054 movl %eax, rINST # stash return value 13055 /* Report cached hotness counts */ 13056 movl OFF_FP_METHOD(rFP), %eax 13057 movl %eax, OUT_ARG0(%esp) 13058 leal OFF_FP_SHADOWFRAME(rFP), %ecx 13059 movl %ecx, OUT_ARG1(%esp) 13060 movl rSELF, %eax 13061 movl %eax, OUT_ARG2(%esp) 13062 call SYMBOL(MterpAddHotnessBatch) # (method, shadow_frame, self) 13063 movl rINST, %eax # restore return value 13064 13065 /* pop up frame */ 13066MRestoreFrame: 13067 addl $FRAME_SIZE, %esp 13068 .cfi_adjust_cfa_offset -FRAME_SIZE 13069 13070 /* Restore callee save register */ 13071 POP %ebx 13072 POP %esi 13073 POP %edi 13074 POP %ebp 13075 ret 13076 .cfi_endproc 13077 SIZE(ExecuteMterpImpl,ExecuteMterpImpl) 13078 13079