Searched refs:Lanes (Results 1 - 3 of 3) sorted by relevance

/external/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonShuffler.h73 unsigned Lanes; member in class:llvm::HexagonCVIResource
79 void setLanes(unsigned l) { Lanes = l; };
87 unsigned getLanes() const { return (Lanes); };
/external/llvm/lib/CodeGen/
H A DRegisterCoalescer.cpp1691 /// Lanes written by this def, 0 for unanalyzed values.
1694 /// Lanes with defined values in this register. Other lanes are undef and
1776 /// Return true if MI uses any of the given Lanes from Reg.
1921 LaneBitmask Lanes = SubRangeJoin ? 1 : TRI->getSubRegIndexLaneMask(SubIdx); local
1922 V.ValidLanes = V.WriteLanes = Lanes;
2213 // Lanes written by the new def are no longer tainted.
2223 LaneBitmask Lanes) const {
2231 if (Lanes & TRI->getSubRegIndexLaneMask(
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp10301 SmallVector<int, 4> Lanes;
10302 Lanes.resize(NumLanes, -1);
10311 if (Lanes[j] < 0) {
10313 Lanes[j] = Mask[i] / LaneSize;
10314 } else if (Lanes[j] != Mask[i] / LaneSize) {
10335 if (Lanes[i] >= 0) {
10336 LaneMask[2 * i + 0] = 2*Lanes[i] + 0;
10337 LaneMask[2 * i + 1] = 2*Lanes[i] + 1;
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