Searched refs:MSCATTER (Results 1 - 9 of 9) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 738 MGATHER, MSCATTER, enumerator in enum:llvm::ISD::NodeType
|
| H A D | SelectionDAGNodes.h | 1214 N->getOpcode() == ISD::MSCATTER ||
2085 /// MGATHER and MSCATTER nodes
2111 N->getOpcode() == ISD::MSCATTER;
2139 /// This class is used to represent an MSCATTER node
2147 : MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, Operands, VTs, MemVT,
2158 return N->getOpcode() == ISD::MSCATTER;
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 247 } else if (Op.getOpcode() == ISD::MSCATTER || Op.getOpcode() == ISD::MSTORE)
343 case ISD::MSCATTER:
|
| H A D | SelectionDAGDumper.cpp | 296 case ISD::MSCATTER: return "masked_scatter";
|
| H A D | LegalizeVectorTypes.cpp | 1418 case ISD::MSCATTER:
2968 case ISD::MSCATTER: Res = WidenVecOp_MSCATTER(N, OpNo); break;
|
| H A D | LegalizeIntegerTypes.cpp | 905 case ISD::MSCATTER: Res = PromoteIntOp_MSCATTER(cast<MaskedScatterSDNode>(N),
|
| H A D | SelectionDAG.cpp | 5409 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops);
|
| H A D | DAGCombiner.cpp | 1445 case ISD::MSCATTER: return visitMSCATTER(N);
5281 // If the MSCATTER data type requires splitting and the mask is provided by a
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 1584 setOperationAction(ISD::MSCATTER, VT, Custom);
1609 setOperationAction(ISD::MSCATTER, VT, Custom);
1826 setTargetDAGCombine(ISD::MSCATTER);
19799 "MGATHER/MSCATTER are supported on AVX-512 arch only");
19949 "MGATHER/MSCATTER are supported on AVX-512 arch only");
20150 case ISD::MSCATTER: return LowerMSCATTER(Op, Subtarget, DAG);
[all...] |
Completed in 202 milliseconds