Searched refs:SETCCE (Results 1 - 6 of 6) sorted by relevance

/external/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h375 SETCCE, enumerator in enum:llvm::ISD::NodeType
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp213 case ISD::SETCCE: return "setcce";
H A DLegalizeIntegerTypes.cpp2666 case ISD::SETCCE: Res = ExpandIntOp_SETCCE(N); break;
2801 // Lower with SETCCE if the target supports it.
2804 ISD::SETCCE,
2807 // SETCCE can detect < and >= directly. For > and <=, flip operands and
2822 // SETCCE. The SETCCE operation is essentially looking at the high part of
2828 DAG.getNode(ISD::SETCCE, dl, getSetCCResultType(LHSLo.getValueType()),
2910 // Expand to a SUBE for the low part and a smaller SETCCE for the high.
2913 return DAG.getNode(ISD::SETCCE, dl, N->getValueType(0), LHSHi, RHSHi,
H A DLegalizeDAG.cpp1266 Node->getOpcode() == ISD::SETCCE ? 3 : 1;
H A DDAGCombiner.cpp1400 case ISD::SETCCE: return visitSETCCE(N);
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp428 setOperationAction(ISD::SETCCE , MVT::i8 , Custom);
429 setOperationAction(ISD::SETCCE , MVT::i16 , Custom);
430 setOperationAction(ISD::SETCCE , MVT::i32 , Custom);
434 setOperationAction(ISD::SETCCE , MVT::i64 , Custom);
14760 assert(LHS.getSimpleValueType().isInteger() && "SETCCE is integer only.");
20096 case ISD::SETCCE: return LowerSETCCE(Op, DAG);
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