Searched refs:SavedRegs (Results 1 - 25 of 29) sorted by relevance

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/external/llvm/lib/Target/BPF/
H A DBPFFrameLowering.cpp33 BitVector &SavedRegs,
35 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
36 SavedRegs.reset(BPF::R6);
37 SavedRegs.reset(BPF::R7);
38 SavedRegs.reset(BPF::R8);
39 SavedRegs.reset(BPF::R9);
32 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
H A DBPFFrameLowering.h31 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
/external/llvm/lib/CodeGen/
H A DTargetFrameLoweringImpl.cpp60 BitVector &SavedRegs,
70 SavedRegs.resize(TRI.getNumRegs());
82 SavedRegs.set(Reg);
59 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
H A DShrinkWrap.cpp138 BitVector SavedRegs; local
142 TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS);
144 for (int Reg = SavedRegs.find_first(); Reg != -1;
145 Reg = SavedRegs.find_next(Reg))
H A DPrologEpilogInserter.cpp87 const BitVector &SavedRegs);
182 BitVector SavedRegs; local
183 TFI->determineCalleeSaves(Fn, SavedRegs, RS);
186 assignCalleeSavedSpillSlots(Fn, SavedRegs);
294 const BitVector &SavedRegs) {
299 if (SavedRegs.empty())
308 if (SavedRegs.test(Reg))
293 assignCalleeSavedSpillSlots(MachineFunction &F, const BitVector &SavedRegs) argument
/external/llvm/lib/Target/Mips/
H A DMips16FrameLowering.cpp160 BitVector &SavedRegs,
162 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
169 SavedRegs.set(Mips::S2);
171 SavedRegs.set(Mips::S0);
159 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
H A DMips16FrameLowering.h41 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
H A DMipsSEFrameLowering.h40 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
H A DMipsSEFrameLowering.cpp835 static void setAliasRegs(MachineFunction &MF, BitVector &SavedRegs, argument
839 SavedRegs.set(*AI);
843 BitVector &SavedRegs,
845 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
853 setAliasRegs(MF, SavedRegs, FP);
856 setAliasRegs(MF, SavedRegs, BP);
842 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
/external/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.h39 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
H A DSparcFrameLowering.cpp359 BitVector &SavedRegs,
361 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
358 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86AsmBackend.cpp463 mutable unsigned SavedRegs[CU_NUM_SAVED_REGS]; member in class:__anon12791::DarwinX86AsmBackend
499 memset(SavedRegs, 0, sizeof(SavedRegs));
533 memset(SavedRegs, 0, sizeof(SavedRegs));
578 SavedRegs[SavedRegIdx++] = Reg;
638 std::reverse(&SavedRegs[0], &SavedRegs[SavedRegIdx]);
680 unsigned Reg = SavedRegs[i];
714 int CUReg = getCompactUnwindRegNum(SavedRegs[
[all...]
/external/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.h61 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
H A DAArch64FrameLowering.cpp872 BitVector &SavedRegs,
879 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
888 SavedRegs.set(AArch64::FP);
889 SavedRegs.set(AArch64::LR);
895 SavedRegs.set(RegInfo->getBaseRegister());
898 SavedRegs.set(AArch64::X9);
920 const bool OddRegUsed = SavedRegs.test(OddReg);
921 const bool EvenRegUsed = SavedRegs.test(EvenReg);
942 SavedRegs.set(Reg);
997 SavedRegs
871 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
[all...]
/external/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.h30 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
H A DSystemZFrameLowering.cpp66 BitVector &SavedRegs,
68 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
82 SavedRegs.set(SystemZ::ArgGPRs[I]);
87 SavedRegs.set(SystemZ::R11D);
92 SavedRegs.set(SystemZ::R14D);
101 if (SystemZ::GR64BitRegClass.contains(Reg) && SavedRegs.test(Reg)) {
102 SavedRegs.set(SystemZ::R15D);
65 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
/external/llvm/lib/Target/XCore/
H A DXCoreFrameLowering.h50 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
/external/llvm/lib/Target/ARM/
H A DARMFrameLowering.h54 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
H A DARMFrameLowering.cpp1433 checkNumAlignedDPRCS2Regs(MachineFunction &MF, BitVector &SavedRegs) { argument
1462 if (!SavedRegs.test(ARM::D8 + NumSpills))
1473 SavedRegs.set(ARM::R4);
1477 BitVector &SavedRegs,
1479 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
1506 SavedRegs.set(ARM::R4);
1511 SavedRegs.set(ARM::LR);
1521 SavedRegs.set(ARM::R4);
1525 checkNumAlignedDPRCS2Regs(MF, SavedRegs);
1529 SavedRegs
1476 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
[all...]
/external/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.h72 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
H A DPPCFrameLowering.cpp1226 BitVector &SavedRegs,
1228 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
1237 SavedRegs.reset(LR);
1281 (SavedRegs.test(PPC::CR2) ||
1282 SavedRegs.test(PPC::CR3) ||
1283 SavedRegs.test(PPC::CR4))) {
1225 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
/external/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.h48 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblyPEI.cpp96 const BitVector &SavedRegs);
197 BitVector SavedRegs; local
198 TFI->determineCalleeSaves(Fn, SavedRegs, RS);
201 assignCalleeSavedSpillSlots(Fn, SavedRegs);
310 const BitVector &SavedRegs) {
315 if (SavedRegs.empty())
324 if (SavedRegs.test(Reg))
309 assignCalleeSavedSpillSlots(MachineFunction &F, const BitVector &SavedRegs) argument
/external/llvm/include/llvm/Target/
H A DTargetFrameLowering.h255 /// The default implementation checks populates the \p SavedRegs bitset with
260 virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
/external/llvm/lib/Target/X86/
H A DX86FrameLowering.h77 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,

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