| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.h | 28 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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| H A D | SparcRegisterInfo.cpp | 45 SparcRegisterInfo::getCallPreservedMask(const MachineFunction &MF, function in class:SparcRegisterInfo
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| H A D | SparcISelLowering.cpp | 979 : TRI->getCallPreservedMask(DAG.getMachineFunction(), CallConv));
1289 : TRI->getCallPreservedMask(DAG.getMachineFunction(),
2012 const uint32_t *Mask = Subtarget->getRegisterInfo()->getCallPreservedMask(
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| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.h | 47 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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| H A D | SystemZRegisterInfo.cpp | 31 SystemZRegisterInfo::getCallPreservedMask(const MachineFunction &MF, function in class:SystemZRegisterInfo
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| H A D | SystemZISelLowering.cpp | 1129 const uint32_t *Mask = TRI->getCallPreservedMask(MF, CallConv);
2482 TRI->getCallPreservedMask(DAG.getMachineFunction(), CallingConv::C);
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterInfo.h | 45 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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| H A D | MipsRegisterInfo.cpp | 116 MipsRegisterInfo::getCallPreservedMask(const MachineFunction &MF, function in class:MipsRegisterInfo
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| H A D | MipsFastISel.cpp | 1318 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
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| H A D | MipsISelLowering.cpp | 2552 TRI->getCallPreservedMask(CLI.DAG.getMachineFunction(), CLI.CallConv);
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.h | 40 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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| H A D | AArch64RegisterInfo.cpp | 68 AArch64RegisterInfo::getCallPreservedMask(const MachineFunction &MF, function in class:AArch64RegisterInfo
93 // getCallPreservedMask but that additionally preserves the register used for
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| H A D | AArch64FastISel.cpp | 3143 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
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| H A D | AArch64ISelLowering.cpp | 3178 Mask = TRI->getCallPreservedMask(MF, CallConv);
3181 Mask = TRI->getCallPreservedMask(MF, CallConv);
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| /external/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.h | 102 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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| H A D | X86RegisterInfo.cpp | 310 X86RegisterInfo::getCallPreservedMask(const MachineFunction &MF, function in class:X86RegisterInfo
417 const uint32_t *RegMask = getCallPreservedMask(MF, CC);
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| H A D | X86FastISel.cpp | 3143 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 95 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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| H A D | ARMBaseRegisterInfo.cpp | 94 ARMBaseRegisterInfo::getCallPreservedMask(const MachineFunction &MF, function in class:ARMBaseRegisterInfo
113 // getCallPreservedMask but that additionally preserves the register used for
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| H A D | ARMFastISel.cpp | 2266 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
2417 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.h | 78 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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| H A D | PPCRegisterInfo.cpp | 132 PPCRegisterInfo::getCallPreservedMask(const MachineFunction &MF, function in class:PPCRegisterInfo
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| H A D | PPCFastISel.cpp | 1575 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
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| /external/llvm/include/llvm/Target/ |
| H A D | TargetRegisterInfo.h | 452 virtual const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 821 TRI.getCallPreservedMask(*FuncInfo.MF, CC)));
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