Searched refs:reg_size (Results 1 - 25 of 40) sorted by relevance

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/external/vixl/src/vixl/
H A Dutils.cc130 unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size) { argument
131 VIXL_ASSERT((reg_size % 8) == 0);
133 for (unsigned i = 0; i < (reg_size / 16); i++) {
H A Dutils.h200 unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size);
/external/v8/src/arm64/
H A Dassembler-arm64-inl.h64 return reg_size;
71 return reg_size / 8;
77 return reg_size == 32;
83 return reg_size == 64;
100 ((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits)) &&
107 ((reg_size == kSRegSizeInBits) || (reg_size == kDRegSizeInBits)) &&
115 DCHECK((reg_type != kNoRegister) || (reg_size == 0));
123 return Aliases(other) && (reg_size
1039 ImmS(unsigned imms, unsigned reg_size) argument
1047 ImmR(unsigned immr, unsigned reg_size) argument
1056 ImmSetBits(unsigned imms, unsigned reg_size) argument
1065 ImmRotate(unsigned immr, unsigned reg_size) argument
1080 BitN(unsigned bitn, unsigned reg_size) argument
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H A Dinstructions-arm64.cc75 static uint64_t RepeatBitsAcrossReg(unsigned reg_size, argument
80 DCHECK((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits));
82 for (unsigned i = width; i < reg_size; i *= 2) {
93 unsigned reg_size = SixtyFourBits() ? kXRegSizeInBits : kWRegSizeInBits; local
132 return RepeatBitsAcrossReg(reg_size,
H A Ddisasm-arm64.h64 bool IsMovzMovnImm(unsigned reg_size, uint64_t value);
H A Dassembler-arm64.h127 int reg_size; member in struct:v8::internal::CPURegister
139 reg_size = 0;
145 reg_size = r.reg_size;
152 reg_size = r.reg_size;
214 reg_size = 0;
220 reg_size = r.reg_size;
227 reg_size
1191 int reg_size = rd.SizeInBits(); local
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H A Ddisasm-arm64.cc231 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSizeInBits local
233 if (rn_is_zr && !IsMovzMovnImm(reg_size, instr->ImmLogical())) {
256 bool DisassemblingDecoder::IsMovzMovnImm(unsigned reg_size, uint64_t value) { argument
257 DCHECK((reg_size == kXRegSizeInBits) ||
258 ((reg_size == kWRegSizeInBits) && (value <= 0xffffffff)));
269 if ((reg_size == kXRegSizeInBits) &&
276 if ((reg_size == kWRegSizeInBits) &&
1510 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSizeInBits local
1512 AppendToOutput("#%d", reg_size - r);
H A Dmacro-assembler-arm64.cc68 unsigned reg_size = rd.SizeInBits(); local
123 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
186 unsigned reg_size = rd.SizeInBits(); local
197 if (CountClearHalfWords(~imm, reg_size) >
198 CountClearHalfWords(imm, reg_size)) {
210 DCHECK((reg_size % 16) == 0);
320 unsigned MacroAssembler::CountClearHalfWords(uint64_t imm, unsigned reg_size) { argument
321 DCHECK((reg_size % 8) == 0);
323 for (unsigned i = 0; i < (reg_size / 16); i++) {
335 bool MacroAssembler::IsImmMovz(uint64_t imm, unsigned reg_size) { argument
343 IsImmMovn(uint64_t imm, unsigned reg_size) argument
418 int reg_size = dst.SizeInBits(); local
440 int reg_size = dst.SizeInBits(); local
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H A Dsimulator-arm64.cc2168 T reg_size = sizeof(T) * 8; local
2174 mask = diff < reg_size - 1 ? (static_cast<T>(1) << (diff + 1)) - 1
2178 umask = (umask >> R) | (umask << (reg_size - R));
2180 diff += reg_size;
2208 T result = (static_cast<unsignedT>(src) >> R) | (src << (reg_size - R));
2210 T topbits_preshift = (static_cast<T>(1) << (reg_size - diff - 1)) - 1;
2427 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSizeInBits local
2429 double fn_val = fpreg(reg_size, instr->Rn());
2433 case FCMP_d: FPCompare(fn_val, fpreg(reg_size, instr->Rm())); break;
2450 unsigned reg_size local
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/external/opencv3/modules/imgproc/src/
H A Dlsd.cpp320 * @param reg_size Return: The size of the region.
325 int& reg_size, double& reg_angle, const double& prec);
331 * @param reg_size The number of points in the region.
337 void region2rect(const std::vector<RegionPoint>& reg, const int reg_size, const double reg_angle,
344 double get_theta(const std::vector<RegionPoint>& reg, const int& reg_size, const double& x,
353 bool refine(std::vector<RegionPoint>& reg, int& reg_size, double reg_angle,
360 bool reduce_region_radius(std::vector<RegionPoint>& reg, int& reg_size, double reg_angle,
481 int reg_size; local
483 region_grow(list[i].p, reg, reg_size, reg_angle, prec);
486 if(reg_size < min_reg_siz
635 region_grow(const Point2i& s, std::vector<RegionPoint>& reg, int& reg_size, double& reg_angle, const double& prec) argument
688 region2rect(const std::vector<RegionPoint>& reg, const int reg_size, const double reg_angle, const double prec, const double p, rect& rec) const argument
746 get_theta(const std::vector<RegionPoint>& reg, const int& reg_size, const double& x, const double& y, const double& reg_angle, const double& prec) const argument
784 refine(std::vector<RegionPoint>& reg, int& reg_size, double reg_angle, const double prec, double p, rect& rec, const double& density_th) argument
815 region_grow(Point(reg[0].x, reg[0].y), reg, reg_size, reg_angle, tau); local
832 reduce_region_radius(std::vector<RegionPoint>& reg, int& reg_size, double reg_angle, const double prec, double p, rect& rec, double density, const double& density_th) argument
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/external/jemalloc/src/
H A Dandroid_je_mallinfo.c37 mi.uordblks += arena_bin_info[j].reg_size * bin->stats.curregs;
73 mi.fsmblks += arena_bin_info[j].reg_size * bin->stats.curregs;
92 mi.ordblks = arena_bin_info[bidx].reg_size * bin->stats.curregs;
H A Dstats.c81 size_t reg_size, run_size, curregs, availregs, milli; local
93 CTL_M2_GET("arenas.bin.0.size", j, &reg_size, size_t);
138 reg_size, j, curregs * reg_size, nmalloc,
148 reg_size, j, curregs * reg_size, nmalloc,
H A Dandroid_je_iterate.c143 callback(ptr, bin_info->reg_size, arg);
/external/vixl/src/vixl/a64/
H A Dsimulator-a64.cc276 uint64_t Simulator::AddWithCarry(unsigned reg_size,
282 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize));
284 uint64_t max_uint = (reg_size == kWRegSize) ? kWMaxUInt : kXMaxUInt;
285 uint64_t reg_mask = (reg_size == kWRegSize) ? kWRegMask : kXRegMask;
286 uint64_t sign_mask = (reg_size == kWRegSize) ? kWSignMask : kXSignMask;
293 nzcv().SetN(CalcNFlag(result, reg_size));
315 int64_t Simulator::ShiftOperand(unsigned reg_size, argument
322 int64_t mask = reg_size == kXRegSize ? kXRegMask : kWRegMask;
330 unsigned s_shift = kXRegSize - reg_size;
350 ExtendValue(unsigned reg_size, int64_t value, Extend extend_type, unsigned left_shift) argument
410 GetPrintRegisterFormatForSize( unsigned reg_size, unsigned lane_size) argument
787 int reg_size = GetPrintRegSizeInBytes(format); local
889 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
920 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
936 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
946 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
965 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
983 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1012 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1024 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1583 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1649 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1800 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1835 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1889 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSize local
2958 int reg_size = RegisterSizeInBytesFromFormat(vf); local
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H A Dinstructions-a64.cc60 static uint64_t RepeatBitsAcrossReg(unsigned reg_size, argument
65 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
67 for (unsigned i = width; i < reg_size; i *= 2) {
133 unsigned reg_size = SixtyFourBits() ? kXRegSize : kWRegSize; local
172 return RepeatBitsAcrossReg(reg_size,
H A Dmacro-assembler-a64.cc390 unsigned reg_size = rd.size(); local
401 if (CountClearHalfWords(~imm, reg_size) >
402 CountClearHalfWords(imm, reg_size)) {
418 VIXL_ASSERT((reg_size % 16) == 0);
458 int reg_size = dst.size(); local
460 if (IsImmMovz(imm, reg_size) && !dst.IsSP()) {
467 } else if (IsImmMovn(imm, reg_size) && !dst.IsSP()) {
474 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) {
717 unsigned reg_size = rd.size(); local
775 if (IsImmLogical(immediate, reg_size,
1323 int reg_size = dst.size(); local
1667 int reg_size = registers.RegisterSizeInBytes(); local
1699 int reg_size = registers.RegisterSizeInBytes(); local
2029 int reg_size = registers.RegisterSizeInBytes(); local
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H A Ddisasm-a64.h144 bool IsMovzMovnImm(unsigned reg_size, uint64_t value);
H A Dassembler-a64.h1505 unsigned reg_size = rd.size();
1506 VIXL_ASSERT(shift < reg_size);
1507 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1);
3888 static Instr ImmS(unsigned imms, unsigned reg_size) {
3889 VIXL_ASSERT(((reg_size == kXRegSize) && is_uint6(imms)) ||
3890 ((reg_size == kWRegSize) && is_uint5(imms)));
3891 USE(reg_size);
3895 static Instr ImmR(unsigned immr, unsigned reg_size) {
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/external/jemalloc/test/unit/
H A Djunk.c31 for (i = 0; i < bin_info->reg_size; i++) {
34 i, bin_info->reg_size);
/external/v8/test/cctest/
H A Dtest-utils-arm64.h197 // r array will be populated with <reg_size>-sized registers,
207 int reg_size, int reg_count, RegList allowed);
211 int reg_size, int reg_count, RegList allowed);
H A Dtest-utils-arm64.cc214 int reg_size, int reg_count, RegList allowed) {
221 r[i] = Register::Create(n, reg_size);
241 int reg_size, int reg_count, RegList allowed) {
248 v[i] = FPRegister::Create(n, reg_size);
213 PopulateRegisterArray(Register* w, Register* x, Register* r, int reg_size, int reg_count, RegList allowed) argument
240 PopulateFPRegisterArray(FPRegister* s, FPRegister* d, FPRegister* v, int reg_size, int reg_count, RegList allowed) argument
/external/vixl/test/
H A Dtest-utils-a64.h219 // r array will be populated with <reg_size>-sized registers,
229 int reg_size, int reg_count, RegList allowed);
233 int reg_size, int reg_count, RegList allowed);
H A Dtest-utils-a64.cc246 int reg_size, int reg_count, RegList allowed) {
253 r[i] = Register(n, reg_size);
273 int reg_size, int reg_count, RegList allowed) {
280 v[i] = FPRegister(n, reg_size);
245 PopulateRegisterArray(Register* w, Register* x, Register* r, int reg_size, int reg_count, RegList allowed) argument
272 PopulateFPRegisterArray(FPRegister* s, FPRegister* d, FPRegister* v, int reg_size, int reg_count, RegList allowed) argument
H A Dtest-simulator-a64.cc306 uintptr_t results, unsigned reg_size) {
307 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
321 bool double_op = reg_size == kDRegSize;
426 uintptr_t results, unsigned reg_size) {
427 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
442 bool double_op = reg_size == kDRegSize;
561 uintptr_t results, unsigned reg_size) {
562 VIXL_ASSERT((reg_size
304 Test2Op_Helper(Test2OpFPHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size) argument
424 Test3Op_Helper(Test3OpFPHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size) argument
559 TestCmp_Helper(TestFPCmpHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size) argument
688 TestCmpZero_Helper(TestFPCmpZeroHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size) argument
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/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_vs_emit.c1168 GLuint reg_size )
1174 GLuint byte_offset = arg.nr * 32 + arg.subnr + offset * reg_size;
1187 brw_MUL(p, acc, vp_address, brw_imm_uw(reg_size));
1190 brw_MUL(p, acc, suboffset(vp_address, 4), brw_imm_uw(reg_size));
1208 int reg_size = 32; local
1225 brw_MUL(p, acc, vp_address, brw_imm_uw(reg_size));
1229 brw_MUL(p, acc, suboffset(vp_address, 4), brw_imm_uw(reg_size));
1231 brw_imm_uw(byte_offset + reg_size / 2));

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