Searched refs:left (Results 1 - 22 of 22) sorted by relevance

/art/test/550-checker-multiply-accumulate/src/
H A DMain.java82 public static int $opt$noinline$mulAdd(int acc, int left, int right) { argument
84 return acc + left * right;
124 public static long $opt$noinline$mulSub(long acc, long left, long right) { argument
126 return acc - left * right;
176 public static int $opt$noinline$multipleUses1(int acc, int left, int right) { argument
178 int temp = left * right;
234 public static long $opt$noinline$multipleUses2(long acc, long left, long right) { argument
236 long temp = left * right;
375 public static int $opt$noinline$mulNeg(int left, int right) { argument
377 return - (left * righ
422 $opt$noinline$mulNeg(long left, long right) argument
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/art/tools/ahat/src/
H A Dstyle.css26 padding-left: 4px;
31 padding-left: 8px;
/art/compiler/optimizing/
H A Dinstruction_simplifier_shared.cc165 // We prefer not applying the following transformations if the left and
173 HInstruction* left = mul->GetLeft(); local
176 TrySimpleMultiplyAccumulatePatterns(mul, right->AsBinaryOperation(), left)) {
179 if ((left->IsAdd() || left->IsSub()) &&
180 TrySimpleMultiplyAccumulatePatterns(mul, left->AsBinaryOperation(), right)) {
189 HInstruction* left = op->GetLeft(); local
194 if (left->IsNot() ^ right->IsNot()) {
195 HInstruction* hnot = (left->IsNot() ? left
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H A Dinstruction_simplifier.cc185 HInstruction* left = op->GetLeft(); local
190 if (((left->IsNot() && right->IsNot()) ||
191 (left->IsBooleanNot() && right->IsBooleanNot())) &&
192 left->HasOnlyOneNonEnvironmentUse() &&
201 HInstruction* src_left = left->InputAt(0);
206 left->ReplaceWith(src_left);
208 left->GetBlock()->RemoveInstruction(left);
219 if (left->IsBooleanNot()) {
286 HInstruction* left local
913 HInstruction* left = instruction->GetLeft(); local
1059 HInstruction* left = condition->GetLeft(); local
1390 HInstruction* left = instruction->GetLeft(); local
1476 HInstruction* left = instruction->GetLeft(); local
1621 HInstruction* left = invoke->InputAt(0); local
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H A Dbounds_check_elimination.cc50 // Return whether (left + right) overflows or underflows.
51 static bool WouldAddOverflowOrUnderflow(int32_t left, int32_t right) { argument
55 if ((right > 0) && (left <= (std::numeric_limits<int32_t>::max() - right))) {
59 if ((right < 0) && (left >= (std::numeric_limits<int32_t>::min() - right))) {
74 HInstruction* left = bin_op->GetLeft(); local
80 instruction = left;
81 left_so_far = left;
99 HInstruction *left; local
101 if (IsAddOrSubAConstant(instruction, &left, &right)) {
102 return ValueBound(left, righ
121 HInstruction *left; local
638 HandleIfBetweenTwoMonotonicValueRanges(HIf* instruction, HInstruction* left, HInstruction* right, IfCondition cond, MonotonicValueRange* left_range, MonotonicValueRange* right_range) argument
704 HandleIf(HIf* instruction, HInstruction* left, HInstruction* right, IfCondition cond) argument
913 HInstruction *left; variable
961 HInstruction* left = cond->GetLeft(); variable
983 HInstruction* left = sub->GetLeft(); variable
1058 HInstruction* left = instruction->GetLeft(); local
1114 HInstruction *left; variable
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H A Dinstruction_simplifier_arm64.cc94 HInstruction* left; local
97 left = use->InputAt(0);
102 left = GetGraph()->GetConstant(right->GetType(), 0);
104 DCHECK(left == bitfield_op || right == bitfield_op);
106 if (left == right) {
116 other_input = left;
H A Dnodes_arm64.h27 kLSL, // Logical shift left.
44 HInstruction* left,
54 SetRawInputAt(0, left);
43 HArm64DataProcWithShifterOp(HInstruction* instr, HInstruction* left, HInstruction* right, OpKind op, int shift = 0, uint32_t dex_pc = kNoDexPc) argument
H A Dnodes_shared.h60 HInstruction* left,
63 : HBinaryOperation(result_type, left, right, SideEffects::None(), dex_pc),
58 HBitwiseNegatedRight(Primitive::Type result_type, InstructionKind op, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument
H A Dconstant_folding.cc132 HInstruction* left = instruction->GetLeft(); local
133 if (left->IsConstant() && left->AsConstant()->IsArithmeticZero()) {
138 instruction->ReplaceWith(left);
H A Dssa_builder.cc34 HInstruction* left = equality_instr->InputAt(0); local
38 if ((left->GetType() == Primitive::kPrimNot) && (right->GetType() == Primitive::kPrimInt)) {
41 && (left->GetType() == Primitive::kPrimInt)) {
42 int_operand = left;
H A Dnodes.h468 // because it can be created anytime after the pass and thus it will be left
2938 HInstruction* left,
2943 SetRawInputAt(0, left);
2956 HInstruction* left = InputAt(0); local
2958 if (left->IsConstant() && !right->IsConstant()) {
2960 ReplaceInput(left, 1);
2970 HInstruction* left = InputAt(0); local
2972 if (left == right || (!left->IsConstant() && right->IsConstant())) {
2979 if (left
2937 HBinaryOperation(Primitive::Type result_type, HInstruction* left, HInstruction* right, SideEffects side_effects = SideEffects::None(), uint32_t dex_pc = kNoDexPc) argument
4239 HAdd(Primitive::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument
4274 HSub(Primitive::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument
4307 HMul(Primitive::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument
4342 HDiv(Primitive::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc) argument
4394 HRem(Primitive::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc) argument
4611 HAnd(Primitive::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument
4648 HOr(Primitive::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument
4685 HXor(Primitive::Type result_type, HInstruction* left, HInstruction* right, uint32_t dex_pc = kNoDexPc) argument
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H A Dcode_generator_arm.cc1267 Location left = locations->InAt(0); local
1271 Register left_high = left.AsRegisterPairHigh<Register>();
1272 Register left_low = left.AsRegisterPairLow<Register>();
1357 Location left = locations->InAt(0); local
1366 __ vcmps(left.AsFpuRegister<SRegister>(), right.AsFpuRegister<SRegister>());
1370 __ vcmpd(FromLowSToD(left.AsFpuRegisterPairLow<SRegister>()),
1443 Register left = locations->InAt(0).AsRegister<Register>(); local
1446 __ cmp(left, ShifterOperand(right.AsRegister<Register>()));
1449 __ CmpConstant(left, CodeGenerator::GetInt32ValueOf(right.GetConstant()));
1573 Location left local
3636 Location left = locations->InAt(0); local
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H A Dcode_generator_x86_64.cc1287 Location left = locations->InAt(0); local
1297 CpuRegister left_reg = left.AsRegister<CpuRegister>();
1313 CpuRegister left_reg = left.AsRegister<CpuRegister>();
1326 __ ucomiss(left.AsFpuRegister<XmmRegister>(), right.AsFpuRegister<XmmRegister>());
1328 __ ucomiss(left.AsFpuRegister<XmmRegister>(),
1333 __ ucomiss(left.AsFpuRegister<XmmRegister>(),
1340 __ ucomisd(left.AsFpuRegister<XmmRegister>(), right.AsFpuRegister<XmmRegister>());
1342 __ ucomisd(left.AsFpuRegister<XmmRegister>(),
1347 __ ucomisd(left.AsFpuRegister<XmmRegister>(),
1859 Location left local
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H A Dcode_generator_arm64.cc1897 Register left; local
1899 left = InputRegisterAt(instruction, 0);
1927 __ Add(out, left, right_operand);
1930 __ And(out, left, right_operand);
1937 __ Orr(out, left, right_operand);
1940 __ Sub(out, left, right_operand);
1943 __ Eor(out, left, right_operand);
2427 // 0 if: left == right
2428 // 1 if: left > right
2429 // -1 if: left < righ
2438 Register left = InputRegisterAt(compare, 0); local
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H A Dcode_generator_x86.cc1188 Location left = locations->InAt(0); local
1192 Register left_high = left.AsRegisterPairHigh<Register>();
1193 Register left_low = left.AsRegisterPairLow<Register>();
1325 Location left = locations->InAt(0); local
1334 GenerateFPCompare(left, right, condition, false);
1338 GenerateFPCompare(left, right, condition, true);
4166 Location left = locations->InAt(0); local
4178 GenerateIntCompare(left, right);
4182 Register left_low = left.AsRegisterPairLow<Register>();
4183 Register left_high = left
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/art/runtime/gc/space/
H A Dregion_space-inl.h282 size_t left = 0; local
283 while (left + num_regs - 1 < num_regions_) {
285 size_t right = left;
286 DCHECK_LT(right, left + num_regs)
288 while (right < left + num_regs) {
298 DCHECK_EQ(left + num_regs, right);
299 Region* first_reg = &regions_[left];
304 for (size_t p = left + 1; p < right; ++p) {
318 left = right + 1;
/art/cmdline/detail/
H A Dcmdline_parser_detail.h55 static std::true_type EqualityOperatorTest(const TL& left, const TR& right,
56 std::remove_reference<decltype(left == right)>* = 0); // NOLINT [whitespace/operators] [3]
59 static std::false_type EqualityOperatorTest(const TL& left, const T& ... args);
/art/runtime/base/
H A Dbit_vector.cc308 uint32_t left = storage_size_ - size; local
310 if (left > 0) {
311 memset(storage_ + size, 0, kWordBytes * left);
/art/runtime/verifier/
H A Dreg_type_cache.cc345 const RegType& RegTypeCache::FromUnresolvedMerge(const RegType& left, const RegType& right) { argument
351 if (left.IsUnresolvedMergedReference()) {
352 const UnresolvedMergedType& left_merge = *down_cast<const UnresolvedMergedType*>(&left);
356 left_unresolved_is_array = left.IsArrayTypes();
357 } else if (left.IsUnresolvedTypes()) {
359 types.SetBit(left.GetId());
361 left_unresolved_is_array = left.IsArrayTypes();
364 left_resolved = &left;
402 if ((!left_unresolved_is_array && left_resolved != &left) ||
H A Dreg_type_cache.h78 const RegType& FromUnresolvedMerge(const RegType& left, const RegType& right)
/art/runtime/arch/mips64/
H A Dquick_entrypoints_mips64.S777 dsll $t3, $t3, 4 # shift the frame size left 4 to align to 16 bytes
880 dsll $t3, $t3, 4 # shift the frame size left 4 to align to 16 bytes
1560 ld $a4, THREAD_LOCAL_ALLOC_STACK_END_OFFSET($s1) # has any room left.
/art/oatdump/
H A Doatdump.cc1164 StackMap left = code_info_.GetStackMapAt(lhs, encoding_);
1165 uint32_t left_pc = left.GetNativePcOffset(encoding_.stack_map_encoding);

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