1    /*
2     * Compare two 64-bit values.  Puts 0, 1, or -1 into the destination
3     * register based on the results of the comparison.
4     */
5    /* cmp-long vAA, vBB, vCC */
6    FETCH r0, 1                         @ r0<- CCBB
7    mov     r9, rINST, lsr #8           @ r9<- AA
8    and     r2, r0, #255                @ r2<- BB
9    mov     r3, r0, lsr #8              @ r3<- CC
10    VREG_INDEX_TO_ADDR r2, r2           @ r2<- &fp[BB]
11    VREG_INDEX_TO_ADDR r3, r3           @ r3<- &fp[CC]
12    ldmia   r2, {r0-r1}                 @ r0/r1<- vBB/vBB+1
13    ldmia   r3, {r2-r3}                 @ r2/r3<- vCC/vCC+1
14    cmp     r0, r2
15    sbcs    ip, r1, r3                  @ Sets correct CCs for checking LT (but not EQ/NE)
16    mov     ip, #0
17    mvnlt   ip, #0                      @ -1
18    cmpeq   r0, r2                      @ For correct EQ/NE, we may need to repeat the first CMP
19    orrne   ip, #1
20    FETCH_ADVANCE_INST 2                @ advance rPC, load rINST
21    SET_VREG ip, r9                     @ vAA<- ip
22    GET_INST_OPCODE ip                  @ extract opcode from rINST
23    GOTO_OPCODE ip                      @ jump to next instruction
24