1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef _DRM_MODE_H 20#define _DRM_MODE_H 21#include <linux/types.h> 22#define DRM_DISPLAY_INFO_LEN 32 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#define DRM_CONNECTOR_NAME_LEN 32 25#define DRM_DISPLAY_MODE_LEN 32 26#define DRM_PROP_NAME_LEN 32 27#define DRM_MODE_TYPE_BUILTIN (1 << 0) 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define DRM_MODE_TYPE_CLOCK_C ((1 << 1) | DRM_MODE_TYPE_BUILTIN) 30#define DRM_MODE_TYPE_CRTC_C ((1 << 2) | DRM_MODE_TYPE_BUILTIN) 31#define DRM_MODE_TYPE_PREFERRED (1 << 3) 32#define DRM_MODE_TYPE_DEFAULT (1 << 4) 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#define DRM_MODE_TYPE_USERDEF (1 << 5) 35#define DRM_MODE_TYPE_DRIVER (1 << 6) 36#define DRM_MODE_FLAG_PHSYNC (1 << 0) 37#define DRM_MODE_FLAG_NHSYNC (1 << 1) 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39#define DRM_MODE_FLAG_PVSYNC (1 << 2) 40#define DRM_MODE_FLAG_NVSYNC (1 << 3) 41#define DRM_MODE_FLAG_INTERLACE (1 << 4) 42#define DRM_MODE_FLAG_DBLSCAN (1 << 5) 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44#define DRM_MODE_FLAG_CSYNC (1 << 6) 45#define DRM_MODE_FLAG_PCSYNC (1 << 7) 46#define DRM_MODE_FLAG_NCSYNC (1 << 8) 47#define DRM_MODE_FLAG_HSKEW (1 << 9) 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49#define DRM_MODE_FLAG_BCAST (1 << 10) 50#define DRM_MODE_FLAG_PIXMUX (1 << 11) 51#define DRM_MODE_FLAG_DBLCLK (1 << 12) 52#define DRM_MODE_FLAG_CLKDIV2 (1 << 13) 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54#define DRM_MODE_FLAG_3D_MASK (0x1f << 14) 55#define DRM_MODE_FLAG_3D_NONE (0 << 14) 56#define DRM_MODE_FLAG_3D_FRAME_PACKING (1 << 14) 57#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2 << 14) 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3 << 14) 60#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4 << 14) 61#define DRM_MODE_FLAG_3D_L_DEPTH (5 << 14) 62#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6 << 14) 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7 << 14) 65#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8 << 14) 66#define DRM_MODE_DPMS_ON 0 67#define DRM_MODE_DPMS_STANDBY 1 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69#define DRM_MODE_DPMS_SUSPEND 2 70#define DRM_MODE_DPMS_OFF 3 71#define DRM_MODE_SCALE_NONE 0 72#define DRM_MODE_SCALE_FULLSCREEN 1 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74#define DRM_MODE_SCALE_CENTER 2 75#define DRM_MODE_SCALE_ASPECT 3 76#define DRM_MODE_PICTURE_ASPECT_NONE 0 77#define DRM_MODE_PICTURE_ASPECT_4_3 1 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79#define DRM_MODE_PICTURE_ASPECT_16_9 2 80#define DRM_MODE_DITHERING_OFF 0 81#define DRM_MODE_DITHERING_ON 1 82#define DRM_MODE_DITHERING_AUTO 2 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84#define DRM_MODE_DIRTY_OFF 0 85#define DRM_MODE_DIRTY_ON 1 86#define DRM_MODE_DIRTY_ANNOTATE 2 87struct drm_mode_modeinfo { 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 __u32 clock; 90 __u16 hdisplay; 91 __u16 hsync_start; 92 __u16 hsync_end; 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 __u16 htotal; 95 __u16 hskew; 96 __u16 vdisplay; 97 __u16 vsync_start; 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 __u16 vsync_end; 100 __u16 vtotal; 101 __u16 vscan; 102 __u32 vrefresh; 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 __u32 flags; 105 __u32 type; 106 char name[DRM_DISPLAY_MODE_LEN]; 107}; 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109struct drm_mode_card_res { 110 __u64 fb_id_ptr; 111 __u64 crtc_id_ptr; 112 __u64 connector_id_ptr; 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 __u64 encoder_id_ptr; 115 __u32 count_fbs; 116 __u32 count_crtcs; 117 __u32 count_connectors; 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 __u32 count_encoders; 120 __u32 min_width; 121 __u32 max_width; 122 __u32 min_height; 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 __u32 max_height; 125}; 126struct drm_mode_crtc { 127 __u64 set_connectors_ptr; 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 __u32 count_connectors; 130 __u32 crtc_id; 131 __u32 fb_id; 132 __u32 x; 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 __u32 y; 135 __u32 gamma_size; 136 __u32 mode_valid; 137 struct drm_mode_modeinfo mode; 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139}; 140#define DRM_MODE_PRESENT_TOP_FIELD (1 << 0) 141#define DRM_MODE_PRESENT_BOTTOM_FIELD (1 << 1) 142struct drm_mode_set_plane { 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 __u32 plane_id; 145 __u32 crtc_id; 146 __u32 fb_id; 147 __u32 flags; 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 __s32 crtc_x; 150 __s32 crtc_y; 151 __u32 crtc_w; 152 __u32 crtc_h; 153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 __u32 src_x; 155 __u32 src_y; 156 __u32 src_h; 157 __u32 src_w; 158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159}; 160struct drm_mode_get_plane { 161 __u32 plane_id; 162 __u32 crtc_id; 163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 __u32 fb_id; 165 __u32 possible_crtcs; 166 __u32 gamma_size; 167 __u32 count_format_types; 168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 __u64 format_type_ptr; 170}; 171struct drm_mode_get_plane_res { 172 __u64 plane_id_ptr; 173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 __u32 count_planes; 175}; 176#define DRM_MODE_ENCODER_NONE 0 177#define DRM_MODE_ENCODER_DAC 1 178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179#define DRM_MODE_ENCODER_TMDS 2 180#define DRM_MODE_ENCODER_LVDS 3 181#define DRM_MODE_ENCODER_TVDAC 4 182#define DRM_MODE_ENCODER_VIRTUAL 5 183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184#define DRM_MODE_ENCODER_DSI 6 185#define DRM_MODE_ENCODER_DPMST 7 186struct drm_mode_get_encoder { 187 __u32 encoder_id; 188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 __u32 encoder_type; 190 __u32 crtc_id; 191 __u32 possible_crtcs; 192 __u32 possible_clones; 193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194}; 195#define DRM_MODE_SUBCONNECTOR_Automatic 0 196#define DRM_MODE_SUBCONNECTOR_Unknown 0 197#define DRM_MODE_SUBCONNECTOR_DVID 3 198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199#define DRM_MODE_SUBCONNECTOR_DVIA 4 200#define DRM_MODE_SUBCONNECTOR_Composite 5 201#define DRM_MODE_SUBCONNECTOR_SVIDEO 6 202#define DRM_MODE_SUBCONNECTOR_Component 8 203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204#define DRM_MODE_SUBCONNECTOR_SCART 9 205#define DRM_MODE_CONNECTOR_Unknown 0 206#define DRM_MODE_CONNECTOR_VGA 1 207#define DRM_MODE_CONNECTOR_DVII 2 208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209#define DRM_MODE_CONNECTOR_DVID 3 210#define DRM_MODE_CONNECTOR_DVIA 4 211#define DRM_MODE_CONNECTOR_Composite 5 212#define DRM_MODE_CONNECTOR_SVIDEO 6 213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214#define DRM_MODE_CONNECTOR_LVDS 7 215#define DRM_MODE_CONNECTOR_Component 8 216#define DRM_MODE_CONNECTOR_9PinDIN 9 217#define DRM_MODE_CONNECTOR_DisplayPort 10 218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219#define DRM_MODE_CONNECTOR_HDMIA 11 220#define DRM_MODE_CONNECTOR_HDMIB 12 221#define DRM_MODE_CONNECTOR_TV 13 222#define DRM_MODE_CONNECTOR_eDP 14 223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224#define DRM_MODE_CONNECTOR_VIRTUAL 15 225#define DRM_MODE_CONNECTOR_DSI 16 226struct drm_mode_get_connector { 227 __u64 encoders_ptr; 228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 __u64 modes_ptr; 230 __u64 props_ptr; 231 __u64 prop_values_ptr; 232 __u32 count_modes; 233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 __u32 count_props; 235 __u32 count_encoders; 236 __u32 encoder_id; 237 __u32 connector_id; 238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 __u32 connector_type; 240 __u32 connector_type_id; 241 __u32 connection; 242 __u32 mm_width; 243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 __u32 mm_height; 245 __u32 subpixel; 246 __u32 pad; 247}; 248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249#define DRM_MODE_PROP_PENDING (1 << 0) 250#define DRM_MODE_PROP_RANGE (1 << 1) 251#define DRM_MODE_PROP_IMMUTABLE (1 << 2) 252#define DRM_MODE_PROP_ENUM (1 << 3) 253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254#define DRM_MODE_PROP_BLOB (1 << 4) 255#define DRM_MODE_PROP_BITMASK (1 << 5) 256#define DRM_MODE_PROP_LEGACY_TYPE (DRM_MODE_PROP_RANGE | DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BLOB | DRM_MODE_PROP_BITMASK) 257#define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259#define DRM_MODE_PROP_TYPE(n) ((n) << 6) 260#define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 261#define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 262#define DRM_MODE_PROP_ATOMIC 0x80000000 263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264struct drm_mode_property_enum { 265 __u64 value; 266 char name[DRM_PROP_NAME_LEN]; 267}; 268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269struct drm_mode_get_property { 270 __u64 values_ptr; 271 __u64 enum_blob_ptr; 272 __u32 prop_id; 273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 __u32 flags; 275 char name[DRM_PROP_NAME_LEN]; 276 __u32 count_values; 277 __u32 count_enum_blobs; 278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279}; 280struct drm_mode_connector_set_property { 281 __u64 value; 282 __u32 prop_id; 283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 __u32 connector_id; 285}; 286struct drm_mode_obj_get_properties { 287 __u64 props_ptr; 288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 __u64 prop_values_ptr; 290 __u32 count_props; 291 __u32 obj_id; 292 __u32 obj_type; 293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294}; 295struct drm_mode_obj_set_property { 296 __u64 value; 297 __u32 prop_id; 298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 __u32 obj_id; 300 __u32 obj_type; 301}; 302struct drm_mode_get_blob { 303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 __u32 blob_id; 305 __u32 length; 306 __u64 data; 307}; 308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309struct drm_mode_fb_cmd { 310 __u32 fb_id; 311 __u32 width; 312 __u32 height; 313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 __u32 pitch; 315 __u32 bpp; 316 __u32 depth; 317 __u32 handle; 318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319}; 320#define DRM_MODE_FB_INTERLACED (1 << 0) 321#define DRM_MODE_FB_MODIFIERS (1 << 1) 322struct drm_mode_fb_cmd2 { 323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 __u32 fb_id; 325 __u32 width; 326 __u32 height; 327 __u32 pixel_format; 328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 __u32 flags; 330 __u32 handles[4]; 331 __u32 pitches[4]; 332 __u32 offsets[4]; 333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 __u64 modifier[4]; 335}; 336#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 337#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339#define DRM_MODE_FB_DIRTY_FLAGS 0x03 340#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 341struct drm_mode_fb_dirty_cmd { 342 __u32 fb_id; 343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 __u32 flags; 345 __u32 color; 346 __u32 num_clips; 347 __u64 clips_ptr; 348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349}; 350struct drm_mode_mode_cmd { 351 __u32 connector_id; 352 struct drm_mode_modeinfo mode; 353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354}; 355#define DRM_MODE_CURSOR_BO 0x01 356#define DRM_MODE_CURSOR_MOVE 0x02 357#define DRM_MODE_CURSOR_FLAGS 0x03 358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359struct drm_mode_cursor { 360 __u32 flags; 361 __u32 crtc_id; 362 __s32 x; 363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 __s32 y; 365 __u32 width; 366 __u32 height; 367 __u32 handle; 368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369}; 370struct drm_mode_cursor2 { 371 __u32 flags; 372 __u32 crtc_id; 373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 __s32 x; 375 __s32 y; 376 __u32 width; 377 __u32 height; 378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379 __u32 handle; 380 __s32 hot_x; 381 __s32 hot_y; 382}; 383/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384struct drm_mode_crtc_lut { 385 __u32 crtc_id; 386 __u32 gamma_size; 387 __u64 red; 388/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 __u64 green; 390 __u64 blue; 391}; 392#define DRM_MODE_PAGE_FLIP_EVENT 0x01 393/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394#define DRM_MODE_PAGE_FLIP_ASYNC 0x02 395#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC) 396struct drm_mode_crtc_page_flip { 397 __u32 crtc_id; 398/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399 __u32 fb_id; 400 __u32 flags; 401 __u32 reserved; 402 __u64 user_data; 403/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404}; 405struct drm_mode_create_dumb { 406 uint32_t height; 407 uint32_t width; 408/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 409 uint32_t bpp; 410 uint32_t flags; 411 uint32_t handle; 412 uint32_t pitch; 413/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 414 uint64_t size; 415}; 416struct drm_mode_map_dumb { 417 __u32 handle; 418/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 419 __u32 pad; 420 __u64 offset; 421}; 422struct drm_mode_destroy_dumb { 423/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 424 uint32_t handle; 425}; 426#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 427#define DRM_MODE_ATOMIC_NONBLOCK 0x0200 428/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 429#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 430#define DRM_MODE_ATOMIC_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_NONBLOCK | DRM_MODE_ATOMIC_ALLOW_MODESET) 431struct drm_mode_atomic { 432 __u32 flags; 433/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 434 __u32 count_objs; 435 __u64 objs_ptr; 436 __u64 count_props_ptr; 437 __u64 props_ptr; 438/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 439 __u64 prop_values_ptr; 440 __u64 reserved; 441 __u64 user_data; 442}; 443/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 444struct drm_mode_create_blob { 445 __u64 data; 446 __u32 length; 447 __u32 blob_id; 448/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 449}; 450struct drm_mode_destroy_blob { 451 __u32 blob_id; 452}; 453/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 454#endif 455