1//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
16#define LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
17
18#include "AMDGPUFrameLowering.h"
19#include "AMDGPUInstrInfo.h"
20#include "AMDGPUIntrinsicInfo.h"
21#include "AMDGPUSubtarget.h"
22#include "R600ISelLowering.h"
23#include "llvm/IR/DataLayout.h"
24
25namespace llvm {
26
27//===----------------------------------------------------------------------===//
28// AMDGPU Target Machine (R600+)
29//===----------------------------------------------------------------------===//
30
31class AMDGPUTargetMachine : public LLVMTargetMachine {
32private:
33
34protected:
35  std::unique_ptr<TargetLoweringObjectFile> TLOF;
36  AMDGPUSubtarget Subtarget;
37  AMDGPUIntrinsicInfo IntrinsicInfo;
38
39public:
40  AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef FS,
41                      StringRef CPU, TargetOptions Options, Reloc::Model RM,
42                      CodeModel::Model CM, CodeGenOpt::Level OL);
43  ~AMDGPUTargetMachine();
44
45  const AMDGPUSubtarget *getSubtargetImpl() const { return &Subtarget; }
46  const AMDGPUSubtarget *getSubtargetImpl(const Function &) const override {
47    return &Subtarget;
48  }
49  const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
50    return &IntrinsicInfo;
51  }
52  TargetIRAnalysis getTargetIRAnalysis() override;
53
54  TargetLoweringObjectFile *getObjFileLowering() const override {
55    return TLOF.get();
56  }
57};
58
59//===----------------------------------------------------------------------===//
60// R600 Target Machine (R600 -> Cayman)
61//===----------------------------------------------------------------------===//
62
63class R600TargetMachine : public AMDGPUTargetMachine {
64
65public:
66  R600TargetMachine(const Target &T, const Triple &TT, StringRef FS,
67                    StringRef CPU, TargetOptions Options, Reloc::Model RM,
68                    CodeModel::Model CM, CodeGenOpt::Level OL);
69
70  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
71};
72
73//===----------------------------------------------------------------------===//
74// GCN Target Machine (SI+)
75//===----------------------------------------------------------------------===//
76
77class GCNTargetMachine : public AMDGPUTargetMachine {
78
79public:
80  GCNTargetMachine(const Target &T, const Triple &TT, StringRef FS,
81                   StringRef CPU, TargetOptions Options, Reloc::Model RM,
82                   CodeModel::Model CM, CodeGenOpt::Level OL);
83
84  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
85};
86
87} // End namespace llvm
88
89#endif
90