1//===-- ARMSelectionDAGInfo.h - ARM SelectionDAG Info -----------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the ARM subclass for TargetSelectionDAGInfo.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
15#define LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
16
17#include "MCTargetDesc/ARMAddressingModes.h"
18#include "llvm/Target/TargetSelectionDAGInfo.h"
19
20namespace llvm {
21
22namespace ARM_AM {
23  static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
24    switch (Opcode) {
25    default:          return ARM_AM::no_shift;
26    case ISD::SHL:    return ARM_AM::lsl;
27    case ISD::SRL:    return ARM_AM::lsr;
28    case ISD::SRA:    return ARM_AM::asr;
29    case ISD::ROTR:   return ARM_AM::ror;
30    //case ISD::ROTL:  // Only if imm -> turn into ROTR.
31    // Can't handle RRX here, because it would require folding a flag into
32    // the addressing mode.  :(  This causes us to miss certain things.
33    //case ARMISD::RRX: return ARM_AM::rrx;
34    }
35  }
36}  // end namespace ARM_AM
37
38class ARMSelectionDAGInfo : public TargetSelectionDAGInfo {
39public:
40
41  SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
42                                  SDValue Chain,
43                                  SDValue Dst, SDValue Src,
44                                  SDValue Size, unsigned Align,
45                                  bool isVolatile, bool AlwaysInline,
46                                  MachinePointerInfo DstPtrInfo,
47                                  MachinePointerInfo SrcPtrInfo) const override;
48
49  SDValue EmitTargetCodeForMemmove(SelectionDAG &DAG, SDLoc dl,
50                                   SDValue Chain,
51                                   SDValue Dst, SDValue Src,
52                                   SDValue Size, unsigned Align, bool isVolatile,
53                                   MachinePointerInfo DstPtrInfo,
54                                   MachinePointerInfo SrcPtrInfo) const override;
55
56  // Adjust parameters for memset, see RTABI section 4.3.4
57  SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
58                                  SDValue Chain,
59                                  SDValue Op1, SDValue Op2,
60                                  SDValue Op3, unsigned Align,
61                                  bool isVolatile,
62                                  MachinePointerInfo DstPtrInfo) const override;
63
64  SDValue EmitSpecializedLibcall(SelectionDAG &DAG, SDLoc dl,
65                                 SDValue Chain,
66                                 SDValue Dst, SDValue Src,
67                                 SDValue Size, unsigned Align,
68                                 RTLIB::Libcall LC) const;
69};
70
71}
72
73#endif
74