| 8c01f5c596f383c072f523ba3ad0f36ec0a82892 |
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27-Apr-2016 |
Junmo Park <junmoz.park@samsung.com> |
ART: add exynos-m1 to a53 #835769 & #843419 erratum exception list
Exynos-M1 is custom-designed 64-bit ARM CPU and does not need this A53
erratum handling.
Bug: 28412250
Signed-off-by: Junmo Park <junmoz.park@samsung.com>
(cherry picked from commit 2bd7d2d6d92daa796ee33e70bb788d3dae1f2fc9)
Change-Id: Id460e4e98baafeed1cf3540cec754b30044cda11
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| 74974aba253bfee0a75c85166317a6a4e0da2eb1 |
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12-Nov-2015 |
Ajay Dudani <adudani@codeaurora.org> |
ART: add kryo to a53 #835769 & #843419 erratum exception list
Kryo is custom-designed 64-bit ARM CPU and does not need this A53
erratum handling.
https://www.qualcomm.com/news/snapdragon/2015/09/02/snapdragon-820-and-kryo-cpu-heterogeneous-computing-and-role-custom
Change-Id: Id8f6c616ab2ed19056fd1e3829b85b94a6e6eb84
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| 00fd8c2cd76836185fc14bd12385f41d0cbb9400 |
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12-Jun-2015 |
Tim Murray <timmurray@google.com> |
Add cortex-a53 as a valid instruction set variant for arm64.
Change-Id: I720e2cc4acd94e367dae4a21c13aa90a3e30b7cc
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| ca71458862be8505330b7fd5649a062f31d143dc |
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04-Apr-2015 |
Andreas Gampe <agampe@google.com> |
ART: Add Clang's -Wused-but-marked-unused
Add detection of wrong unused annotations. Fix our codebase.
Change-Id: I85cc20f2eac71c1ec6c5c7cd6efb08454a629634
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| 20f85597828194c12be10d3a927999def066555e |
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19-Mar-2015 |
Vladimir Marko <vmarko@google.com> |
Fixed layout for dex caches in boot image.
Define a fixed layout for dex cache arrays (type, method,
string and field arrays) for dex caches in the boot image.
This gives those arrays fixed offsets from the boot image
code and allows PC-relative addressing of their elements.
Use the PC-relative load on arm64 for relevant instructions,
i.e. invoke-static, invoke-direct, const-string,
const-class, check-cast and instance-of. This reduces the
arm64 boot.oat on Nexus 9 by 1.1MiB.
This CL provides the infrastructure and shows on the arm64
the gains that we can achieve by having fixed dex cache
arrays' layout. To fully use this for the boot images, we
need to implement the PC-relative addressing for other
architectures. To achieve similar gains for apps, we need
to move the dex cache arrays to a .bss section of the oat
file. These changes will be implemented in subsequent CLs.
(Also remove some compiler_driver.h dependencies to reduce
incremental build times.)
Change-Id: Ib1859fa4452d01d983fd92ae22b611f45a85d69b
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| 8366ca0d7ba3b80a2d5be65ba436446cc32440bd |
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17-Nov-2014 |
Elliott Hughes <enh@google.com> |
Fix the last users of TARGET_CPU_SMP.
Everyone else assumes SMP.
Change-Id: I7ff7faef46fbec6c67d6e446812d599e473cba39
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| d9df67041c54d6416cb53ca8822fe6aa552927e9 |
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18-Nov-2014 |
Ian Rogers <irogers@google.com> |
Add denver64 as a known ARM64 variant.
Other bits of instruction_set_features_test clean up.
Bug: 18385422
Change-Id: Ic48cfa0564b41ea140805a700de7c1e51addf49d
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| 72a122c33dadde5661a39aaa0a10bc1dbff16ce6 |
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14-Nov-2014 |
Andreas Gampe <agampe@google.com> |
ART: Fix last lpae occurrence, Arm64 generic
Fix the last occurrence of an lpae string in the default
instruction-set-feature strings (should be removed).
Allow "generic" Arm64 variant (same as "default").
Change-Id: I8bdd9fc7f596245e6541469664db01b3e781c51c
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| d582fa4ea62083a7598dded5b82dc2198b3daac7 |
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06-Nov-2014 |
Ian Rogers <irogers@google.com> |
Instruction set features for ARM64, MIPS and X86.
Also, refactor how feature strings are handled so they are additive or
subtractive.
Make MIPS have features for FPU 32-bit and MIPS v2. Use in the quick compiler
rather than #ifdefs that wouldn't have worked in cross-compilation.
Add SIMD features for x86/x86-64 proposed in:
https://android-review.googlesource.com/#/c/112370/
Bug: 18056890
Change-Id: Ic88ff84a714926bd277beb74a430c5c7d5ed7666
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