| 715d06b4498af3d4661e0090d606641d65040a08 |
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22-Jan-2016 |
Aart Bik <ajcbik@google.com> |
Fix cpu-info/cpp-defines mismatch.
Rationale:
__POPCNT__ is the right way to cpp-test for popcnt support
Change-Id: I3dac215f862701e04519e89ca97c159b1e4385c8
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| 3f67e692860d281858485d48a4f1f81b907f1444 |
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15-Jan-2016 |
Aart Bik <ajcbik@google.com> |
Implemented BitCount as an intrinsic. With unit test.
Rationale:
Recognizing this important operation as an intrinsic has
various advantages:
(1) having the no-side-effects/no-throw allows for
much more GVN/LICM/BCE.
(2) Some architectures, like x86_64, provide direct
support for this operation.
Performance improvements on X86_64:
CheckersEvalBench (32-bit bitboard): 27,210KNS -> 36,798KNS = + 35%
ReversiEvalBench (64-bit bitboard): 52,562KNS -> 89,086KNS = + 69%
Change-Id: I65d549b0469b7909b12c6611cdc34a8640a5751f
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| 17077d888a6752a2e5f8161eee1b2c3285783d12 |
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16-Dec-2015 |
Mark P Mendell <mark.p.mendell@intel.com> |
Revert "Revert "X86: Use locked add rather than mfence""
This reverts commit 0da3b9117706760e8722029f407da6d0297cc943.
Fix a compilation failure that slipped in somehow.
Change-Id: Ide8681cdc921febb296ea47aa282cc195f154049
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| 0da3b9117706760e8722029f407da6d0297cc943 |
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16-Dec-2015 |
Aart Bik <ajcbik@google.com> |
Revert "X86: Use locked add rather than mfence"
This reverts commit 7b3e4f99b25c31048a33a08688557b133ad345ab.
Reason: build error on sdk (linux) in git_mirror-aosp-master-with-vendor , please fix first
art/compiler/optimizing/code_generator_x86_64.cc:4032:7: error: use of
undeclared identifier 'codegen_'
codegen_->MemoryFence();
Change-Id: I91f8542cfd944b7425d1981c35872dcdcb901e18
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| 7b3e4f99b25c31048a33a08688557b133ad345ab |
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19-Nov-2015 |
Mark Mendell <mark.p.mendell@intel.com> |
X86: Use locked add rather than mfence
Java semantics for memory ordering can be satisfied using
lock addl $0,0(SP)
rather than mfence. The locked add synchronizes the memory caches, but
doesn't affect device memory.
Timing on a micro benchmark with a mfence or lock add $0,0(sp) in a loop
with 600000000 iterations:
time ./mfence
real 0m5.411s
user 0m5.408s
sys 0m0.000s
time ./locked_add
real 0m3.552s
user 0m3.550s
sys 0m0.000s
Implement this as an instruction-set-feature lock_add. This is off by
default (uses mfence), and enabled for atom & silvermont variants.
Generation of mfence can be forced by a parameter to MemoryFence.
Change-Id: I5cb4fded61f4cbbd7b7db42a1b6902e43e458911
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
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| d8750647949f0f24c28bd55781f72055b5486c43 |
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07-Apr-2015 |
Andreas Gampe <agampe@google.com> |
ART: Remove unused variables.
Curious that neither Clang nor GCC flagged those.
Change-Id: Ie1866d8171651c768e378d829a669cc57cab1f09
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| ca71458862be8505330b7fd5649a062f31d143dc |
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04-Apr-2015 |
Andreas Gampe <agampe@google.com> |
ART: Add Clang's -Wused-but-marked-unused
Add detection of wrong unused annotations. Fix our codebase.
Change-Id: I85cc20f2eac71c1ec6c5c7cd6efb08454a629634
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| 24a05f449a6b4b0e4944c2055f0c7490d6a09861 |
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03-Apr-2015 |
Andreas Gampe <agampe@google.com> |
ART: Add support for "silvermont" variant
The variant is already supported in the build system and wired up
for the Nexus Player (fugu). The values are copied from the build
system and correspond to documentation in, e.g.,
http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf
chapter 15, section 1.1.
Change-Id: I9facaa9d5b8bae3d98cf48f2969d02d11ebfe0e4
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| 8366ca0d7ba3b80a2d5be65ba436446cc32440bd |
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17-Nov-2014 |
Elliott Hughes <enh@google.com> |
Fix the last users of TARGET_CPU_SMP.
Everyone else assumes SMP.
Change-Id: I7ff7faef46fbec6c67d6e446812d599e473cba39
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| d582fa4ea62083a7598dded5b82dc2198b3daac7 |
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06-Nov-2014 |
Ian Rogers <irogers@google.com> |
Instruction set features for ARM64, MIPS and X86.
Also, refactor how feature strings are handled so they are additive or
subtractive.
Make MIPS have features for FPU 32-bit and MIPS v2. Use in the quick compiler
rather than #ifdefs that wouldn't have worked in cross-compilation.
Add SIMD features for x86/x86-64 proposed in:
https://android-review.googlesource.com/#/c/112370/
Bug: 18056890
Change-Id: Ic88ff84a714926bd277beb74a430c5c7d5ed7666
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