| cddc3e03e4ec99c0268c03a126195173e519ed58 |
|
04-Mar-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r256229
http://b/26987366
(cherry picked from commit f3ef5332fa3f4d5ec72c178a2b19dac363a19383)
Change-Id: Ic75dcb63191d65df1b69724576392c0aaeb47728
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 6948897e478cbd66626159776a8017b3c18579b9 |
|
01-Jul-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r239765
Bug: 20140355: This rebase pulls the upstream fix for the spurious
warnings mentioned in the bug.
Change-Id: I7fd24253c50f4d48d900875dcf43ce3f1721a3da
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 4c5e43da7792f75567b693105cc53e3f1992ad98 |
|
08-Apr-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master llvm for rebase to r233350
Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| ebe69fe11e48d322045d5949c83283927a0d790b |
|
23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 37ed9c199ca639565f6ce88105f9e39e898d82d0 |
|
01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| c6a4f5e819217e1e12c458aed8e7b122e23a3a58 |
|
21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749.
Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 95adf91f29980e374bf094e15bc3f2764ef9baf4 |
|
18-Nov-2013 |
Matheus Almeida <matheus.almeida@imgtec.com> |
[mips][msa] Fix immediate value of LSA instruction as it was being wrongly encoded.
The immediate field should be encoded as "imm - 1" as the CPU always adds one to that field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195004 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 5c042162beb3c2dd556e00aab84c4278a69cd5b1 |
|
04-Nov-2013 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Support for microMIPS branch instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193992 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 1aaf43c2a2ec0fd4c8dbfe56558237219c5f8af7 |
|
29-Oct-2013 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Support for microMIPS jump instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 0082717cb537e2d1424f755a49510fa9f9e67071 |
|
23-Oct-2013 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Support for microMIPS relocations 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193247 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 1abf0afdd4d8e9d58518a878f30b9eede81303cc |
|
07-Sep-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Add definition of instruction "drotr32" (double rotate right plus 32).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190232 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| b0bb2d6636ed7b1d089a37b3cf7913d06bb49f37 |
|
27-Aug-2013 |
Jack Carter <jack.carter@imgtec.com> |
Changed comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189396 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| da0860f78e6e43aca3333a7815b2f9bc0f8dfac0 |
|
13-Aug-2013 |
Jack Carter <jack.carter@imgtec.com> |
[Mips] Support for unaligned load/store microMips instructions
This includes instructions lwl, lwr, swl and swr.
Patch by Zoran Jovnovic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188312 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| d12fce1a27c30292dcd5f5bc10d4ba6e742888be |
|
09-Aug-2013 |
Jack Carter <jack.carter@imgtec.com> |
Mips ELF: MicroMips direct object Little endian support.
Test included.
Patch by Zoran Jovanovich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 99cb622041a0839c7dfcf0263c5102a305a0fdb5 |
|
18-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Use pointers to the MCAsmInfo and MCRegInfo.
Someone may want to do something crazy, like replace these objects if they
change or something.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184175 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 078bdc6cbb572fffc9e39fbaa8052794b93ecf48 |
|
28-May-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Make helper functions static.
And remove header and cpp file that are empty after that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| f530aff9de2738db0e3471b259ff0b577a6603e6 |
|
19-Apr-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] First patch which adds support for micromips.
This patch adds support for recoded (meaning assembly-language compatible to
standard mips32) arithmetic 32-bit instructions.
Patch by Zoran Jovanovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179873 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 8afc8b7e63d5ce2d027e92934d16b19e5ba2db59 |
|
17-Apr-2013 |
Jack Carter <jack.carter@imgtec.com> |
Mips assembler: Enable handling of nested expressions
This patch allows the Mips assembler to parse and emit nested
expressions as instruction operands. It also extends the
expansion of memory instructions when an offset is given as
an expression.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179657 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| d3107fbc54a5b5156f0aabc8788724f1469eb9df |
|
22-Mar-2013 |
Jack Carter <jack.carter@imgtec.com> |
Fix the invalid opcode for Mips branch instructions in the assembler
For mips a branch an 18-bit signed offset (the 16-bit
offset field shifted left 2 bits) is added to the
address of the instruction following the branch
(not the branch itself), in the branch delay slot,
to form a PC-relative effective target address.
Previously, the code generator did not perform the
shift of the immediate branch offset which resulted
in wrong instruction opcode. This patch fixes the issue.
Contributor: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 5f645953555cee528cd1c0d6faa16d9b89ebba48 |
|
20-Feb-2013 |
David Blaikie <dblaikie@gmail.com> |
Fix the (clang -Werror) build by removing an unused member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175607 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| ccb3c9c2702f548fd0a7d60a622e6f4fdf0940e7 |
|
19-Feb-2013 |
Jack Carter <jcarter@mips.com> |
ELF symbol table field st_other support,
excluding visibility bits.
Mips (MicroMips) specific STO handling .
The st_other field settig for STO_MIPS_MICROMIPS
Contributer: Zoran Jovanovic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175564 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 79cd4118090a3c0bc80cafc699a51abf1d6299f3 |
|
15-Feb-2013 |
Reed Kotler <rkotler@mips.com> |
Remove a final dependency on the form field in tablegen; which is a remnant
of the old jit and which we don't intend to support in mips16 or micromips.
This dependency is for the testing of whether an instruction is a pseudo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175297 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| e8068692f924a1577075bd2d7b72b44820e0ffb2 |
|
10-Dec-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Set HWEncoding field of registers. Use delete function
getMipsRegisterNumbering and use MCRegisterInfo::getEncodingValue instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169760 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 198ad916d736047f8a439f19dee25cee917df8a9 |
|
22-Nov-2012 |
Jack Carter <jcarter@mips.com> |
Mips direct object xgot support
This patch provides support for the MIPS relocations:
*) R_MIPS_GOT_HI16
*) R_MIPS_GOT_LO16
*) R_MIPS_CALL_HI16
*) R_MIPS_CALL_LO16
These are used for large GOT instruction sequences.
Contributer: Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 42faefc11da326f10a4a52d72953318921d9e43d |
|
03-Oct-2012 |
Jack Carter <jcarter@mips.com> |
This patch moves from using a hard coded number (4)
for the number of bytes in a particular instruction
to using
const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode());
Desc.getSize()
This is necessary with the advent of 16 bit instructions with
mips16 and micromips. It is also puts Mips in compliance with
the other targets for getting instruction size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165171 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 8e71e617c9b1e42737ffd00984a5025ec90c734c |
|
03-Oct-2012 |
Jack Carter <jcarter@mips.com> |
The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.
If the code is generated as assembler, this transformation does not occur assuming that it will occur later in the assembler.
This code was originally called from MipsAsmPrinter.cpp and we needed to check for OutStreamer.hasRawTextSupport(). This was not a good place for it and has been moved to MCTargetDesc/MipsMCCodeEmitter.cpp where both direct object and the assembler use it it automagically.
The test cases have been checked in for a number of weeks now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| dd100d831bb8062b64e7037d2bbc21bf20be4f45 |
|
15-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove unused private fields to silence -Wunused-private-field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163973 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| ad51a4a5984a365d671ddfe9eaa23d2e12ee4281 |
|
06-Sep-2012 |
Jack Carter <jcarter@mips.com> |
Mips specific llvm assembler support for branch and jump instructions.
Test case included.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163277 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| fc54d9e47a1276650f14f38e7d037c9b58c8dc2d |
|
06-Aug-2012 |
Jack Carter <jcarter@mips.com> |
Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST.
These 2 relocations gain access to the
highest and the second highest 16 bits
of a 64 bit object.
R_MIPS_HIGHER %higher(A+S)
The %higher(x) function is [ (((long long) x + 0x80008000LL) >> 32) & 0xffff ].
R_MIPS_HIGHEST %highest(A+S)
The %highest(x) function is [ (((long long) x + 0x800080008000LL) >> 48) & 0xffff ].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161348 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| fd506efec628819f7e6fad8016a9dbb5d8612b8b |
|
13-Jul-2012 |
Jack Carter <jcarter@mips.com> |
The Mips specific relocation R_MIPS_GOT_DISP
is used in cases where global symbols are
directly represented in the GOT and we use an
offset into the global offset table.
This patch adds direct object support for R_MIPS_GOT_DISP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160183 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 0140e55393c4403ab240c386501cdc5e438dcc0e |
|
28-Jun-2012 |
Jack Carter <jcarter@mips.com> |
This allows hello world to be compiled for Mips 64 direct object.
It takes advantage of r159299 which introduces relocation support for N64.
elf-dump needed to be upgraded to support N64 relocations as well.
This passes make check.
Jack
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159301 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 864f66085cd9543070ef01b9f7371c110ecd7898 |
|
14-Jun-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Fix coding style violations. Remove white spaces and tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 918f55fe239f00651e396be841f2b3b6e242f98d |
|
15-May-2012 |
Jim Grosbach <grosbach@apple.com> |
Allow MCCodeEmitter access to the target MCRegisterInfo.
Add the MCRegisterInfo to the factories and constructors.
Patch by Tom Stellard <Tom.Stellard@amd.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156828 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| eb23f9e92e607990ffe986735e10a8dec713909a |
|
22-Apr-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove some potential warnings about variables used uninitialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155307 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 59182f9425dba2d5e0035155bd2b0a04c6ababb3 |
|
27-Mar-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Retrieve and add the offset of a symbol in applyFixup rather than retrieve and
set it in MipsMCCodeEmitter::getMachineOpValue. Assert in getMachineOpValue if
MachineOperand MO is of an unexpected type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153494 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| fb54afbcb8f460c5c4cafa605259ba0dd77504dc |
|
21-Mar-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Incremental big endian patch by Jack Carter.
These changes allow us to compile big endian from the command line for 32 bit
Mips targets. This patch will result in code and data actually being produced
in the correct endianess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153153 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| e9e520f23ec3e5dc26e0801ac0d8b9e6899e2626 |
|
01-Mar-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Pass endian information to constructors. Define separate functions to create
objects for big endian and little endian targets.
Patch by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| c5707112e7635d1dd2f2cc9c4f42e79a51302cca |
|
17-Feb-2012 |
Jia Liu <proljc@gmail.com> |
remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150805 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 8f5e8c1cd69fa77bea20140a7132ee2dea166c6d |
|
17-Feb-2012 |
Jia Liu <proljc@gmail.com> |
add Emacs tag and fix some comment error in file headers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150775 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 4f8dc7b17accf4f2ec953b80b2cc79786207492e |
|
24-Jan-2012 |
Owen Anderson <resistor@mac.com> |
Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148833 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| 4d6ccb5f68cd7c6418a209f1fa4dbade569e4493 |
|
20-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
More dead code removal (using -Wunreachable-code)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| bc24985c5ff01fc25336896c388bd8e4e02ffd95 |
|
22-Dec-2011 |
Akira Hatanaka <ahatanaka@mips.com> |
Local dynamic TLS model for direct object output. Create the correct TLS MIPS
ELF relocations.
Patch by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147118 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| d1bcf0dbc18f39e51fd3b5bf3b90d737f9965739 |
|
07-Dec-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Variable cleanup. Based on past patch submittals variable names have
been normalized and more descriptive comments added. Patch by Reed
Kotler and Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146088 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
|
| e3d3572e282733bd7aa5ac14115ed0804174e426 |
|
07-Dec-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add a few moreLocal/Global R_MIPS_GOT related fixups and
make the addend fixup code a bit more generic
Patch by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145998 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
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| 421455f1ea081e2e1767e782ac0d57ca55976e9b |
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23-Nov-2011 |
Akira Hatanaka <ahatanaka@mips.com> |
This patch makes the following changes necessary for MIPS' direct code emission.
- lower unaligned loads/stores.
- encode the size operand of instructions INS and EXT.
- emit relocation information needed for JAL (jump-and-link).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
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| 47b92f3d8362518596d57269dc53d985bc13323a |
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11-Nov-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Mips MC object code emission improvements:
"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144414 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
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| 4520a10fdbaabf1c0cd98b43a61469c5f0e76f38 |
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30-Sep-2011 |
Akira Hatanaka <ahatanaka@mips.com> |
Initial implementation of MipsMCCodeEmitter.
Patch by Reed Kotler at Mips Technologies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
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