cddc3e03e4ec99c0268c03a126195173e519ed58 |
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04-Mar-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r256229 http://b/26987366 (cherry picked from commit f3ef5332fa3f4d5ec72c178a2b19dac363a19383) Change-Id: Ic75dcb63191d65df1b69724576392c0aaeb47728
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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ebe69fe11e48d322045d5949c83283927a0d790b |
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23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699. Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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37ed9c199ca639565f6ce88105f9e39e898d82d0 |
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01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494. Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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c6a4f5e819217e1e12c458aed8e7b122e23a3a58 |
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21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749. Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712). Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a. Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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7813a2fe9dff1d30efaaf84bec8eb02f8b78bd06 |
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01-Oct-2013 |
Preston Gurd <preston.gurd@intel.com> |
Forgot to add a break statement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191715 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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2967a804126c6081a18d8b75adf2d9fd5a3c096e |
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01-Oct-2013 |
Preston Gurd <preston.gurd@intel.com> |
The X86FixupLEAs pass for Intel Atom must not call convertToThreeAddress on ADD16rr opcodes, if src1 != src, since that would cause convertToThreeAddress to try to create a virtual register. This is not permitted after register allocation, which is when the X86FixupLEAs pass runs. This patch fixes PR16785. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191711 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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a5e5ba611f787f518fd3f7349343f8c4ae863fc2 |
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07-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't cache the instruction and register info from the TargetMachine, because the internals of TargetMachine could change. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183571 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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7f8300b8f3f35167ce78628bc14d50beec203b8f |
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25-Apr-2013 |
Preston Gurd <preston.gurd@intel.com> |
Make function documentation conform to llvm standards. Expunge all remaining traces and use of live variable information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180577 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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d6ac8e9a03d8fa7115079d86192bc4529e8281aa |
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25-Apr-2013 |
Preston Gurd <preston.gurd@intel.com> |
This patch adds the X86FixupLEAs pass, which will reduce instruction latency for certain models of the Intel Atom family, by converting instructions into their equivalent LEA instructions, when it is both useful and possible to do so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180573 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86FixupLEAs.cpp
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