| da676eab93e7dad30b574b4eb4cffd4df952e819 |
|
01-Aug-2012 |
Vincent Lejeune <vljn@ovi.com> |
r600g: Add support for predicates
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 94a6a363792e8cb57a9f15778a3f3440d5b754ab |
|
27-Feb-2012 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Add FC_NATIVE instruction
This is a pseudo instruction that enables the LLVM backend to encode
instructions and pass it through r600_bytecode_build()
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 330b6c85c961b32f704ce8ec7dbf8cb7fc0b80a8 |
|
05-Mar-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: cleanup includes
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| e4340c1908a6a3b09e1a15d5195f6da7d00494d0 |
|
29-Jan-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: merge r600_context with r600_pipe_context
The split made no sense.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 78293b99b23268e6698f1267aaf40647c17d95a5 |
|
29-Jan-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: remove u8,u16,u32,u64 types
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| d649bf51ec787021f7872e2a4c09fb2188c0891b |
|
20-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: improve kcache line sets handling v2
Add support for multiple kcache banks (constant buffers).
Lock the required lines only.
Allow up to 4 kcache line sets in the alu clause by using ALU_EXTENDED on eg+.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| c96b9834032952492efbd2d1f5511fe225704918 |
|
18-Jan-2012 |
Dave Airlie <airlied@redhat.com> |
r600g: fixup AR handling (v5)
So it appears R600s (except rv670) do AR handling different using a different
opcode. This patch fixes up r600g to work properly on r600.
This fixes ~100 piglit tests here (in GLSL1.30 mode) on rv610.
v3: add index_mode as per the docs.
This still fails any dst relative tests for some reason I can't quite see yet,
but it passes a lot more tests than without.
v4: add a nop after dst.rel this could be improved using a second pass,
where we only insert nops if two instructions are sure to collide.
The docs say r600, rv610, rv630 needs this, and not rv670, rs780, rs880,
need AMD to confirm rv620, rv635.
v5: add is_nop_inst.
NOTE: This is a candidate for stable branches.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 543b2331d7b45a29ccd3530daa2389e87e65d89b |
|
08-Nov-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: implement transform feedback
r600: DONE.
r700: MOSTLY (done but locks up).
Evergreen: MOSTLY (done but doesn't work for an unknown reason).
The kernel support will come soon.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 4f7c21899ad449be2bc1157ce1d2d99296a34499 |
|
14-Nov-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: fix the representation of control-flow instructions
We need something that looks like a compiler and not like some hacker
put some functions together. /rant
This is a band-aid for these two problems:
- The R600 and EG control-flow instructions appear in switch statements
next to each other, causing conflicts when adding new instructions.
- The ALU control-flow instructions are bitshifted by 3 (from CF_INST 26:29
to CF_INST 23:29, as is defined by r600 ISA) even for EG, where CF_INST
is 22:29.
To fix this mess, the 'inst' field is bitshifted to the left either by 22, 23,
or 26 (directly in the definitions), such that it can be just or'd when making
bytecode without any shifting. All switch statements have been divided into
two, one for R600 and the other for EG.
Of course, there is a better way to do this, but that is left for future
work.
Tested on RV730 and REDWOOD with no regressions.
v2: minor cleanup as per Alex's comment.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 8e366dc365d01213b71b87ace47d30938db74845 |
|
13-Nov-2011 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: lazy load for AR register
Emit MOVA* instruction only when AR is used.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 4a47662beaa2092447939db7880531fb706afedd |
|
16-Aug-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: rename bc -> bytecode
It took me a while to figure out what it stands for.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 354f76f386afd980e8c1564c0b0502f9768007b5 |
|
22-Jul-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: cleanup includes in winsys
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 2b5b289a570c699403f115cf3ad094ce92eba2fb |
|
09-Jul-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Store the chip class directly in r600_bc.
Instead of deriving it from the family again.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 89dc31a28d8e5607989ec11cfd29310c1c97f6ac |
|
09-Jul-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Replace the CHIPREV_* defines with the chip_class enum.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 7779f6d1dffde2c0501e44adc342e52803de08d4 |
|
09-Mar-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial cayman acceleration support.
Cayman is the RadeonHD 69xx series of GPUs. This adds support for
3D acceleration to the r600g driver.
Major changes:
Some context registers moved around - mainly MSAA and clipping/guardband related.
GPR allocation is all dynamic
no vertex cache - all unified in texture cache.
5-wide to 4-wide shader engines (no scalar or trans slot)
- some changes to how instructions are placed into slots
- removal of END_OF_PROGRAM bit in favour of END flow control clause
- no vertex fetch clause - TC accepts vertex or texture
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 843dfe3206c4f397c7911b748373dde5540392a4 |
|
19-Apr-2011 |
Cédric Cano <ccano@interfaceconcept.com> |
r600g: add big endian support for r6xx/r7xx
Signed-off-by: Cedric Cano <ccano@interfaceconcept.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| a2ef38368b638caba26418a68c157d52b6bcf797 |
|
14-Mar-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Move fetch shader register setup to r600_state.c / evergreen_state.c.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 8dc1dfc9f0b1c98d3bcad63c4a70a0952b865a9e |
|
09-Mar-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: split R600 and R700 CF generation for VTX and TEX
Reviewed-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 96bbc627f369c0100b950f81531b1fe9ef586c34 |
|
28-Feb-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: implement instanced drawing support
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| a77e813de32643ae2dfffd7ad12abed596172cab |
|
07-Feb-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Split r600_bc_alu_src.
The r600_bc_alu_src structure is used in two different ways, as a vector and
for the individual channels of that same vector. This is somewhat fragile,
and probably confusing.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 3b1c1f02537544a11772b94a8f2e8c3d4c886ca8 |
|
07-Feb-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Store literal values in the r600_bc_alu_src structure.
This is much easier to work with, and allows use to get rid of some of the
literal handling hacks.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| a6a710cbe7425819e1cd5ad5f2085311c092f2e7 |
|
03-Feb-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Make some more things static.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| d06b99009699f8bc1d7a1d711bee8edc92dfb1a9 |
|
03-Feb-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Get rid of the unused r600_cf_vtx_tc() function.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 8ca3b140eb53fd8063337a5a2a54a35987d597bc |
|
02-Feb-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: use burst exports in shaders
Join multiple exports into just one instruction
instead of exporting each register separately.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 96f8f8db7bcddec7ef0fce62cf0e23f1c2fb8c8d |
|
22-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: rework literal handling
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| d7342f6a81a0d13acb6486a24bffa8e5987d5410 |
|
20-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: merge alu groups
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| eea1d8199b376f37027c14669e0bdf991a22872d |
|
18-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: implement replacing gpr with pv and ps
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| a25b91c2c2118741389f418a66de7ca145b8600b |
|
18-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: rework bank swizzle code
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| c60cb25bfb15fc83e78d9f2c74646dcc5ad07792 |
|
16-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: implement output modifiers and use them to further optimize LRP
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 8273921b7a41251f3f5a87df995913cb291902ca |
|
07-Jan-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Store kcache settings as an array.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| fa86fc564aea4e40c89f6fc889e6a5bf817634b3 |
|
04-Dec-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: build fetch shader from vertex elements
Vertex elements change are less frequent than draw call, those to
avoid rebuilding fetch shader to often build the fetch shader along
vertex elements. This also allow to move vertex buffer setup out
of draw path and make update to it less frequent.
Shader update can still be improved to only update SPI regs (based
on some rasterizer state like flat shading or point sprite ...).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 833f3a488a7ba0fa59e25f1e518f6b4616270143 |
|
03-Dec-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: dump raw shader output for debugging
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| f609b2ab0342d77a8beca9efb5fbc5b66ff98295 |
|
18-Nov-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: add fetch shader capabilities
Use fetch shader instead of having fetch instruction in the vertex
shader. Allow to restrict shader update to a smaller part when
vertex buffer input layout changes.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 7ffd4e976fd11b8c083c2927effd25a2f79ac841 |
|
17-Nov-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: code cleanup (indent, trailing space, empty line ...)
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| d1acb920163ab0f39ff2fc72b85fc7bf16c37262 |
|
25-Oct-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add assembler support for all the kcache fields.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| f4a2c62af56ce10e43688e8283f8defeb05cef1a |
|
23-Oct-2010 |
Tilman Sauerbeck <tilman@code-monkey.de> |
r600g: Also clear bc data when we're destroying a shader.
[airlied: remove unused vars]
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| d2c06b5037fe9282cbbc0c7acd84a1b286716507 |
|
05-Oct-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: drop use_mem_constant.
since we plan on using dx10 constant buffers everywhere.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 29b491bd033dd97e5afa3ca0058c50f28c01f39d |
|
01-Oct-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: indentation fixes
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| e973221538d5edfad62abedf5b37a4fb774d71fc |
|
01-Oct-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add assembler support for other vtx fetch fields.
this shouldn't change behaviour, just push the choice of what
to do out to the shader.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 6abd7771c6ab2c733b20835e211060dd18fd847d |
|
29-Sep-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: more cleanup
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| c5edfcc410bdf3dbe4f37418de8f0009746c9578 |
|
19-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g; add uses waterfall to asm cf for r6xx.
On r6xx if an MOVA instruction is emitted we should set this bit.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| e0b6df4fcce0964ea7930efeb40cb487b4c53337 |
|
15-Sep-2010 |
John Doe <glisse@localhost.localdomain> |
r600g: misc cleanup
Avoid using r600_screen structure to get ptr to radeon
winsys structure.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 50526e094f4c66957c7f74c190c35903bc82fb62 |
|
03-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial evergreen support
adds shader opcodes + assembler support (except ARL)
uses constant buffers
add interp instructions in fragment shader
adds all evergreen hw states
adds evergreen pm4 support.
this runs gears for me on my evergreen
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| bf346f065c65e15e5757d5b1a14dbc6638051860 |
|
08-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial bank swizzle support.
this is ported from r600c mostly, bank swizzling is real messy and I don't think
I got enough sleep last night to fully understand it.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| d42efb9e8df6ef872ab4f142e3daf1b6cb9eff11 |
|
08-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add support for constants in memory buffers.
DX9 constants were in the constant file, and evergreen no longer support
cfile. r600/700 can also use constants in memory buffers, so add the code
(disabled for now) to enable that as precursor for evergreen.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 47d5a19df1e7760c4f5f0e340bfc56355c2e428b |
|
30-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial relative support to assembler
passes another ~20 piglits.
/me starts to run out low hanging fruit around now.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 09547e1bcee7df3444dd8682770d1b31da1a5822 |
|
27-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
r600g : add basic loop support.
Adds BGNLOOP, BRK, CONT, ENDLOOP support, ported from r600c.
17 piglits more on r300g.tests.
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| a03d456f5a41926e39194de70b2d50776e64b8a2 |
|
25-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial if/else/endif support
this adds handling for some more CF instructions and conditions
also adds parameter for stack size emission
These seem to pass on VS with the stack size hack but not on FS,
TODO: fix FS + stack size calcs
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 098064e8cb6950f60c51a44e280cb335f07920b1 |
|
19-Aug-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add a chiprev type for r600/r700/evergreen instead of using family
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 72f8edfc0bb8613ac7c0decfd4199e83c8d8a737 |
|
10-Aug-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: avoid reemiting literal, avoid scheduling empty cs
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 7e42b7e5d2aebcda0e6bf081b6661411731e6df2 |
|
03-Aug-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: fix LIT + fix multiple constant one ALU + fix ALU block splitting
Make sure LIT fills all slot for instruction (can't do W instruction
without having the Z slot filled with at least a NOP).
ALU instruction can't access more than 4 constant, move constant to
temporary reg if we reach the limit.
Fix ALU block splitting, only split ALU after ALU with last instruction
bit sets.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| 33241134e6e3d5bf19141eceff90fd854b23386a |
|
24-Jul-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: first pass at texture support
This add texture support to the assembler, generated code is
wrong (tested against working dump).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|
| de553d906b4a205d811a9e1651f14212ec284e29 |
|
23-Jul-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: drop compiler stuff and switch over dumb tgsi assembler
Writing a compiler is time consuming and error prone in
order to allow r600g to further progress in the meantime
i wrote a simple tgsi assembler, it does stupid thing but
i would rather keep the code simple than having people
trying to optimize code it does.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/r600_asm.h
|