| 87cdefed405da1a57a006737297d20ba0c25fa1b |
|
26-Aug-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Double the size of the state cache.
We probably want to do something more sophisticated here, but this at
least makes it through L4D2 without dumping the program cache.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 97a5f0ff2eb3a6e8b303ce402a4e1d9be7e7b323 |
|
12-Jul-2012 |
Eric Anholt <eric@anholt.net> |
i965: Add performance debug for when the state cache gets nuked.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| cbd464a117317f276b65cbca69d6339166581bf7 |
|
12-Jan-2012 |
Eric Anholt <eric@anholt.net> |
i965: Fix leak of the program cache BO on context destroy.
NOTE: This is a candidate for the 8.0 branch.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 18d4a44bdc2ed91ec9511d816acddc4a0bd7f9be |
|
26-Feb-2011 |
Eric Anholt <eric@anholt.net> |
i965: Reuse existing program data when a new compiled program matches.
It's common in applications just before the advent of
EXT_separate_shader_objects to have multiple linked shaders with the
same VS or FS. While we aren't detecting those at the Mesa level, we
can detect when our compiled output happens to match an existing
compiled program.
This patch was created after noting the incredible amount of compiled
program data generated by Heroes of Newerth. It reduces the program
data in use at the start menu (replayed by apitrace) from 828kb to
632kb, and reduces CACHE_NEW_WM_PROG state flagging by 3/4. It
doesn't impact our rate of hardware state changes yet, because things
depending on CACHE_NEW_WM_PROG also depend on BRW_NEW_FRAGMENT_PROGRAM
which is still being flagged.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| c173541d9769d41a85cc899bc49699a3587df4bf |
|
27-Apr-2011 |
Eric Anholt <eric@anholt.net> |
i965: Use state streaming on programs, and state base address on gen5+.
There will be a little bit of thrashing of the program cache BO as the
cache warms up, but once the application is in steady state, this
reduces relocations on gen5 and later.
On my T420 laptop, cairogl firefox-talos-gfx performance improves 2.6%
+/- 1.3% (n=6). No statistically significant performance difference
on nexuiz (n=5).
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 3032582d032a28381dd4c2f4093d82c79e73129e |
|
25-Apr-2011 |
Eric Anholt <eric@anholt.net> |
i965: Remove dead entrypoints to state cache, rename the one that's left.
As we expanded the usage of the state cache, it grew extra
functionality. However, with the recent state streaming rework, we're
back to the state cache being used only for shader kernels, which is
the piece of GPU state that's actually expensive to compute again from
scratch, since it involves compiling.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| d6ba7b16039b3cf03903888df23732cbb358e810 |
|
25-Apr-2011 |
Eric Anholt <eric@anholt.net> |
i965: Drop the now unused brw_cache_data() function.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 5c742ea1ee0cea031cb99651155d0c7521f42b4e |
|
23-Apr-2011 |
Eric Anholt <eric@anholt.net> |
i965: Move sampler state to state streaming.
Overall, across this series since the last set of numbers, gen6 3DMMES
taiji performance has dropped 0.8% +/- 0.3% (n=15), probably due to
the increased reissuing of state from some of the state objects that
otherwise never changed, and increased occurrence of the per-batch
overhead as we've increased how much we put in the batch BO without
increasing the batch BO's size.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 95cdce7f703ff24ee39ec9a341141622842d61b9 |
|
20-Jan-2011 |
Eric Anholt <eric@anholt.net> |
i965: Drop the INTEL_DEBUG=state spam about the cache size check.
There's way more interesting info in INTEL_DEBUG=state if you could find
it among the state size checks.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| eccffe2328aff8c81b82287cf9567a2a67ff09c6 |
|
23-Dec-2010 |
Vinson Lee <vlee@vmware.com> |
i965: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| bb1540835056cdea5db6f55b19c0c87358f14cd1 |
|
03-Nov-2010 |
Eric Anholt <eric@anholt.net> |
intel: Annotate debug printout checks with unlikely().
This provides the optimizer with hints about code hotness, which we're
quite certain about for debug printouts (or, rather, while we
developers often hit the checks for debug printouts, we don't care
about performance while doing so).
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 8ad3fdc9678866b40f3d9faaaf7c6333d388907f |
|
10-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: GC the last two arguments to brw_cache_data.
Now that the binding table is streamed indirect state, they were
always NULL/0.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 309c011641c6189dc74bc2f78ba6d6602d8c96b7 |
|
08-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Remove brw_state_cache_bo_delete now that it's unused again.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 178414eba402f9087ea505e7ef19f1becdd7a36d |
|
11-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Remove caching of surface state objects.
It turns out that computing a 56 byte key to look up a 20-byte object
out of a hash table was some sort of a bad idea. Whoops.
before:
[ # ] backend test min(s) median(s) stddev. count
[ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6
after:
[ 0] gl firefox-talos-gfx 34.761 34.784 0.17% 5/6
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 73de09f265cb1c66d70fd9eb92021882bfbbbef6 |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Convert the binding table to streamed indirect state.
This slightly reduces reduces cairo-gl firefox-talos-gfx runtime on my
Ironlake:
before:
[ # ] backend test min(s) median(s) stddev. count
[ 0] gl firefox-talos-gfx 38.236 38.383 0.43% 5/6
after:
[ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6
It turns out the cost of caching these objects and looking them up in
the cache again is greater than the cost of just computing the object
again, particularly when the overhead of having a separate BO to pin
is removed.
(Those that are paying close attention will note that this is a
reversal of the path I was moving the driver in a couple of years ago.
The major thing that has changed is that back then all state was
recomputed when we wrapped the streaming state buffer, including
recompiling our precious programs. Now, we're uncaching just the
objects that are cheap to compute, and retaining caching of expensive
objects)
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 315ef0312a222b300ea7d619b95cb80596d3bee2 |
|
10-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Update old comment about state cache sizing.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 503eb57a003f51c25687e9cf0ad6f7939a757f1b |
|
08-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Avoid calloc/free in the CURBE upload process.
In exchange we end up with an extra memcpy, but that seems better than
calloc/free. Each buffer is 4k maximum, and on the i965-streaming
branch this allocation was showing up as the top entry in
brw_validate_state profiling for cairo-gl.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
The slightly less mechanical change of converting the emit_reloc calls
will follow.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 828f648ac3b6d32a643cd1188ffbf45a1c7153a3 |
|
28-May-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add cache unit -> bo name mapping for more gen6 state objects.
This will help in bufmgr debugging and aub dumping.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 7ee590424c974cb10882e9c4664a6024595fc9de |
|
29-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i965: Start adding support for the Sandybridge CC unit.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 298be2b028263b2c343a707662c6fbfa18293cb2 |
|
19-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Replace the _mesa_*printf() wrappers with the plain libc versions
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 32f2fd1c5d6088692551c80352b7d6fa35b0cd09 |
|
19-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Replace _mesa_malloc, _mesa_calloc and _mesa_free with plain libc versions
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 1213eb6cb4d9e29627b01350fe4e2ef0ad313713 |
|
13-Feb-2010 |
Vinson Lee <vlee@vmware.com> |
i965: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| a45f24c0a407980b906394d2cfc1e1dc2fdf43cd |
|
24-Nov-2009 |
Eric Anholt <eric@anholt.net> |
i965: Improve the hashing of brw_state_cache keys to include the cache_id.
No measurable difference on cairoperf.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 62a96f74c9a1fd07301d349e4181a7212fc7d45c |
|
18-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i965: Allow for variable-sized auxdata in the state cache.
Everything has been constant-sized until now, but constant buffer
handling changes will make us want some additional variable sized
array.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 3727858ceb324c955b00ae29b8c1e12f47060fce |
|
13-Nov-2009 |
Eric Anholt <eric@anholt.net> |
i965: Remove an unused cache_item field.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 8395da2e8af40367714c70afe299568272f36cc8 |
|
05-Nov-2009 |
Eric Anholt <eric@anholt.net> |
i965: Always pass the size argument to brw_cache_data.
This keeps the individual state files from having to export their
structures for brw_state_cache initialization.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 9b8d2e76c395d6e1fcd09a61cd319cdc2d70c466 |
|
02-Oct-2009 |
Eric Anholt <eric@anholt.net> |
i965: Use bo_references for the state cache delete function.
This appears to shave about 3% off the CPU usage in cairo-gl for firefox.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 49fbdd18ed738feaf73b7faba4d3577cd9cc3e59 |
|
12-Feb-2009 |
Eric Anholt <eric@anholt.net> |
i965: Fix massive memory allocation for streaming texture usage.
Once we've freed a miptree, we won't see any more state cache requests
that would hit the things that pointed at it until we've let the miptree
get released back into the BO cache to be reused. By leaving those
surface state and binding table pointers that pointed at it around, we
would end up with up to (500 * texture size) in memory uselessly consumed
by the state cache.
Bug #20057
Bug #23530
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 1d112207716774b32c0cc846304c2c50bf40e812 |
|
08-May-2009 |
Robert Ellison <papillo@vmware.com> |
i965: improve debug logging
Looking for memory leaks that were causing crashes in my environment
in a situation where valgrind would not work, I ended up improving
the i965 debug traces so I could better see where the memory was
being allocated and where it was going, in the regions and miptrees
code, and in the state caches. These traces were specific enough
that external scripts could determine what elements were not being
released, and where the memory leaks were.
I also ended up creating my own backtrace code in intel_regions.c,
to determine exactly where regions were being allocated and for what,
since valgrind wasn't working. Because it was useful, I left it in,
but disabled and compiled out. It can be activated by changing a flag
at the top of the file.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 21a422d97e501f4ca68ab24ad3fe5f5eb1393349 |
|
22-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: remove old code to init surface-related cache IDs
These types are only found in the new surface state cache now.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| c0c58cf5cfc11b9256287871660cc16966e662ef |
|
22-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: comments, reformatting
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| f9af97c7a5d81226a87d79baf8fb00231c96398d |
|
22-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i965: checkpoint commit: use two state caches instead of one
The new, second cache will only be used for surface-related items.
Since we can create many surfaces the original, single cache could get
filled quickly. When we cleared it, we had to regenerate shaders, etc.
With two caches, we can avoid doing that.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 7d99ddcb2bb09f1f54d91e6e20e42d217a5bccdf |
|
26-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Fix a number of memory leaks on context destroy.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
|
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| f75843a517bd188639e6866db2a7b04de3524e16 |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 4b5b008d54e86ac4f0a2176429d062100978ca8c |
|
03-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Convert drivers to using libdrm bufmgr code.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 05004670448e1edd9166b8da614606e6f49c1fcf |
|
26-Mar-2008 |
Michal Wajdeczko <Michal.Wajdeczko@intel.com> |
[965] Fix massively broken state cache dirty flagging.
It was flagging a last_bo update even when last_bo didn't change, but
another part was failing to update last_bo when it should have.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 1fd82451eb8a76f2df85720e8d9d607d9e37ab24 |
|
08-Feb-2008 |
Eric Anholt <eric@anholt.net> |
[965] Remove stale brw_state_cache.c comment and function export.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 2afe5344dfb7b19563046d7b2f522d91335aac66 |
|
18-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[965] Do a little bit rotation in state hash to reduce collisions.
This was around 3% improvement in OA.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 4cc02fb9387dbeeea56de3a34854f6739dc97a80 |
|
01-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[965] Improve performance by including reloc target buffer pointers in keys.
Without this, the WM binding tables would all collide, for example. Improves
openarena performance by around 2%.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 38bad7677e57d629eeffd4ef39a7fc254db12735 |
|
14-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[965] Replace the state cache suballocator with direct dri_bufmgr use.
The user-space suballocator that was used avoided relocation computations by
using the general and surface state base registers and allocating those types
of buffers out of pools built on top of single buffer objects. It also
avoided calls into the buffer manager for these small state allocations, since
only one buffer object was being used.
However, the buffer allocation cost appears to be low, and with relocation
caching, computing relocations for buffers is essentially free. Additionally,
implementing the suballocator required a don't-fence-subdata flag to disable
waiting on buffer maps so that writing new data didn't block on rendering using
old data, and careful handling when mapping to update old data (which we need
to do for unavoidable relocations with FBOs). More importantly, when the
suballocator filled, it had no replacement algorithm and just threw out all
of the contents and forced them to be recomputed, which is a significant cost.
This is the first step, which just changes the buffer type, but doesn't yet
improve the hash table to not result in full recompute on overflow. Because
the buffers are all allocated out of the general buffer allocator, we can
no longer use the general/surface state bases to avoid relocations, and they
are set to 0 instead.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| e3a6e60040b7f6ea7965e52f8f9881ed31e0347c |
|
08-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[965] Convert the driver to dri_bufmgr interface and enable TTM.
This is currently believed to work but be a significant performance loss.
Performance recovery should be soon to follow.
The dri_bo_fake_disable_backing_store() call was added to allow backing store
disable like bufmgr_fake.c did, which is a significant performance win (though
it's missing the no-fence-subdata part).
This commit is a squash merge of the 965-ttm branch, which had some history
I wanted to avoid pulling due to noisiness and brokenness at many points
for git-bisecting.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 77e0523fb7769df4bf43747e136b1653b2421b97 |
|
04-Oct-2007 |
Eric Anholt <eric@anholt.net> |
[965] Replace various alignment code with a shared ALIGN() macro.
In the process, fix some alignment issues:
- Scratch space allocation was aligned into units of 1KB, while the allocation
wanted units of bytes, so we never allocated enough space for scratch.
- GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of
ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 38c30a81844214b030c9c637f9cf97bd2bf19cde |
|
26-Sep-2007 |
Eric Anholt <eric@anholt.net> |
[965] Remove AUB file support.
This code existed to dump logs of hardware access to be replayed in simulation.
Since we have real hardware now, it's not really needed.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|
| 9f344b3e7d6e23674dd4747faec253f103563b36 |
|
09-Aug-2006 |
Eric Anholt <anholt@FreeBSD.org> |
Add Intel i965G/Q DRI driver.
This driver comes from Tungsten Graphics, with a few further modifications by
Intel.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_state_cache.c
|