Searched defs:isPredicated (Results 1 - 11 of 11) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUInstrInfo.cpp209 bool AMDGPUInstrInfo::isPredicated(const MachineInstr *MI) const { function in class:AMDGPUInstrInfo
H A DR600InstrInfo.cpp207 if(!isPredicated(LastInst)) {
231 isPredicated(SecondLastInst) &&
233 !isPredicated(LastInst)) {
314 if (isPredicated(I)) {
332 if (isPredicated(I)) {
343 R600InstrInfo::isPredicated(const MachineInstr *MI) const function in class:R600InstrInfo
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstrInfo.cpp228 bool AMDGPUInstrInfo::isPredicated(const MachineInstr *MI) const { function in class:AMDGPUInstrInfo
H A DR600InstrInfo.cpp880 R600InstrInfo::isPredicated(const MachineInstr *MI) const { function in class:R600InstrInfo
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.cpp495 bool HexagonMCInstrInfo::isPredicated(MCInstrInfo const &MCII, function in class:llvm::HexagonMCInstrInfo
/external/llvm/include/llvm/Target/
H A DTargetInstrInfo.h1015 virtual bool isPredicated(const MachineInstr *MI) const { function in class:llvm::TargetInstrInfo
/external/llvm/lib/CodeGen/
H A DIfConversion.cpp681 bool isPredicated = TII->isPredicated(I); local
688 if (!isPredicated) {
703 if (BBI.ClobbersPred && !isPredicated) {
1555 if (I->isDebugValue() || TII->isPredicated(I))
1611 if (!TII->isPredicated(I) && !MI->isDebugValue()) {
/external/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp1279 bool PPCInstrInfo::isPredicated(const MachineInstr *MI) const { function in class:PPCInstrInfo
1298 return !isPredicated(MI);
/external/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp292 while (isPredicated(I) || I->isTerminator() || I->isDebugValue()) {
325 CantAnalyze = !isPredicated(I);
333 if (!isPredicated(I) &&
441 bool ARMBaseInstrInfo::isPredicated(const MachineInstr *MI) const { function in class:ARMBaseInstrInfo
2398 if (!isSuitableForMask(MI, SrcReg, CmpMask, false) || isPredicated(MI)) {
2406 isPredicated(PotentialAND))
2474 if (isPredicated(MI))
2621 assert(!isPredicated(MI) && "Can't use flags from predicated instruction");
4155 if (MI->getOpcode() == ARM::VMOVD && !isPredicated(MI))
4160 if (Subtarget.isCortexA9() && !isPredicated(M
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/external/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp503 if (Term != MBB.end() && isPredicated(Term) &&
1038 bool HexagonInstrInfo::isPredicated(const MachineInstr *MI) const { function in class:HexagonInstrInfo
1489 return (MI->isBranch() && isPredicated(MI)) ||
1494 (MI->mayStore() && isPredicated(MI) && !isNewValueStore(MI) &&
1560 if (!MI->getDesc().mayLoad() || !isPredicated(MI))
1767 (isPredicated(MI) && isPredicatedNew(MI)))
2102 return isNewValue(Opcode) && get(Opcode).isBranch() && isPredicated(Opcode);
2134 assert(isPredicated(MI));
2141 assert(isPredicated(Opcode));
2162 bool HexagonInstrInfo::isPredicated(unsigne function in class:HexagonInstrInfo
[all...]
/external/mesa3d/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir.h632 inline bool isPredicated() const { return predSrc >= 0; } function in class:nv50_ir::Instruction

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