| /art/compiler/utils/mips/ |
| H A D | assembler_mips_test.cc | 61 registers_.push_back(new mips::Register(mips::A0));
94 secondary_register_names_.emplace(mips::Register(mips::A0), "a0");
193 (Base::GetAssembler()->*f)(mips::A0, &label);
222 (Base::GetAssembler()->*f)(mips::A0, mips::A1, &label);
727 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A0, 0);
728 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0);
729 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 256);
730 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 1000);
731 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mip
[all...] |
| H A D | assembler_mips.cc | 2909 // Don't care about preserving A0 as this call won't return.
2911 Move(A0, exception->scratch_.AsCoreRegister());
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| /art/compiler/utils/mips64/ |
| H A D | assembler_mips64_test.cc | 85 registers_.push_back(new mips64::GpuRegister(mips64::A0));
118 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A0), "a0");
217 (Base::GetAssembler()->*f)(mips64::A0, &label);
246 (Base::GetAssembler()->*f)(mips64::A0, mips64::A1, &label);
788 __ Beqc(mips64::A0, mips64::A1, &label);
1008 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A0, 0);
1009 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0);
1010 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1);
1011 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips6
[all...] |
| H A D | assembler_mips64.cc | 2461 // Don't care about preserving A0 as this call won't return.
2463 Move(A0, exception->scratch_.AsGpuRegister());
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| /art/runtime/arch/mips/ |
| H A D | registers_mips.h | 34 A0 = 4, // Arguments. enumerator in enum:art::mips::Register
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| H A D | context_mips.h | 82 SetGPR(A0, new_arg0_value);
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| H A D | context_mips.cc | 32 gprs_[A0] = &arg0_;
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| H A D | quick_entrypoints_mips.S | 665 li $t3, 2 # t3 = gpr_index = 2 (skip A0 and A1)
790 li $t3, 1 # t3 = gpr_index = 1 (skip A0)
1604 * exception on error. On success the String is returned. A0 holds the string index. The fast
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| /art/runtime/arch/mips64/ |
| H A D | registers_mips64.h | 34 A0 = 4, // Arguments. enumerator in enum:art::mips64::GpuRegister
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| H A D | context_mips64.cc | 32 gprs_[A0] = &arg0_;
76 gprs_[A0] = nullptr;
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| H A D | context_mips64.h | 82 SetGPR(A0, new_arg0_value);
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| /art/compiler/jni/quick/mips64/ |
| H A D | calling_convention_mips64.cc | 27 A0, A1, A2, A3, A4, A5, A6, A7
68 return Mips64ManagedRegister::FromGpuRegister(A0);
97 int reg_index = 1; // we start from A1, A0 holds ArtMethod*.
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| /art/compiler/trampolines/ |
| H A D | trampoline_compiler.cc | 126 case kInterpreterAbi: // Thread* is first argument (A0) in interpreter ABI.
127 __ LoadFromOffset(kLoadWord, T9, A0, offset.Int32Value());
129 case kJniAbi: // Load via Thread* held in JNIEnv* in first argument (A0).
130 __ LoadFromOffset(kLoadWord, T9, A0, JNIEnvExt::SelfOffset(4).Int32Value());
158 case kInterpreterAbi: // Thread* is first argument (A0) in interpreter ABI.
159 __ LoadFromOffset(kLoadDoubleword, T9, A0, offset.Int32Value());
161 case kJniAbi: // Load via Thread* held in JNIEnv* in first argument (A0).
162 __ LoadFromOffset(kLoadDoubleword, T9, A0, JNIEnvExt::SelfOffset(8).Int32Value());
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| /art/compiler/jni/quick/mips/ |
| H A D | calling_convention_mips.cc | 26 static const Register kCoreArgumentRegisters[] = { A0, A1, A2, A3 };
68 return MipsManagedRegister::FromCoreRegister(A0);
97 uint32_t gpr_index = 1; // Skip A0, it is used for ArtMethod*.
223 A0, A1, A2, A3
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| /art/compiler/optimizing/ |
| H A D | code_generator_mips.h | 44 { A0, A1, A2, A3 };
113 return Location::RegisterLocation(A0);
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| H A D | code_generator_mips64.h | 44 { A0, A1, A2, A3, A4, A5, A6, A7 };
113 return Location::RegisterLocation(A0);
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| H A D | optimizing_cfi_test.cc | 205 __ Beqz(mips::A0, &target);
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| H A D | intrinsics_mips64.cc | 104 Location::RegisterLocation(A0));
106 codegen->GenerateVirtualCall(invoke_->AsInvokeVirtual(), Location::RegisterLocation(A0));
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| H A D | intrinsics_mips.cc | 115 Location::RegisterLocation(A0));
117 codegen->GenerateVirtualCall(invoke_->AsInvokeVirtual(), Location::RegisterLocation(A0));
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| H A D | code_generator_mips64.cc | 38 static constexpr GpuRegister kMethodRegisterArgument = A0;
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| H A D | code_generator_mips.cc | 40 static constexpr Register kMethodRegisterArgument = A0;
3397 // need A0 to hold base + offset
3524 // need A0 to hold base + offset
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