Searched refs:A6 (Results 1 - 6 of 6) sorted by relevance

/art/runtime/arch/mips64/
H A Dregisters_mips64.h40 A6 = 10, enumerator in enum:art::mips64::GpuRegister
H A Dquick_method_frame_info_mips64.h34 (1 << art::mips64::A4) | (1 << art::mips64::A5) | (1 << art::mips64::A6) |
H A Dcontext_mips64.cc81 gprs_[A6] = nullptr;
/art/compiler/jni/quick/mips64/
H A Dcalling_convention_mips64.cc27 A0, A1, A2, A3, A4, A5, A6, A7
/art/compiler/optimizing/
H A Dcode_generator_mips64.h33 { A1, A2, A3, A4, A5, A6, A7 };
44 { A0, A1, A2, A3, A4, A5, A6, A7 };
/art/compiler/utils/mips64/
H A Dassembler_mips64_test.cc91 registers_.push_back(new mips64::GpuRegister(mips64::A6));
124 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A6), "a6");

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