Searched refs:ATOMIC_LOAD_ADD (Results 1 - 14 of 14) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 719 ATOMIC_LOAD_ADD, enumerator in enum:llvm::ISD::NodeType
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| H A D | SelectionDAGNodes.h | 1199 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
1318 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 67 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
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| H A D | LegalizeIntegerTypes.cpp | 137 case ISD::ATOMIC_LOAD_ADD:
1332 case ISD::ATOMIC_LOAD_ADD:
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| H A D | SelectionDAG.cpp | 491 case ISD::ATOMIC_LOAD_ADD:
4890 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
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| H A D | LegalizeDAG.cpp | 3986 case ISD::ATOMIC_LOAD_ADD:
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| H A D | SelectionDAGBuilder.cpp | 3513 case AtomicRMWInst::Add: NT = ISD::ATOMIC_LOAD_ADD; break;
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| /external/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.cpp | 136 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand);
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| /external/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 677 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_ADD, SYNC_FETCH_AND_ADD)
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| /external/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 277 setTargetDAGCombine(ISD::ATOMIC_LOAD_ADD);
2120 case ISD::ATOMIC_LOAD_ADD:
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1936 case ISD::ATOMIC_LOAD_ADD:
2313 case ISD::ATOMIC_LOAD_ADD: {
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| H A D | X86ISelLowering.cpp | 19632 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, dl,
20360 case ISD::ATOMIC_LOAD_ADD:
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 175 // Lower ATOMIC_LOAD_SUB into ATOMIC_LOAD_ADD if LAA and LAAG are
207 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Custom);
3154 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT,
4363 case ISD::ATOMIC_LOAD_ADD:
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 861 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand);
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