/external/webp/src/dsp/ |
H A D | mips_macro.h | 22 // O0[31..16 | 15..0] = I0[31..16 | 15..0] + I1[31..16 | 15..0] 23 // O1[31..16 | 15..0] = I0[31..16 | 15..0] - I1[31..16 | 15..0] 27 I0, I1) \ 28 "addq.ph %[" #O0 "], %[" #I0 "], %[" #I1 "] \n\t" \ 29 "subq.ph %[" #O1 "], %[" #I0 "], %[" #I1 "] \n\t" 35 I0, I1) \ 36 "lh %[" #O0 "], " #I0 "(%[in]) \n\t" \ 39 // I0 - location 42 I0, I1, I2, I3, I4, I5, I6, I7, I8, I9) \ 43 "ulw %[" #O0 "], " #I1 "+" XSTR(I9) "*" #I5 "(%[" #I0 "]) \ [all...] |
H A D | enc_mips_dsp_r2.c | 29 I0, I1, I2, I3, I4, I5, I6, I7) \ 30 "addq.ph %[" #O0 "], %[" #I0 "], %[" #I1 "] \n\t" \ 31 "subq.ph %[" #O1 "], %[" #I0 "], %[" #I1 "] \n\t" \ 56 #define MUL_HALF(O0, I0, I1, I2, I3, I4, I5, I6, I7, \ 59 "dpa.w.ph $ac0, %[" #I2 "], %[" #I0 "] \n\t" \
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/external/guava/guava-tests/benchmark/com/google/common/base/ |
H A D | ObjectsBenchmark.java | 29 private static final Integer I0 = -45; field in class:ObjectsBenchmark 75 dummy += Objects.hashCode(I2, S1, D1, S2, I0);
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/external/llvm/unittests/IR/ |
H A D | ValueTest.cpp | 130 Instruction *I0 = &*BB.begin(); local 131 ASSERT_TRUE(I0); 152 CHECK_PRINT(I0, " %0 = add i32 %y, 1"); 171 CHECK_PRINT_AS_OPERAND(I0, false, "%0"); 173 CHECK_PRINT_AS_OPERAND(I0, true, "i32 %0"); 200 Instruction *I0 = &*EntryBB.begin(); local 201 ASSERT_TRUE(I0); 207 EXPECT_EQ(MST.getLocalSlot(I0), 0);
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/external/webrtc/webrtc/common_audio/ |
H A D | window_generator.cc | 25 complex<float> I0(complex<float> x) { function in namespace:__anon20110 59 sum += I0(static_cast<float>(M_PI) * alpha * sqrt(1.0f - r * r)).real();
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcFrameLowering.cpp | 291 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) 317 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { 321 unsigned mapped_reg = reg - SP::I0 + SP::O0; 328 if ((reg - SP::I0) % 2 == 0) { 329 unsigned preg = (reg - SP::I0) / 2 + SP::I0_I1; 344 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { 348 MBB->addLiveIn(reg - SP::I0 + SP::O0);
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H A D | DelaySlotFiller.cpp | 370 if (reg < SP::I0 || reg > SP::I7) 382 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); 398 if (reg < SP::I0 || reg > SP::I7) 421 OrMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); 436 if (reg < SP::I0 || reg > SP::I7) 455 RestoreMI->getOperand(0).setReg(reg - SP::I0 + SP::O0);
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H A D | SparcISelLowering.h | 96 return SP::I0;
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H A D | SparcISelLowering.cpp | 57 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 85 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 119 Reg = SP::I0 + Offset/8; 164 unsigned Reg = SP::I0 + Offset/8; 187 assert(SP::I0 + 7 == SP::I7 && SP::O0 + 7 == SP::O7 && "Unexpected enum"); 188 if (Reg >= SP::I0 && Reg <= SP::I7) 189 return Reg - SP::I0 + SP::O0; 263 // If the function returns a struct, copy the SRetReturnReg to I0 271 Chain = DAG.getCopyToReg(Chain, DL, SP::I0, Val, Flag); 273 RetOps.push_back(DAG.getRegister(SP::I0, PtrV [all...] |
/external/clang/test/SemaTemplate/ |
H A D | temp_arg_nontype.cpp | 207 template <typename Sequence, int I0> 208 struct as_nview<Sequence, I0> // expected-note{{while checking a default template argument used here}}
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/external/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUPromoteAlloca.cpp | 126 ConstantInt *I0 = dyn_cast<ConstantInt>(GEP->getOperand(1)); 127 if (!I0 || !I0->isZero())
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/external/guice/core/test/com/google/inject/ |
H A D | ScopesTest.java | 975 static class I0 { class in class:ScopesTest 981 I0(I1 i) { method in class:ScopesTest.I0 1077 * <p>I0 -> I1 -> I2 -> J1 and J0 -> J1 -> J2 -> K1 and K0 -> K1 -> K2, 1096 Future<I0> firstThreadResult = Executors.newSingleThreadExecutor().submit(new Callable<I0>() { 1097 public I0 call() { 1098 Thread.currentThread().setName("I0.class"); 1099 return injector.getInstance(I0.class); 1158 assertFalse("Both I0 and J0 can not be a part of a dependency cycle", 1159 errorMessage.contains(I0 [all...] |
/external/ppp/pppd/ |
H A D | md4.c | 45 #define I0 0x67452301 /* Initial values for MD buffer */ macro 108 MDp->buffer[0] = I0;
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/external/llvm/lib/Transforms/Vectorize/ |
H A D | SLPVectorizer.cpp | 120 Instruction *I0 = dyn_cast<Instruction>(VL[0]); local 121 if (!I0) 123 BasicBlock *BB = I0->getParent(); 180 Instruction *I0 = dyn_cast<Instruction>(VL[0]); local 181 unsigned Opcode = I0->getOpcode(); 194 Instruction *I0 = dyn_cast<Instruction>(VL[0]); local 195 if (!I0) 197 unsigned Opcode = I0->getOpcode(); 228 Instruction *I0 = cast<Instruction>(VL[0]); local 230 I0 1018 Instruction *I0 = dyn_cast<Instruction>(VL[0]); local 1671 Instruction *I0 = cast<Instruction>(VL[0]); local 3458 Instruction *I0 = dyn_cast<Instruction>(VL[0]); local [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAddSub.cpp | 445 Instruction *I0 = dyn_cast<Instruction>(I->getOperand(0)); local 448 if (!I0 || !I1 || I0->getOpcode() != I1->getOpcode()) 452 if (I0->getOpcode() == Instruction::FMul) 454 else if (I0->getOpcode() != Instruction::FDiv) 457 Value *Opnd0_0 = I0->getOperand(0); 458 Value *Opnd0_1 = I0->getOperand(1); 491 if (I0) Flags &= I->getFastMathFlags();
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/external/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 108 Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3, 358 else if (Reg >= Sparc::I0 && Reg <= Sparc::I7) 359 regIdx = Reg - Sparc::I0 + 24;
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/external/ImageMagick/MagickCore/ |
H A D | resize.c | 115 I0(double x), 333 I0( beta * sqrt( 1-x^2) ) / IO(0) 342 return(resize_filter->coefficient[1]*I0(resize_filter->coefficient[0]* 1033 resize_filter->coefficient[1]=PerceptibleReciprocal(I0(value)); 1306 #undef I0 1307 static double I0(double x) 1299 #undef I0 macro 1300 static double I0(double x) function
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMELFStreamer.cpp | 485 const unsigned I0 = LittleEndian ? II + 0 : (Size - II - 1); 487 Buffer[Size - II - 2] = uint8_t(Inst >> I0 * CHAR_BIT);
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/external/llvm/lib/Target/Sparc/Disassembler/ |
H A D | SparcDisassembler.cpp | 74 SP::I0, SP::I1, SP::I2, SP::I3,
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/external/webrtc/data/voice_engine/stereo_rtp_files/ |
H A D | stereo_g729_jitter.rtp | 442 �MD���� < |