| /external/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 850 SETO, // 0 1 1 1 True if ordered (no nans) enumerator in enum:llvm::ISD::CondCode
|
| /external/llvm/lib/CodeGen/ |
| H A D | Analysis.cpp | 172 case FCmpInst::FCMP_ORD: return ISD::SETO;
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 337 case ISD::SETO: return "seto";
|
| H A D | TargetLowering.cpp | 168 case ISD::SETO:
1817 // have SETO(x,x) instead of SETO(x, 0.0) because this avoids having to
1819 if (Cond == ISD::SETO || Cond == ISD::SETUO)
1883 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
1885 ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO;
|
| H A D | LegalizeDAG.cpp | 1844 case ISD::SETO:
1847 && "If SETO is expanded, SETOEQ must be legal!");
1870 CC2 = ((unsigned)CCCode & 0x8U) ? ISD::SETUO : ISD::SETO;
1898 if (CCCode != ISD::SETO && CCCode != ISD::SETUO) {
|
| H A D | SelectionDAG.cpp | 1939 case ISD::SETO:
1999 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, dl, VT);
|
| /external/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 131 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 2112 case ISD::SETO: return PPC::PRED_NU;
2140 case ISD::SETO: Invert = true; return 3; // !Bit #3 = SETO
|
| H A D | PPCISelLowering.cpp | 550 setCondCodeAction(ISD::SETO, MVT::v4f32, Expand);
595 setCondCodeAction(ISD::SETO, MVT::v2f64, Expand);
|
| /external/mesa3d/src/mesa/x86/ |
| H A D | assyntax.h | 637 #define SETO(a) CHOICE(seto a, seto a, seto a) macro
1358 #define SETO(a) seto a macro
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1452 case ISD::SETO##X: return SystemZ::CCMASK_CMP_##X; \
1466 case ISD::SETO: return SystemZ::CCMASK_CMP_O;
2260 case ISD::SETO: {
|
| /external/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 46 setCondCodeAction(ISD::SETO, MVT::f32, Expand);
|
| H A D | SIISelLowering.cpp | 1822 if (LCC == ISD::SETO) {
|
| H A D | AMDGPUISelLowering.cpp | 1112 case ISD::SETO:
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1871 ISD::SETUO, ISD::SETO}) {
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 526 case ISD::SETO: return Mips::FCOND_OR;
|
| H A D | MipsSEISelLowering.cpp | 1818 Op->getOperand(2), ISD::SETO);
|
| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1418 case ISD::SETO: return SPCC::FCC_O;
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1343 case ISD::SETO: CondCode = ARMCC::VC; break;
3555 if (CC == ISD::SETO) {
4656 case ISD::SETO:
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1107 case ISD::SETO:
1154 case ISD::SETO:
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4130 case ISD::SETO: return X86::COND_NP;
14232 case ISD::SETO: SSECC = 7; break;
[all...] |