Searched refs:getRegisterInfo (Results 1 - 25 of 260) sorted by relevance

1234567891011

/external/llvm/lib/Target/BPF/
H A DBPFSubtarget.h58 const TargetRegisterInfo *getRegisterInfo() const override {
59 return &InstrInfo.getRegisterInfo();
H A DBPFInstrInfo.h31 const BPFRegisterInfo &getRegisterInfo() const { return RI; } function in class:llvm::BPFInstrInfo
/external/llvm/lib/Target/MSP430/
H A DMSP430Subtarget.h57 const TargetRegisterInfo *getRegisterInfo() const override {
58 return &InstrInfo.getRegisterInfo();
H A DMSP430InstrInfo.h49 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
53 const TargetRegisterInfo &getRegisterInfo() const { return RI; } function in class:llvm::MSP430InstrInfo
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblySubtarget.h67 const WebAssemblyRegisterInfo *getRegisterInfo() const override {
68 return &getInstrInfo()->getRegisterInfo();
H A DWebAssemblyInstrInfo.h35 const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; } function in class:llvm::final
/external/llvm/lib/Target/XCore/
H A DXCoreSubtarget.h60 const TargetRegisterInfo *getRegisterInfo() const override {
61 return &InstrInfo.getRegisterInfo();
/external/llvm/lib/Target/ARM/
H A DARMInstrInfo.h35 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
39 const ARMRegisterInfo &getRegisterInfo() const override { return RI; }
H A DThumb1InstrInfo.h35 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
39 const ThumbRegisterInfo &getRegisterInfo() const override { return RI; }
H A DThumb2InstrInfo.h59 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
63 const ThumbRegisterInfo &getRegisterInfo() const override { return RI; }
/external/llvm/lib/Target/X86/
H A DX86MachineFunctionInfo.cpp21 MF->getSubtarget().getRegisterInfo());
/external/mesa3d/src/gallium/drivers/radeon/
H A DSIInstrInfo.h31 const SIRegisterInfo &getRegisterInfo() const;
H A DAMDGPUTargetMachine.h55 virtual const AMDGPURegisterInfo *getRegisterInfo() const { function in class:llvm::AMDGPUTargetMachine
56 return &InstrInfo->getRegisterInfo();
/external/llvm/lib/CodeGen/
H A DTargetFrameLoweringImpl.cpp43 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
63 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
H A DLiveStackAnalysis.cpp53 TRI = MF.getSubtarget().getRegisterInfo();
/external/llvm/lib/Target/NVPTX/
H A DNVPTXSubtarget.h62 const NVPTXRegisterInfo *getRegisterInfo() const override {
63 return &InstrInfo.getRegisterInfo();
/external/llvm/lib/Target/Sparc/
H A DSparcSubtarget.h53 const SparcRegisterInfo *getRegisterInfo() const override {
54 return &InstrInfo.getRegisterInfo();
/external/llvm/lib/Target/SystemZ/
H A DSystemZSubtarget.h66 const SystemZRegisterInfo *getRegisterInfo() const override {
67 return &InstrInfo.getRegisterInfo();
/external/llvm/lib/Target/Mips/
H A DMipsFrameLowering.cpp98 const TargetRegisterInfo *TRI = STI.getRegisterInfo();
107 const TargetRegisterInfo *TRI = STI.getRegisterInfo();
114 const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
H A DMipsOptionRecord.h45 const MCRegisterInfo *TRI = Context.getRegisterInfo();
/external/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.h69 const HexagonRegisterInfo *getRegisterInfo() const override {
70 return &InstrInfo.getRegisterInfo();
/external/llvm/lib/Target/AArch64/
H A DAArch64Subtarget.h99 const AArch64RegisterInfo *getRegisterInfo() const override {
100 return &getInstrInfo()->getRegisterInfo();
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp534 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg);
564 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
873 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
874 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg());
891 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC.
975 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC.
1012 unsigned Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
1080 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
1081 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
1116 unsigned Rn = CTX.getRegisterInfo()
[all...]
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUFrameLowering.cpp78 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
/external/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsELFStreamer.cpp23 const MCRegisterInfo *MCRegInfo = Context.getRegisterInfo();

Completed in 288 milliseconds

1234567891011