Searched refs:Register (Results 1 - 25 of 60) sorted by relevance

123

/art/compiler/utils/mips/
H A Dassembler_mips.h124 void Addu(Register rd, Register rs, Register rt);
125 void Addiu(Register rt, Register rs, uint16_t imm16);
126 void Subu(Register rd, Register rs, Register rt);
128 void MultR2(Register rs, Register r
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H A Dassembler_mips.cc125 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) {
138 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) {
148 void MipsAssembler::EmitI21(int opcode, Register rs, uint32_t imm21) {
186 void MipsAssembler::Addu(Register rd, Register rs, Register rt) {
190 void MipsAssembler::Addiu(Register r
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H A Dassembler_mips_test.cc29 bool operator()(const mips::Register& a, const mips::Register& b) const {
35 mips::Register,
39 typedef AssemblerTest<mips::MipsAssembler, mips::Register, mips::FRegister, uint32_t> Base;
57 registers_.push_back(new mips::Register(mips::ZERO));
58 registers_.push_back(new mips::Register(mips::AT));
59 registers_.push_back(new mips::Register(mips::V0));
60 registers_.push_back(new mips::Register(mips::V1));
61 registers_.push_back(new mips::Register(mips::A0));
62 registers_.push_back(new mips::Register(mip
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/art/compiler/utils/arm/
H A Dassembler_arm32.h41 virtual void and_(Register rd, Register rn, const ShifterOperand& so,
44 virtual void eor(Register rd, Register rn, const ShifterOperand& so,
47 virtual void sub(Register rd, Register rn, const ShifterOperand& so,
50 virtual void rsb(Register rd, Register rn, const ShifterOperand& so,
53 virtual void add(Register rd, Register r
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H A Dassembler_thumb2.h71 virtual void and_(Register rd, Register rn, const ShifterOperand& so,
74 virtual void eor(Register rd, Register rn, const ShifterOperand& so,
77 virtual void sub(Register rd, Register rn, const ShifterOperand& so,
80 virtual void rsb(Register rd, Register rn, const ShifterOperand& so,
83 virtual void add(Register rd, Register r
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H A Dassembler_arm.h130 // Data-processing operands - Register
131 explicit ShifterOperand(Register rm) : type_(kRegister), rm_(rm), rs_(kNoRegister),
140 ShifterOperand(Register rm, Shift shift, uint32_t shift_imm = 0) : type_(kRegister), rm_(rm),
146 ShifterOperand(Register rm, Shift shift, Register rs) : type_(kRegister), rm_(rm),
185 Register GetRegister() const {
189 Register GetSecondRegister() const {
201 Register rm_;
202 Register rs_;
271 Address(Register r
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H A Dassembler_arm32.cc56 bool Arm32Assembler::ShifterOperandCanHold(Register rd ATTRIBUTE_UNUSED,
57 Register rn ATTRIBUTE_UNUSED,
65 void Arm32Assembler::and_(Register rd, Register rn, const ShifterOperand& so,
71 void Arm32Assembler::eor(Register rd, Register rn, const ShifterOperand& so,
77 void Arm32Assembler::sub(Register rd, Register rn, const ShifterOperand& so,
82 void Arm32Assembler::rsb(Register rd, Register r
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H A Dassembler_thumb2.cc361 inline int16_t Thumb2Assembler::CbxzEncoding16(Register rn, int32_t offset, Condition cond) {
371 inline int16_t Thumb2Assembler::CmpRnImm8Encoding16(Register rn, int32_t value) {
377 inline int16_t Thumb2Assembler::AddRdnRmEncoding16(Register rdn, Register rm) {
383 inline int32_t Thumb2Assembler::MovwEncoding32(Register rd, int32_t value) {
393 inline int32_t Thumb2Assembler::MovtEncoding32(Register rd, int32_t value) {
399 inline int32_t Thumb2Assembler::MovModImmEncoding32(Register rd, int32_t value) {
406 inline int16_t Thumb2Assembler::LdrLitEncoding16(Register rt, int32_t offset) {
413 inline int32_t Thumb2Assembler::LdrLitEncoding32(Register rt, int32_t offset) {
418 inline int32_t Thumb2Assembler::LdrdEncoding32(Register r
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/art/compiler/utils/x86/
H A Dassembler_x86.h57 Register rm() const {
58 return static_cast<Register>(encoding_at(0) & 7);
65 Register index() const {
66 return static_cast<Register>((encoding_at(1) >> 3) & 7);
69 Register base() const {
70 return static_cast<Register>(encoding_at(1) & 7);
85 bool IsRegister(Register reg) const {
87 && ((encoding_[0] & 0x07) == reg); // Register codes match.
94 void SetModRM(int mod_in, Register rm_in) {
100 void SetSIB(ScaleFactor scale_in, Register index_i
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H A Dassembler_x86_test.cc36 class AssemblerX86Test : public AssemblerTest<x86::X86Assembler, x86::Register,
39 typedef AssemblerTest<x86::X86Assembler, x86::Register,
59 new x86::Register(x86::EAX),
60 new x86::Register(x86::EBX),
61 new x86::Register(x86::ECX),
62 new x86::Register(x86::EDX),
63 new x86::Register(x86::EBP),
64 new x86::Register(x86::ESP),
65 new x86::Register(x86::ESI),
66 new x86::Register(x8
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/art/runtime/arch/x86/
H A Dregisters_x86.h29 enum Register { enum in namespace:art::x86
42 std::ostream& operator<<(std::ostream& os, const Register& rhs);
H A Dregisters_x86.cc27 std::ostream& operator<<(std::ostream& os, const Register& rhs) {
31 os << "Register[" << static_cast<int>(rhs) << "]";
/art/compiler/optimizing/
H A Dintrinsics_arm.cc88 __ vmovrrd(output.AsRegisterPairLow<Register>(),
89 output.AsRegisterPairHigh<Register>(),
92 __ vmovrs(output.AsRegister<Register>(), input.AsFpuRegister<SRegister>());
101 input.AsRegisterPairLow<Register>(),
102 input.AsRegisterPairHigh<Register>());
104 __ vmovsr(output.AsFpuRegister<SRegister>(), input.AsRegister<Register>());
156 Register out = locations->Out().AsRegister<Register>();
161 Register in_reg_lo = in.AsRegisterPairLow<Register>();
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H A Dintrinsics_mips.cc71 Register trg_reg = trg.AsRegister<Register>();
164 Register out_lo = locations->Out().AsRegisterPairLow<Register>();
165 Register out_hi = locations->Out().AsRegisterPairHigh<Register>();
170 Register out = locations->Out().AsRegister<Register>();
206 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>();
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H A Dcode_generator_x86.cc43 static constexpr Register kMethodRegisterArgument = EAX;
44 static constexpr Register kCoreCalleeSaves[] = { EBP, ESI, EDI };
48 static constexpr int kFakeReturnRegister = Register(8);
107 DivRemMinusOneSlowPathX86(HInstruction* instruction, Register reg, bool is_div)
123 Register reg_;
437 Register reg_out = out_.AsRegister<Register>();
506 Register reg_out = out_.AsRegister<Register>();
526 Register index_re
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H A Dintrinsics_x86.cc118 __ movd(output.AsRegisterPairLow<Register>(), temp);
120 __ movd(output.AsRegisterPairHigh<Register>(), temp);
122 __ movd(output.AsRegister<Register>(), input.AsFpuRegister<XmmRegister>());
133 __ movd(temp1, input.AsRegisterPairLow<Register>());
134 __ movd(temp2, input.AsRegisterPairHigh<Register>());
138 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<Register>());
197 Register out = locations->Out().AsRegister<Register>();
229 Register input_lo = input.AsRegisterPairLow<Register>();
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H A Dcode_generator_arm.cc48 static constexpr Register kMethodRegisterArgument = R0;
50 static constexpr Register kCoreAlwaysSpillRegister = R5;
51 static constexpr Register kCoreCalleeSaves[] =
420 Register reg_out = out_.AsRegister<Register>();
489 Register reg_out = out_.AsRegister<Register>();
509 Register index_reg = index_.AsRegister<Register>();
534 Register free_re
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H A Dcode_generator_mips.cc40 static constexpr Register kMethodRegisterArgument = A0;
101 Register low_even = calling_convention.GetRegisterAt(gp_index);
102 Register high_odd = calling_convention.GetRegisterAt(gp_index + 1);
540 Register r1 = loc1.AsRegister<Register>();
541 Register r2 = loc2.AsRegister<Register>();
564 Register r2 = loc1.IsRegister() ? loc1.AsRegister<Register>()
565 : loc2.AsRegister<Register>();
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H A Dcode_generator_arm.h37 static constexpr Register kParameterCoreRegisters[] = { R1, R2, R3 };
43 static constexpr Register kArtMethodRegister = R0;
45 static constexpr Register kRuntimeParameterCoreRegisters[] = { R0, R1, R2, R3 };
52 class InvokeRuntimeCallingConvention : public CallingConvention<Register, SRegister> {
71 class InvokeDexCallingConvention : public CallingConvention<Register, SRegister> {
145 void Exchange(Register reg, int mem);
217 void GenerateClassInitializationCheck(SlowPathCode* slow_path, Register class_reg);
218 void GenerateAndConst(Register out, Register first, uint32_t value);
219 void GenerateOrrConst(Register ou
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H A Dcode_generator_x86.h36 static constexpr Register kParameterCoreRegisters[] = { ECX, EDX, EBX };
42 static constexpr Register kRuntimeParameterCoreRegisters[] = { EAX, ECX, EDX, EBX };
49 class InvokeRuntimeCallingConvention : public CallingConvention<Register, XmmRegister> {
62 class InvokeDexCallingConvention : public CallingConvention<Register, XmmRegister> {
138 void Exchange(Register reg, int mem);
210 void GenerateClassInitializationCheck(SlowPathCode* slow_path, Register class_reg);
219 void GenerateShlLong(const Location& loc, Register shifter);
220 void GenerateShrLong(const Location& loc, Register shifter);
221 void GenerateUShrLong(const Location& loc, Register shifter);
291 void GenPackedSwitchWithCompares(Register value_re
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/art/runtime/arch/x86_64/
H A Dregisters_x86_64.h29 enum Register { enum in namespace:art::x86_64
50 std::ostream& operator<<(std::ostream& os, const Register& rhs);
H A Dregisters_x86_64.cc28 std::ostream& operator<<(std::ostream& os, const Register& rhs) {
32 os << "Register[" << static_cast<int>(rhs) << "]";
41 os << "Register[" << static_cast<int>(rhs) << "]";
/art/compiler/utils/x86_64/
H A Dconstants_x86_64.h32 explicit CpuRegister(Register r) : reg_(r) {}
33 explicit CpuRegister(int r) : reg_(Register(r)) {}
34 Register AsRegister() const {
44 const Register reg_;
/art/runtime/arch/arm/
H A Dregisters_arm.cc28 std::ostream& operator<<(std::ostream& os, const Register& rhs) {
32 os << "Register[" << static_cast<int>(rhs) << "]";
/art/runtime/arch/mips/
H A Dregisters_mips.cc30 std::ostream& operator<<(std::ostream& os, const Register& rhs) {
34 os << "Register[" << static_cast<int>(rhs) << "]";

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