/art/runtime/base/unix_file/ |
H A D | random_access_file_utils.h | 24 // Copies from 'src' to 'dst'. Reads all the data from 'src', and writes it 25 // to 'dst'. Not thread-safe. Neither file will be closed. 26 bool CopyFile(const RandomAccessFile& src, RandomAccessFile* dst);
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H A D | random_access_file_utils.cc | 23 bool CopyFile(const RandomAccessFile& src, RandomAccessFile* dst) { argument 30 if (dst->Write(&buf[0], n, offset) != n) {
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/art/runtime/base/ |
H A D | stringprintf.h | 29 // Appends a printf-like formatting of the arguments to 'dst'. 30 void StringAppendF(std::string* dst, const char* fmt, ...) 33 // Appends a printf-like formatting of the arguments to 'dst'. 34 void StringAppendV(std::string* dst, const char* format, va_list ap);
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H A D | stringprintf.cc | 23 void StringAppendV(std::string* dst, const char* format, va_list ap) { argument 38 dst->append(space, result); 60 dst->append(buf, result); 74 void StringAppendF(std::string* dst, const char* format, ...) { argument 77 StringAppendV(dst, format, ap);
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H A D | bit_vector.h | 260 void CopyTo(void* dst, size_t len) const { argument 264 void* dst_padding = reinterpret_cast<uint8_t*>(dst) + vec_len; 265 memcpy(dst, storage_, vec_len); 268 memcpy(dst, storage_, len);
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/art/compiler/utils/x86_64/ |
H A D | assembler_x86_64.h | 354 void movq(CpuRegister dst, const Immediate& src); 355 void movl(CpuRegister dst, const Immediate& src); 356 void movq(CpuRegister dst, CpuRegister src); 357 void movl(CpuRegister dst, CpuRegister src); 359 void movntl(const Address& dst, CpuRegister src); 360 void movntq(const Address& dst, CpuRegister src); 362 void movq(CpuRegister dst, const Address& src); 363 void movl(CpuRegister dst, const Address& src); 364 void movq(const Address& dst, CpuRegister src); 365 void movq(const Address& dst, cons [all...] |
H A D | assembler_x86_64.cc | 106 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { argument 110 EmitRex64(dst); 112 EmitRegisterOperand(0, dst.LowBits()); 115 EmitRex64(dst); 116 EmitUint8(0xB8 + dst.LowBits()); 122 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { argument 125 EmitOptionalRex32(dst); 126 EmitUint8(0xB8 + dst.LowBits()); 131 void X86_64Assembler::movq(const Address& dst, const Immediate& imm) { argument 134 EmitRex64(dst); 141 movq(CpuRegister dst, CpuRegister src) argument 150 movl(CpuRegister dst, CpuRegister src) argument 158 movq(CpuRegister dst, const Address& src) argument 166 movl(CpuRegister dst, const Address& src) argument 174 movq(const Address& dst, CpuRegister src) argument 182 movl(const Address& dst, CpuRegister src) argument 189 movl(const Address& dst, const Immediate& imm) argument 197 movntl(const Address& dst, CpuRegister src) argument 205 movntq(const Address& dst, CpuRegister src) argument 213 cmov(Condition c, CpuRegister dst, CpuRegister src) argument 217 cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) argument 226 cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) argument 239 movzxb(CpuRegister dst, CpuRegister src) argument 248 movzxb(CpuRegister dst, const Address& src) argument 259 movsxb(CpuRegister dst, CpuRegister src) argument 268 movsxb(CpuRegister dst, const Address& src) argument 284 movb(const Address& dst, CpuRegister src) argument 292 movb(const Address& dst, const Immediate& imm) argument 302 movzxw(CpuRegister dst, CpuRegister src) argument 311 movzxw(CpuRegister dst, const Address& src) argument 320 movsxw(CpuRegister dst, CpuRegister src) argument 329 movsxw(CpuRegister dst, const Address& src) argument 343 movw(const Address& dst, CpuRegister src) argument 352 movw(const Address& dst, const Immediate& imm) argument 364 leaq(CpuRegister dst, const Address& src) argument 372 leal(CpuRegister dst, const Address& src) argument 380 movaps(XmmRegister dst, XmmRegister src) argument 389 movss(XmmRegister dst, const Address& src) argument 399 movss(const Address& dst, XmmRegister src) argument 409 movss(XmmRegister dst, XmmRegister src) argument 419 movsxd(CpuRegister dst, CpuRegister src) argument 427 movsxd(CpuRegister dst, const Address& src) argument 435 movd(XmmRegister dst, CpuRegister src) argument 439 movd(CpuRegister dst, XmmRegister src) argument 443 movd(XmmRegister dst, CpuRegister src, bool is64bit) argument 452 movd(CpuRegister dst, XmmRegister src, bool is64bit) argument 462 addss(XmmRegister dst, XmmRegister src) argument 472 addss(XmmRegister dst, const Address& src) argument 482 subss(XmmRegister dst, XmmRegister src) argument 492 subss(XmmRegister dst, const Address& src) argument 502 mulss(XmmRegister dst, XmmRegister src) argument 512 mulss(XmmRegister dst, const Address& src) argument 522 divss(XmmRegister dst, XmmRegister src) argument 532 divss(XmmRegister dst, const Address& src) argument 549 fsts(const Address& dst) argument 556 fstps(const Address& dst) argument 563 movsd(XmmRegister dst, const Address& src) argument 573 movsd(const Address& dst, XmmRegister src) argument 583 movsd(XmmRegister dst, XmmRegister src) argument 593 addsd(XmmRegister dst, XmmRegister src) argument 603 addsd(XmmRegister dst, const Address& src) argument 613 subsd(XmmRegister dst, XmmRegister src) argument 623 subsd(XmmRegister dst, const Address& src) argument 633 mulsd(XmmRegister dst, XmmRegister src) argument 643 mulsd(XmmRegister dst, const Address& src) argument 653 divsd(XmmRegister dst, XmmRegister src) argument 663 divsd(XmmRegister dst, const Address& src) argument 673 cvtsi2ss(XmmRegister dst, CpuRegister src) argument 678 cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) argument 693 cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit) argument 708 cvtsi2sd(XmmRegister dst, CpuRegister src) argument 713 cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit) argument 728 cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit) argument 743 cvtss2si(CpuRegister dst, XmmRegister src) argument 753 cvtss2sd(XmmRegister dst, XmmRegister src) argument 763 cvtss2sd(XmmRegister dst, const Address& src) argument 773 cvtsd2si(CpuRegister dst, XmmRegister src) argument 783 cvttss2si(CpuRegister dst, XmmRegister src) argument 788 cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit) argument 803 cvttsd2si(CpuRegister dst, XmmRegister src) argument 808 cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit) argument 823 cvtsd2ss(XmmRegister dst, XmmRegister src) argument 833 cvtsd2ss(XmmRegister dst, const Address& src) argument 843 cvtdq2pd(XmmRegister dst, XmmRegister src) argument 929 roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) argument 941 roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) argument 953 sqrtsd(XmmRegister dst, XmmRegister src) argument 963 sqrtss(XmmRegister dst, XmmRegister src) argument 973 xorpd(XmmRegister dst, const Address& src) argument 983 xorpd(XmmRegister dst, XmmRegister src) argument 993 xorps(XmmRegister dst, const Address& src) argument 1002 xorps(XmmRegister dst, XmmRegister src) argument 1011 andpd(XmmRegister dst, const Address& src) argument 1020 andpd(XmmRegister dst, XmmRegister src) argument 1029 andps(XmmRegister dst, XmmRegister src) argument 1037 orpd(XmmRegister dst, XmmRegister src) argument 1046 orps(XmmRegister dst, XmmRegister src) argument 1061 fstl(const Address& dst) argument 1068 fstpl(const Address& dst) argument 1083 fnstcw(const Address& dst) argument 1097 fistpl(const Address& dst) argument 1104 fistps(const Address& dst) argument 1174 xchgl(CpuRegister dst, CpuRegister src) argument 1194 xchgq(CpuRegister dst, CpuRegister src) argument 1308 addl(CpuRegister dst, CpuRegister src) argument 1382 andl(CpuRegister dst, CpuRegister src) argument 1398 andl(CpuRegister dst, const Immediate& imm) argument 1413 andq(CpuRegister dst, CpuRegister src) argument 1421 andq(CpuRegister dst, const Address& src) argument 1429 orl(CpuRegister dst, CpuRegister src) argument 1445 orl(CpuRegister dst, const Immediate& imm) argument 1452 orq(CpuRegister dst, const Immediate& imm) argument 1460 orq(CpuRegister dst, CpuRegister src) argument 1468 orq(CpuRegister dst, const Address& src) argument 1476 xorl(CpuRegister dst, CpuRegister src) argument 1492 xorl(CpuRegister dst, const Immediate& imm) argument 1499 xorq(CpuRegister dst, CpuRegister src) argument 1507 xorq(CpuRegister dst, const Immediate& imm) argument 1514 xorq(CpuRegister dst, const Address& src) argument 1590 addq(CpuRegister dst, const Address& address) argument 1598 addq(CpuRegister dst, CpuRegister src) argument 1622 subl(CpuRegister dst, CpuRegister src) argument 1645 subq(CpuRegister dst, CpuRegister src) argument 1698 imull(CpuRegister dst, CpuRegister src) argument 1706 imull(CpuRegister dst, CpuRegister src, const Immediate& imm) argument 1742 imulq(CpuRegister dst, CpuRegister src) argument 1755 imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm) argument 2174 setcc(Condition condition, CpuRegister dst) argument 2185 bswapl(CpuRegister dst) argument 2192 bswapq(CpuRegister dst) argument 2199 bsfl(CpuRegister dst, CpuRegister src) argument 2207 bsfl(CpuRegister dst, const Address& src) argument 2215 bsfq(CpuRegister dst, CpuRegister src) argument 2223 bsfq(CpuRegister dst, const Address& src) argument 2231 bsrl(CpuRegister dst, CpuRegister src) argument 2239 bsrl(CpuRegister dst, const Address& src) argument 2247 bsrq(CpuRegister dst, CpuRegister src) argument 2255 bsrq(CpuRegister dst, const Address& src) argument 2263 popcntl(CpuRegister dst, CpuRegister src) argument 2272 popcntl(CpuRegister dst, const Address& src) argument 2281 popcntq(CpuRegister dst, CpuRegister src) argument 2290 popcntq(CpuRegister dst, const Address& src) argument 2330 LoadDoubleConstant(XmmRegister dst, double value) argument 2526 EmitOptionalRex32(CpuRegister dst, CpuRegister src) argument 2530 EmitOptionalRex32(XmmRegister dst, XmmRegister src) argument 2534 EmitOptionalRex32(CpuRegister dst, XmmRegister src) argument 2538 EmitOptionalRex32(XmmRegister dst, CpuRegister src) argument 2549 EmitOptionalRex32(CpuRegister dst, const Operand& operand) argument 2559 EmitOptionalRex32(XmmRegister dst, const Operand& operand) argument 2583 EmitRex64(CpuRegister dst, CpuRegister src) argument 2587 EmitRex64(XmmRegister dst, CpuRegister src) argument 2591 EmitRex64(CpuRegister dst, XmmRegister src) argument 2595 EmitRex64(CpuRegister dst, const Operand& operand) argument 2603 EmitRex64(XmmRegister dst, const Operand& operand) argument 2611 EmitOptionalByteRegNormalizingRex32(CpuRegister dst, CpuRegister src) argument 2617 EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand) argument [all...] |
/art/compiler/utils/x86/ |
H A D | assembler_x86.h | 325 void movl(Register dst, const Immediate& src); 326 void movl(Register dst, Register src); 328 void movl(Register dst, const Address& src); 329 void movl(const Address& dst, Register src); 330 void movl(const Address& dst, const Immediate& imm); 331 void movl(const Address& dst, Label* lbl); 333 void movntl(const Address& dst, Register src); 335 void bswapl(Register dst); 337 void bsfl(Register dst, Register src); 338 void bsfl(Register dst, cons [all...] |
H A D | assembler_x86.cc | 106 void X86Assembler::movl(Register dst, const Immediate& imm) { argument 108 EmitUint8(0xB8 + dst); 113 void X86Assembler::movl(Register dst, Register src) { argument 116 EmitRegisterOperand(src, dst); 120 void X86Assembler::movl(Register dst, const Address& src) { argument 123 EmitOperand(dst, src); 127 void X86Assembler::movl(const Address& dst, Register src) { argument 130 EmitOperand(src, dst); 134 void X86Assembler::movl(const Address& dst, const Immediate& imm) { argument 137 EmitOperand(0, dst); 141 movl(const Address& dst, Label* lbl) argument 148 movntl(const Address& dst, Register src) argument 155 bswapl(Register dst) argument 161 bsfl(Register dst, Register src) argument 168 bsfl(Register dst, const Address& src) argument 175 bsrl(Register dst, Register src) argument 182 bsrl(Register dst, const Address& src) argument 189 popcntl(Register dst, Register src) argument 197 popcntl(Register dst, const Address& src) argument 205 movzxb(Register dst, ByteRegister src) argument 213 movzxb(Register dst, const Address& src) argument 221 movsxb(Register dst, ByteRegister src) argument 229 movsxb(Register dst, const Address& src) argument 242 movb(const Address& dst, ByteRegister src) argument 249 movb(const Address& dst, const Immediate& imm) argument 258 movzxw(Register dst, Register src) argument 266 movzxw(Register dst, const Address& src) argument 274 movsxw(Register dst, Register src) argument 282 movsxw(Register dst, const Address& src) argument 295 movw(const Address& dst, Register src) argument 303 movw(const Address& dst, const Immediate& imm) argument 314 leal(Register dst, const Address& src) argument 321 cmovl(Condition condition, Register dst, Register src) argument 329 cmovl(Condition condition, Register dst, const Address& src) argument 337 setb(Condition condition, Register dst) argument 345 movaps(XmmRegister dst, XmmRegister src) argument 353 movss(XmmRegister dst, const Address& src) argument 362 movss(const Address& dst, XmmRegister src) argument 371 movss(XmmRegister dst, XmmRegister src) argument 380 movd(XmmRegister dst, Register src) argument 389 movd(Register dst, XmmRegister src) argument 398 addss(XmmRegister dst, XmmRegister src) argument 407 addss(XmmRegister dst, const Address& src) argument 416 subss(XmmRegister dst, XmmRegister src) argument 425 subss(XmmRegister dst, const Address& src) argument 434 mulss(XmmRegister dst, XmmRegister src) argument 443 mulss(XmmRegister dst, const Address& src) argument 452 divss(XmmRegister dst, XmmRegister src) argument 461 divss(XmmRegister dst, const Address& src) argument 477 fsts(const Address& dst) argument 484 fstps(const Address& dst) argument 491 movsd(XmmRegister dst, const Address& src) argument 500 movsd(const Address& dst, XmmRegister src) argument 509 movsd(XmmRegister dst, XmmRegister src) argument 518 movhpd(XmmRegister dst, const Address& src) argument 527 movhpd(const Address& dst, XmmRegister src) argument 560 punpckldq(XmmRegister dst, XmmRegister src) argument 569 addsd(XmmRegister dst, XmmRegister src) argument 578 addsd(XmmRegister dst, const Address& src) argument 587 subsd(XmmRegister dst, XmmRegister src) argument 596 subsd(XmmRegister dst, const Address& src) argument 605 mulsd(XmmRegister dst, XmmRegister src) argument 614 mulsd(XmmRegister dst, const Address& src) argument 623 divsd(XmmRegister dst, XmmRegister src) argument 632 divsd(XmmRegister dst, const Address& src) argument 641 cvtsi2ss(XmmRegister dst, Register src) argument 650 cvtsi2sd(XmmRegister dst, Register src) argument 659 cvtss2si(Register dst, XmmRegister src) argument 668 cvtss2sd(XmmRegister dst, XmmRegister src) argument 677 cvtsd2si(Register dst, XmmRegister src) argument 686 cvttss2si(Register dst, XmmRegister src) argument 695 cvttsd2si(Register dst, XmmRegister src) argument 704 cvtsd2ss(XmmRegister dst, XmmRegister src) argument 713 cvtdq2pd(XmmRegister dst, XmmRegister src) argument 773 roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) argument 784 roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) argument 795 sqrtsd(XmmRegister dst, XmmRegister src) argument 804 sqrtss(XmmRegister dst, XmmRegister src) argument 813 xorpd(XmmRegister dst, const Address& src) argument 822 xorpd(XmmRegister dst, XmmRegister src) argument 831 andps(XmmRegister dst, XmmRegister src) argument 839 andpd(XmmRegister dst, XmmRegister src) argument 848 orpd(XmmRegister dst, XmmRegister src) argument 857 xorps(XmmRegister dst, const Address& src) argument 865 orps(XmmRegister dst, XmmRegister src) argument 873 xorps(XmmRegister dst, XmmRegister src) argument 881 andps(XmmRegister dst, const Address& src) argument 889 andpd(XmmRegister dst, const Address& src) argument 905 fstl(const Address& dst) argument 912 fstpl(const Address& dst) argument 927 fnstcw(const Address& dst) argument 941 fistpl(const Address& dst) argument 948 fistps(const Address& dst) argument 1019 xchgl(Register dst, Register src) argument 1060 addl(Register dst, Register src) argument 1126 andl(Register dst, Register src) argument 1140 andl(Register dst, const Immediate& imm) argument 1146 orl(Register dst, Register src) argument 1160 orl(Register dst, const Immediate& imm) argument 1166 xorl(Register dst, Register src) argument 1180 xorl(Register dst, const Immediate& imm) argument 1211 adcl(Register dst, Register src) argument 1218 adcl(Register dst, const Address& address) argument 1225 subl(Register dst, Register src) argument 1265 imull(Register dst, Register src) argument 1273 imull(Register dst, Register src, const Immediate& imm) argument 1332 sbbl(Register dst, Register src) argument 1345 sbbl(Register dst, const Address& address) argument 1445 shld(Register dst, Register src, Register shifter) argument 1454 shld(Register dst, Register src, const Immediate& imm) argument 1463 shrd(Register dst, Register src, Register shifter) argument 1472 shrd(Register dst, Register src, const Immediate& imm) argument 1763 LoadLongConstant(XmmRegister dst, int64_t value) argument 1772 LoadDoubleConstant(XmmRegister dst, double value) argument [all...] |
/art/runtime/ |
H A D | monitor_android.cc | 37 static char* EventLogWriteInt(char* dst, int value) { argument 38 *dst++ = EVENT_TYPE_INT; 39 Set4LE(reinterpret_cast<uint8_t*>(dst), value); 40 return dst + 4; 43 static char* EventLogWriteString(char* dst, const char* value, size_t len) { argument 44 *dst++ = EVENT_TYPE_STRING; 46 Set4LE(reinterpret_cast<uint8_t*>(dst), len); 47 dst += 4; 48 memcpy(dst, value, len); 49 return dst [all...] |
H A D | reflection-inl.h | 33 const JValue& src, JValue* dst) { 36 dst->SetJ(src.GetJ()); 47 dst->SetS(src.GetI()); 54 dst->SetI(src.GetI()); 61 dst->SetJ(src.GetI()); 68 dst->SetF(src.GetI()); 71 dst->SetF(src.GetJ()); 78 dst->SetD(src.GetI()); 81 dst->SetD(src.GetJ()); 84 dst 31 ConvertPrimitiveValue(bool unbox_for_result, Primitive::Type srcType, Primitive::Type dstType, const JValue& src, JValue* dst) argument [all...] |
H A D | dex2oat_environment_test.h | 108 static void Copy(const std::string& src, const std::string& dst) { argument 110 std::ofstream dst_stream(dst, std::ios::binary);
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H A D | reflection.h | 45 const JValue& src, JValue* dst)
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/art/runtime/jdwp/ |
H A D | jdwp_bits.h | 100 static inline void Write1BE(uint8_t** dst, uint8_t value) { argument 101 Set1(*dst, value); 102 *dst += sizeof(value); 105 static inline void Write2BE(uint8_t** dst, uint16_t value) { argument 106 Set2BE(*dst, value); 107 *dst += sizeof(value); 110 static inline void Write4BE(uint8_t** dst, uint32_t value) { argument 111 Set4BE(*dst, value); 112 *dst += sizeof(value); 115 static inline void Write8BE(uint8_t** dst, uint64_ argument [all...] |
/art/test/020-string/src/ |
H A D | Main.java | 124 char[] dst = new char[7]; 135 src.getChars(-1, 9, dst, 0); 142 src.getChars(2, 19, dst, 0); 149 src.getChars(2, 1, dst, 0); 156 src.getChars(2, 10, dst, 0); 162 src.getChars(2, 9, dst, 0); 163 System.out.println(new String(dst));
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/art/compiler/utils/arm/ |
H A D | assembler_arm.cc | 539 ArmManagedRegister dst = mdest.AsArm(); 540 CHECK(dst.IsCoreRegister() && dst.IsCoreRegister()) << dst; 541 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), 544 MaybeUnpoisonHeapReference(dst.AsCoreRegister()); 549 ArmManagedRegister dst = mdest.AsArm(); 550 CHECK(dst.IsCoreRegister()) << dst; 551 LoadFromOffset(kLoadWord, dst [all...] |
/art/test/201-built-in-exception-detail-messages/src/ |
H A D | Main.java | 136 Integer[] dst = new Integer[10]; 137 System.arraycopy(src, 1, dst, 0, 5); 145 int[] dst = new int[1]; 146 System.arraycopy(src, 0, dst, 0, 1); 148 assertEquals("Incompatible types: src=java.lang.String[], dst=int[]", ex.getMessage()); 153 Runnable[] dst = new Runnable[1]; 154 System.arraycopy(src, 0, dst, 0, 1); 156 assertEquals("Incompatible types: src=float[], dst=java.lang.Runnable[]", ex.getMessage()); 161 double[][] dst = new double[1][]; 162 System.arraycopy(src, 0, dst, [all...] |
/art/runtime/native/ |
H A D | libcore_util_CharsetUtils.cc | 122 jchar* dst = &chars[0]; local 126 *dst++ = (ch <= 0x7f) ? ch : REPLACEMENT_CHAR; 142 jchar* dst = &chars[0]; local 144 *dst++ = static_cast<jchar>(*src++ & 0xff); 169 jbyte* dst = &bytes[0]; local 175 *dst++ = static_cast<jbyte>(ch);
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H A D | sun_misc_Unsafe.cc | 291 jlong dst, jlong size) { 301 memcpy(reinterpret_cast<void *>(dst), reinterpret_cast<void *>(src), sz); 322 T* dst = reinterpret_cast<T*>(dstAddr); local 326 *(dst + i) = array->Get(i + of); 346 mirror::Object* dst = soa.Decode<mirror::Object*>(dstObj); local 347 mirror::Class* component_type = dst->GetClass()->GetComponentType(); 349 copyToArray(srcAddr, dst->AsByteSizedArray(), dst_offset, sz); 351 copyToArray(srcAddr, dst->AsShortSizedArray(), dst_offset, sz); 353 copyToArray(srcAddr, dst->AsIntArray(), dst_offset, sz); 355 copyToArray(srcAddr, dst 290 Unsafe_copyMemory(JNIEnv *env, jobject unsafe ATTRIBUTE_UNUSED, jlong src, jlong dst, jlong size) argument [all...] |
/art/compiler/optimizing/ |
H A D | code_generator_mips64.cc | 1066 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 1081 __ Andi(dst, lhs, rhs_imm); 1083 __ And(dst, lhs, rhs_reg); 1086 __ Ori(dst, lhs, rhs_imm); 1088 __ Or(dst, lhs, rhs_reg); 1091 __ Xori(dst, lhs, rhs_imm); 1093 __ Xor(dst, lhs, rhs_reg); 1097 __ Addiu(dst, lhs, rhs_imm); 1099 __ Addu(dst, lhs, rhs_reg); 1102 __ Daddiu(dst, lh 1124 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 1173 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 1810 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 2125 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 2244 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 2760 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 2764 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 3351 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 3362 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 3404 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 3414 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 3494 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 3869 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 3910 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 3929 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 4013 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local [all...] |
H A D | code_generator_mips.cc | 807 void CodeGeneratorMIPS::MoveLocation(Location dst, Location src, Primitive::Type dst_type) { argument 808 if (src.Equals(dst)) { 813 MoveConstant(dst, src.GetConstant()); 816 Move64(dst, src); 818 Move32(dst, src); 883 FRegister dst = destination.AsFpuRegister<FRegister>(); local 886 __ Mtc1(src_low, dst); 887 __ MoveToFpuHigh(src_high, dst); 916 Register dst = destination.AsRegister<Register>(); local 917 __ LoadConst32(dst, valu 962 Register dst = destination.AsRegister<Register>(); local 1190 Register dst = locations->Out().AsRegister<Register>(); local 1376 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 1441 Register dst = locations->Out().AsRegister<Register>(); local 2224 Register dst = locations->Out().AsRegister<Register>(); local 2482 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 2620 Register dst = locations->Out().AsRegister<Register>(); local 3475 Register dst; local 3496 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 4133 Register dst = locations->Out().AsRegister<Register>(); local 4183 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 4225 Register dst = locations->Out().AsRegister<Register>(); local 4243 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 4329 Register dst = locations->Out().AsRegister<Register>(); local 4771 Register dst = locations->Out().AsRegister<Register>(); local 4811 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 4837 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 4934 Register dst = locations->Out().AsRegister<Register>(); local 5009 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local [all...] |
H A D | code_generator_arm64.cc | 1215 CPURegister dst = CPURegisterFrom(destination, dst_type); local 1217 DCHECK(dst.Is64Bits() == source.IsDoubleStackSlot()); 1218 __ Ldr(dst, StackOperandFrom(source)); 1221 MoveConstant(dst, source.GetConstant()); 1224 __ Mov(Register(dst), RegisterFrom(source, dst_type)); 1241 __ Fmov(FPRegister(dst), FPRegisterFrom(source, dst_type)); 1288 CPURegister dst, 1292 __ Ldrb(Register(dst), src); 1295 __ Ldrsb(Register(dst), src); 1298 __ Ldrsh(Register(dst), sr 1287 Load(Primitive::Type type, CPURegister dst, const MemOperand& src) argument 1316 LoadAcquire(HInstruction* instruction, CPURegister dst, const MemOperand& src, bool needs_null_check) argument 1386 Store(Primitive::Type type, CPURegister src, const MemOperand& dst) argument 1392 __ Strb(Register(src), dst); local 1396 __ Strh(Register(src), dst); local 1411 StoreRelease(Primitive::Type type, CPURegister src, const MemOperand& dst) argument 1728 Register dst = OutputRegister(instr); local 1758 FPRegister dst = OutputFPRegister(instr); local 1800 Register dst = OutputRegister(instr); local 1857 Register dst = OutputRegister(instr); local [all...] |
/art/compiler/utils/arm64/ |
H A D | assembler_arm64.cc | 293 Arm64ManagedRegister dst = m_dst.AsArm64(); local 294 CHECK(dst.IsXRegister()) << dst; 295 LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), SP, offs.Int32Value()); 300 Arm64ManagedRegister dst = m_dst.AsArm64(); local 302 CHECK(dst.IsXRegister() && base.IsXRegister()); 303 LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), base.AsXRegister(), 306 WRegister ref_reg = dst.AsOverlappingWRegister(); 312 Arm64ManagedRegister dst = m_dst.AsArm64(); local 314 CHECK(dst 322 Arm64ManagedRegister dst = m_dst.AsArm64(); local 329 Arm64ManagedRegister dst = m_dst.AsArm64(); local [all...] |
/art/runtime/interpreter/mterp/mips/ |
H A D | header.S | 328 #define SET_VREG_GOTO(rd, rix, dst) .set noreorder; \ 329 sll dst, dst, ${handler_size_bits}; \ 330 addu dst, rIBASE, dst; \ 337 jalr zero, dst; \ 342 #define SET_VREG64_GOTO(rlo, rhi, rix, dst) .set noreorder; \ 343 sll dst, dst, ${handler_size_bits}; \ 344 addu dst, rIBAS [all...] |
/art/compiler/debug/ |
H A D | elf_gnu_debugdata_writer.h | 34 static void XzCompress(const std::vector<uint8_t>* src, std::vector<uint8_t>* dst) { argument 73 callbacks.dst_ = dst;
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