Searched refs:SchedClass (Results 1 - 8 of 8) sorted by relevance
/external/llvm/lib/CodeGen/ |
H A D | TargetSchedule.cpp | 105 unsigned SchedClass = MI->getDesc().getSchedClass(); local 106 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass); 116 SchedClass = STI->resolveSchedClass(SchedClass, MI, this); 117 SCDesc = SchedModel.getSchedClassDesc(SchedClass);
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/external/llvm/include/llvm/CodeGen/ |
H A D | ScheduleDAGInstrs.h | 180 if (!SU->SchedClass && SchedModel.hasInstrSchedModel()) 181 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr()); 182 return SU->SchedClass;
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H A D | ScheduleDAG.h | 272 const MCSchedClassDesc *SchedClass; // NULL or resolved SchedClass. variable 326 : Node(node), Instr(nullptr), OrigNode(nullptr), SchedClass(nullptr), 342 : Node(nullptr), Instr(instr), OrigNode(nullptr), SchedClass(nullptr), 357 : Node(nullptr), Instr(nullptr), OrigNode(nullptr), SchedClass(nullptr),
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/external/llvm/include/llvm/Target/ |
H A D | TargetSubtargetInfo.h | 104 /// Resolve a SchedClass at runtime, where SchedClass identifies an 106 /// another variant SchedClass, but repeated invocation must quickly terminate 107 /// in a nonvariant SchedClass. 108 virtual unsigned resolveSchedClass(unsigned SchedClass, argument
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/external/llvm/include/llvm/MC/ |
H A D | MCInstrDesc.h | 144 unsigned short SchedClass; // enum identifying instr sched class member in class:llvm::MCInstrDesc 528 unsigned getSchedClass() const { return SchedClass; }
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCInstrInfo.cpp | 324 int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass(); local 325 return ((II[SchedClass].FirstStage + HexagonStages)->getUnits()); 594 unsigned SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass(); local 595 switch (SchedClass) {
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonInstrInfo.cpp | 1791 unsigned SchedClass = MI->getDesc().getSchedClass(); local 1792 if (SchedClass == Hexagon::Sched::M_tc_3or4x_SLOT23) 2001 unsigned SchedClass = MI->getDesc().getSchedClass(); local 2003 switch (SchedClass) { 2207 unsigned SchedClass = MI->getDesc().getSchedClass(); local 2208 switch (SchedClass) { 2226 unsigned SchedClass = MI->getDesc().getSchedClass(); local 2227 switch (SchedClass) { 2243 unsigned SchedClass = MI->getDesc().getSchedClass(); local 2244 switch (SchedClass) { 2267 unsigned SchedClass = MI->getDesc().getSchedClass(); local [all...] |
/external/llvm/utils/TableGen/ |
H A D | SubtargetEmitter.cpp | 36 // Each processor has a SchedClassDesc table with an entry for each SchedClass. 811 // Generate the SchedClass table for this processor and update global 834 // A Variant SchedClass has no resources of its own. 855 // Determine if the SchedClass is actually reachable on this processor. If 973 // Create an entry for each operand Read in this SchedClass. 1011 // Add the information for this SchedClass to the global tables using basic 1069 // Emit SchedClass tables for all processors and associated global tables. 1121 // Emit a SchedClass table for each processor. 1145 const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx); local 1146 OS << " {DBGFIELD(\"" << SchedClass [all...] |
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