1%default {"preinstr":"", "result":"w0", "chkzero":"0"}
2    /*
3     * Generic 32-bit "lit16" binary operation.  Provide an "instr" line
4     * that specifies an instruction that performs "result = w0 op w1".
5     * This could be an ARM instruction or a function call.  (If the result
6     * comes back in a register other than w0, you can override "result".)
7     *
8     * If "chkzero" is set to 1, we perform a divide-by-zero check on
9     * vCC (w1).  Useful for integer division and modulus.
10     *
11     * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
12     *      rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
13     */
14    /* binop/lit16 vA, vB, #+CCCC */
15    FETCH_S w1, 1                       // w1<- ssssCCCC (sign-extended)
16    lsr     w2, wINST, #12              // w2<- B
17    ubfx    w9, wINST, #8, #4           // w9<- A
18    GET_VREG w0, w2                     // w0<- vB
19    .if $chkzero
20    cbz     w1, common_errDivideByZero
21    .endif
22    FETCH_ADVANCE_INST 2                // advance rPC, load rINST
23    $preinstr
24    $instr                              // $result<- op, w0-w3 changed
25    GET_INST_OPCODE ip                  // extract opcode from rINST
26    SET_VREG $result, w9                // vAA<- $result
27    GOTO_OPCODE ip                      // jump to next instruction
28    /* 10-13 instructions */
29