1/* $OpenBSD: asm.h,v 1.7 2004/10/20 12:49:15 pefo Exp $ */ 2 3/* 4 * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com) 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 16 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 19 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28#ifndef _MIPS64_ASM_H 29#define _MIPS64_ASM_H 30 31#define __bionic_asm_align 4 32 33#undef __bionic_asm_custom_entry 34#undef __bionic_asm_custom_end 35#define __bionic_asm_custom_entry(f) .ent f 36#define __bionic_asm_custom_end(f) .end f 37 38#include <machine/regdef.h> 39 40#define _MIPS_ISA_MIPS1 1 /* R2000/R3000 */ 41#define _MIPS_ISA_MIPS2 2 /* R4000/R6000 */ 42#define _MIPS_ISA_MIPS3 3 /* R4000 */ 43#define _MIPS_ISA_MIPS4 4 /* TFP (R1x000) */ 44#define _MIPS_ISA_MIPS5 5 45#define _MIPS_ISA_MIPS32 6 46#define _MIPS_ISA_MIPS64 7 47 48#if !defined(ABICALLS) && !defined(_NO_ABICALLS) 49#define ABICALLS .abicalls 50#endif 51 52#if defined(ABICALLS) && !defined(_KERNEL) 53 ABICALLS 54#endif 55 56#if !defined(__MIPSEL__) && !defined(__MIPSEB__) 57#error "__MIPSEL__ or __MIPSEB__ must be defined" 58#endif 59/* 60 * Define how to access unaligned data word 61 */ 62#if defined(__MIPSEL__) 63#define LWLO lwl 64#define LWHI lwr 65#define SWLO swl 66#define SWHI swr 67#define LDLO ldl 68#define LDHI ldr 69#define SDLO sdl 70#define SDHI sdr 71#endif 72#if defined(__MIPSEB__) 73#define LWLO lwr 74#define LWHI lwl 75#define SWLO swr 76#define SWHI swl 77#define LDLO ldr 78#define LDHI ldl 79#define SDLO sdr 80#define SDHI sdl 81#endif 82 83/* 84 * Define programming environment for ABI. 85 */ 86#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE) 87 88#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32) 89#define NARGSAVE 4 90 91#define SETUP_GP \ 92 .set noreorder; \ 93 .cpload t9; \ 94 .set reorder; 95 96#define SAVE_GP(x) \ 97 .cprestore x 98 99#define SETUP_GP64(gpoff, name) 100#define RESTORE_GP64 101#endif 102 103#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32) 104#define NARGSAVE 0 105 106#define SETUP_GP 107#define SAVE_GP(x) 108#define SETUP_GP64(gpoff, name) \ 109 .cpsetup t9, gpoff, name 110#define RESTORE_GP64 \ 111 .cpreturn 112#endif 113 114#define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31)) 115 116#else /* defined(ABICALLS) && !defined(_KERNEL) */ 117 118#define NARGSAVE 4 119#define SETUP_GP 120#define SAVE_GP(x) 121 122#define ALIGNSZ 16 /* Stack layout alignment */ 123#define FRAMESZ(sz) (((sz) + (ALIGNSZ-1)) & ~(ALIGNSZ-1)) 124 125#endif 126 127/* 128 * Basic register operations based on selected ISA 129 */ 130#if (_MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS32) 131#define REGSZ 4 /* 32 bit mode register size */ 132#define LOGREGSZ 2 /* log rsize */ 133#define REG_S sw 134#define REG_L lw 135#define CF_SZ 24 /* Call frame size */ 136#define CF_ARGSZ 16 /* Call frame arg size */ 137#define CF_RA_OFFS 20 /* Call ra save offset */ 138#endif 139 140#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64) 141#define REGSZ 8 /* 64 bit mode register size */ 142#define LOGREGSZ 3 /* log rsize */ 143#define REG_S sd 144#define REG_L ld 145#define CF_SZ 48 /* Call frame size (multiple of ALIGNSZ) */ 146#define CF_ARGSZ 32 /* Call frame arg size */ 147#define CF_RA_OFFS 40 /* Call ra save offset */ 148#endif 149 150#define REGSZ_FP 8 /* 64 bit FP register size */ 151 152#ifndef __LP64__ 153#define PTR_L lw 154#define PTR_S sw 155#define PTR_SUB sub 156#define PTR_ADD add 157#define PTR_SUBU subu 158#define PTR_ADDU addu 159#define LI li 160#define LA la 161#define PTR_SLL sll 162#define PTR_SRL srl 163#define PTR_VAL .word 164#else 165#define PTR_L ld 166#define PTR_S sd 167#define PTR_ADD dadd 168#define PTR_SUB dsub 169#define PTR_SUBU dsubu 170#define PTR_ADDU daddu 171#define LI dli 172#define LA dla 173#define PTR_SLL dsll 174#define PTR_SRL dsrl 175#define PTR_VAL .dword 176#endif 177 178/* 179 * LEAF(x, fsize) 180 * 181 * Declare a leaf routine. 182 */ 183#define LEAF(x, fsize) \ 184 .align 3; \ 185 .globl x; \ 186 .ent x, 0; \ 187x: ; \ 188 .cfi_startproc; \ 189 .frame sp, fsize, ra; \ 190 SETUP_GP \ 191 192/* 193 * NON_LEAF(x) 194 * 195 * Declare a non-leaf routine (a routine that makes other C calls). 196 */ 197#define NON_LEAF(x, fsize, retpc) \ 198 .align 3; \ 199 .globl x; \ 200 .ent x, 0; \ 201x: ; \ 202 .cfi_startproc; \ 203 .frame sp, fsize, retpc; \ 204 SETUP_GP \ 205 206#endif /* !_MIPS_ASM_H */ 207