X86RegisterInfo.cpp revision 14be64018fb38d1fa535b9cd12d11371f4eba3b5 
1//===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the X86 implementation of the MRegisterInfo class.  This
11// file is responsible for the frame pointer elimination optimization on X86.
12//
13//===----------------------------------------------------------------------===//
14
15#include "X86.h"
16#include "X86RegisterInfo.h"
17#include "X86InstrBuilder.h"
18#include "llvm/Constants.h"
19#include "llvm/Type.h"
20#include "llvm/CodeGen/ValueTypes.h"
21#include "llvm/CodeGen/MachineInstrBuilder.h"
22#include "llvm/CodeGen/MachineFunction.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/Target/TargetMachine.h"
25#include "llvm/Target/TargetFrameInfo.h"
26#include "Support/CommandLine.h"
27
28namespace llvm {
29
30namespace {
31  cl::opt<bool>
32  NoFPElim("disable-fp-elim",
33	   cl::desc("Disable frame pointer elimination optimization"));
34}
35
36X86RegisterInfo::X86RegisterInfo()
37  : X86GenRegisterInfo(X86::ADJCALLSTACKDOWN, X86::ADJCALLSTACKUP) {}
38
39static unsigned getIdx(const TargetRegisterClass *RC) {
40  switch (RC->getSize()) {
41  default: assert(0 && "Invalid data size!");
42  case 1:  return 0;
43  case 2:  return 1;
44  case 4:  return 2;
45  case 10: return 3;
46  }
47}
48
49int X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
50                                         MachineBasicBlock::iterator &MBBI,
51                                         unsigned SrcReg, int FrameIdx,
52                                         const TargetRegisterClass *RC) const {
53  static const unsigned Opcode[] =
54    { X86::MOVrm8, X86::MOVrm16, X86::MOVrm32, X86::FSTPr80 };
55  MachineInstr *MI = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5),
56				       FrameIdx).addReg(SrcReg);
57  MBBI = MBB.insert(MBBI, MI)+1;
58  return 1;
59}
60
61int X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
62                                          MachineBasicBlock::iterator &MBBI,
63                                          unsigned DestReg, int FrameIdx,
64                                          const TargetRegisterClass *RC) const{
65  static const unsigned Opcode[] =
66    { X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FLDr80 };
67  MachineInstr *MI = addFrameReference(BuildMI(Opcode[getIdx(RC)], 4, DestReg),
68				       FrameIdx);
69  MBBI = MBB.insert(MBBI, MI)+1;
70  return 1;
71}
72
73int X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
74                                  MachineBasicBlock::iterator &MBBI,
75                                  unsigned DestReg, unsigned SrcReg,
76                                  const TargetRegisterClass *RC) const {
77  static const unsigned Opcode[] =
78    { X86::MOVrr8, X86::MOVrr16, X86::MOVrr32, X86::FpMOV };
79  MachineInstr *MI = BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg);
80  MBBI = MBB.insert(MBBI, MI)+1;
81  return 1;
82}
83
84//===----------------------------------------------------------------------===//
85// Stack Frame Processing methods
86//===----------------------------------------------------------------------===//
87
88// hasFP - Return true if the specified function should have a dedicated frame
89// pointer register.  This is true if the function has variable sized allocas or
90// if frame pointer elimination is disabled.
91//
92static bool hasFP(MachineFunction &MF) {
93  return NoFPElim || MF.getFrameInfo()->hasVarSizedObjects();
94}
95
96int X86RegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF,
97                                                   MachineBasicBlock &MBB,
98	                                 MachineBasicBlock::iterator &I) const {
99  MachineInstr *New = 0, *Old = *I;;
100  if (hasFP(MF)) {
101    // If we have a frame pointer, turn the adjcallstackup instruction into a
102    // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
103    // <amt>'
104    unsigned Amount = Old->getOperand(0).getImmedValue();
105    if (Amount != 0) {
106      // We need to keep the stack aligned properly.  To do this, we round the
107      // amount of space needed for the outgoing arguments up to the next
108      // alignment boundary.
109      unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
110      Amount = (Amount+Align-1)/Align*Align;
111
112      if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
113	New=BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(Amount);
114      } else {
115	assert(Old->getOpcode() == X86::ADJCALLSTACKUP);
116	New=BuildMI(X86::ADDri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(Amount);
117      }
118    }
119  }
120
121  if (New) {
122    *I = New;        // Replace the pseudo instruction with a new instruction...
123    delete Old;
124    return 0;
125  } else {
126    I = MBB.erase(I);// Just delete the pseudo instruction...
127    delete Old;
128    return -1;
129  }
130}
131
132int X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
133                                        MachineBasicBlock::iterator &II) const {
134  unsigned i = 0;
135  MachineInstr &MI = **II;
136  while (!MI.getOperand(i).isFrameIndex()) {
137    ++i;
138    assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
139  }
140
141  int FrameIndex = MI.getOperand(i).getFrameIndex();
142
143  // This must be part of a four operand memory reference.  Replace the
144  // FrameIndex with base register with EBP.  Add add an offset to the offset.
145  MI.SetMachineOperandReg(i, hasFP(MF) ? X86::EBP : X86::ESP);
146
147  // Now add the frame object offset to the offset from EBP.
148  int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
149               MI.getOperand(i+3).getImmedValue()+4;
150
151  if (!hasFP(MF))
152    Offset += MF.getFrameInfo()->getStackSize();
153
154  MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
155  return 0;
156}
157
158int X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
159  const {
160  if (hasFP(MF)) {
161    // Create a frame entry for the EBP register that must be saved.
162    int FrameIdx = MF.getFrameInfo()->CreateStackObject(4, 4);
163    assert(FrameIdx == MF.getFrameInfo()->getObjectIndexEnd()-1 &&
164	   "Slot for EBP register must be last in order to be found!");
165  }
166  return 0;
167}
168
169int X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
170  MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
171  MachineBasicBlock::iterator MBBI = MBB.begin();
172  MachineFrameInfo *MFI = MF.getFrameInfo();
173  MachineInstr *MI;
174
175  unsigned oldSize = MBB.size();
176  // Get the number of bytes to allocate from the FrameInfo
177  unsigned NumBytes = MFI->getStackSize();
178  if (hasFP(MF)) {
179    // Get the offset of the stack slot for the EBP register... which is
180    // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
181    int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
182
183    if (NumBytes) {   // adjust stack pointer: ESP -= numbytes
184      MI= BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
185      MBBI = MBB.insert(MBBI, MI)+1;
186    }
187
188    // Save EBP into the appropriate stack slot...
189    MI = addRegOffset(BuildMI(X86::MOVrm32, 5),    // mov [ESP-<offset>], EBP
190		      X86::ESP, EBPOffset+NumBytes).addReg(X86::EBP);
191    MBBI = MBB.insert(MBBI, MI)+1;
192
193    // Update EBP with the new base value...
194    if (NumBytes == 0)    // mov EBP, ESP
195      MI = BuildMI(X86::MOVrr32, 2, X86::EBP).addReg(X86::ESP);
196    else                  // lea EBP, [ESP+StackSize]
197      MI = addRegOffset(BuildMI(X86::LEAr32, 5, X86::EBP), X86::ESP, NumBytes);
198
199    MBBI = MBB.insert(MBBI, MI)+1;
200
201  } else {
202    // When we have no frame pointer, we reserve argument space for call sites
203    // in the function immediately on entry to the current function.  This
204    // eliminates the need for add/sub ESP brackets around call sites.
205    //
206    NumBytes += MFI->getMaxCallFrameSize();
207
208    // Round the size to a multiple of the alignment (don't forget the 4 byte
209    // offset though).
210    unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
211    NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
212
213    // Update frame info to pretend that this is part of the stack...
214    MFI->setStackSize(NumBytes);
215
216    if (NumBytes) {
217      // adjust stack pointer: ESP -= numbytes
218      MI= BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
219      MBB.insert(MBBI, MI);
220    }
221  }
222  return MBB.size() - oldSize;
223}
224
225int X86RegisterInfo::emitEpilogue(MachineFunction &MF,
226                                  MachineBasicBlock &MBB) const {
227  unsigned oldSize = MBB.size();
228  const MachineFrameInfo *MFI = MF.getFrameInfo();
229  MachineBasicBlock::iterator MBBI = MBB.end()-1;
230  MachineInstr *MI;
231  assert((*MBBI)->getOpcode() == X86::RET &&
232         "Can only insert epilog into returning blocks");
233
234  if (hasFP(MF)) {
235    // Get the offset of the stack slot for the EBP register... which is
236    // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
237    int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
238
239    // mov ESP, EBP
240    MI = BuildMI(X86::MOVrr32, 1,X86::ESP).addReg(X86::EBP);
241    MBBI = 1+MBB.insert(MBBI, MI);
242
243    // mov EBP, [ESP-<offset>]
244    MI = addRegOffset(BuildMI(X86::MOVmr32, 5, X86::EBP), X86::ESP, EBPOffset);
245    MBBI = 1+MBB.insert(MBBI, MI);
246  } else {
247    // Get the number of bytes allocated from the FrameInfo...
248    unsigned NumBytes = MFI->getStackSize();
249
250    if (NumBytes) {    // adjust stack pointer back: ESP += numbytes
251      MI =BuildMI(X86::ADDri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
252      MBBI = 1+MBB.insert(MBBI, MI);
253    }
254  }
255  return MBB.size() - oldSize;
256}
257
258} // End llvm namespace
259
260#include "X86GenRegisterInfo.inc"
261
262namespace llvm {
263
264const TargetRegisterClass*
265X86RegisterInfo::getRegClassForType(const Type* Ty) const {
266  switch (Ty->getPrimitiveID()) {
267  case Type::LongTyID:
268  case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
269  default:              assert(0 && "Invalid type to getClass!");
270  case Type::BoolTyID:
271  case Type::SByteTyID:
272  case Type::UByteTyID:   return &R8Instance;
273  case Type::ShortTyID:
274  case Type::UShortTyID:  return &R16Instance;
275  case Type::IntTyID:
276  case Type::UIntTyID:
277  case Type::PointerTyID: return &R32Instance;
278
279  case Type::FloatTyID:
280  case Type::DoubleTyID: return &RFPInstance;
281  }
282}
283
284} // End llvm namespace
285