History log of /external/llvm/lib/Target/X86/X86RegisterInfo.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
cddc3e03e4ec99c0268c03a126195173e519ed58 04-Mar-2016 Pirama Arumuga Nainar <pirama@google.com> Update aosp/master LLVM for rebase to r256229

http://b/26987366

(cherry picked from commit f3ef5332fa3f4d5ec72c178a2b19dac363a19383)

Change-Id: Ic75dcb63191d65df1b69724576392c0aaeb47728
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6948897e478cbd66626159776a8017b3c18579b9 01-Jul-2015 Pirama Arumuga Nainar <pirama@google.com> Update aosp/master LLVM for rebase to r239765

Bug: 20140355: This rebase pulls the upstream fix for the spurious
warnings mentioned in the bug.

Change-Id: I7fd24253c50f4d48d900875dcf43ce3f1721a3da
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4c5e43da7792f75567b693105cc53e3f1992ad98 08-Apr-2015 Pirama Arumuga Nainar <pirama@google.com> Update aosp/master llvm for rebase to r233350

Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ebe69fe11e48d322045d5949c83283927a0d790b 23-Mar-2015 Stephen Hines <srhines@google.com> Update aosp/master LLVM for rebase to r230699.

Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
37ed9c199ca639565f6ce88105f9e39e898d82d0 01-Dec-2014 Stephen Hines <srhines@google.com> Update aosp/master LLVM for rebase to r222494.

Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c6a4f5e819217e1e12c458aed8e7b122e23a3a58 21-Jul-2014 Stephen Hines <srhines@google.com> Update LLVM for rebase to r212749.

Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls

Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0ccb37a7339883e1fd090beadc2deb1ce40ea7d4 16-Nov-2013 Juergen Ributzka <juergen@apple.com> The WebKit_JS CC preserves the same registers as the C CC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
623d2e618f4e672c47edff9ec63ed6d733ac81d3 09-Nov-2013 Juergen Ributzka <juergen@apple.com> [Stackmap] Add AnyReg calling convention support for patchpoint intrinsic.

The idea of the AnyReg Calling Convention is to provide the call arguments in
registers, but not to force them to be placed in a paticular order into a
specified set of registers. Instead it is up tp the register allocator to assign
any register as it sees fit. The same applies to the return value (if
applicable).

Differential Revision: http://llvm-reviews.chandlerc.com/D2009

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194293 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a6a9ac5aa1092067e6e1546226d8bdd6a4bfcf99 15-Oct-2013 Andrew Trick <atrick@apple.com> Fix the ExecutionDepsFix pass to handle AVX instructions.

This pass is needed to break false dependencies. Without it, unlucky
register assignment can result in wild (5x) swings in
performance. This pass was trying to handle AVX but not getting it
right. AVX doesn't have partial register defs, it has unused register
reads in which the high bits of a source operand are copied into the
unused bits of the dest.

Fixing this requires conservative liveness analysis. This is awkard
because the pass already has its own pseudo-liveness. However, proper
liveness is expensive, and we would like to use a generic utility to
compute it. The fix only invokes liveness on-demand. It is rare to
detect a case that needs undef-read dependence breaking, but when it
happens, it can be needed many times within a very large block.

I think the existing heuristic which uses a register window of 16 is
too conservative for loop-carried false dependencies. If the loop is a
reduction. The out-of-order engine may be able to execute several loop
iterations in parallel. However, I'll leave this tuning exercise for
next time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ef8c4ca252f1289ca8d0a1e6cfd96ca17fe3c5a8 07-Oct-2013 Rafael Espindola <rafael.espindola@gmail.com> Remove getEHExceptionRegister and getEHHandlerRegister.

They haven't been used for a long time. Patch by MathOnNapkins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192099 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
61fc8d670f1e991804c2ab753e567981e60962cb 01-Aug-2013 Bill Wendling <isanbard@gmail.com> Use function attributes to indicate that we don't want to realign the stack.

Function attributes are the future! So just query whether we want to realign the
stack directly from the function instead of through a random target options
structure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187618 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c18f4efc5dd24adcc653806455fc7ae8508e9c66 28-Jul-2013 Elena Demikhovsky <elena.demikhovsky@intel.com> Added encoding prefixes for KNL instructions (EVEX).
Added 512-bit operands printing.
Added instruction formats for KNL instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b3053c528a570d20a4562e00dbecd1947f4848e7 26-Jul-2013 Craig Topper <craig.topper@gmail.com> Take advantage of the register enums being in order to remove a couple static tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187182 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e3809eed34f000581a464689596eefde2a6d1f24 24-Jul-2013 Elena Demikhovsky <elena.demikhovsky@intel.com> I'm starting to commit KNL backend. I'll push patches one-by-one. This patch includes support for the extended register set XMM16-31, YMM16-31, ZMM0-31.
The full ISA you can see here: http://software.intel.com/en-us/intel-isa-extensions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187030 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a5e5ba611f787f518fd3f7349343f8c4ae863fc2 07-Jun-2013 Bill Wendling <isanbard@gmail.com> Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183571 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8ed5506e854ed1e98b6547a976719a867a968106 29-May-2013 Chad Rosier <mcrosier@apple.com> Don't assume the registers will be enumerated sequentially.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
62c320a755ac27ac2b7f64e927892249e0f486e0 23-May-2013 Chad Rosier <mcrosier@apple.com> Simplify logic now that r182490 is in place. No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182531 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c4952bfc31ee437590eeba8f16800fda5e4d607e 22-Feb-2013 Peter Collingbourne <peter@pcc.me.uk> x86_64: designate most general purpose and SSE registers as callee save under coldcc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175911 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
700ed80d3da5e98e05ceb90e9bfb66058581a6db 21-Feb-2013 Eli Bendersky <eliben@google.com> Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
to TargetFrameLowering, where it belongs. Incidentally, this allows us
to delete some duplicated (and slightly different!) code in TRI.

There are potentially other layering problems that can be cleaned up
as a result, or in a similar manner.

The refactoring was OK'd by Anton Korobeynikov on llvmdev.

Note: this touches the target interfaces, so out-of-tree targets may
be affected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8389f24a66674e5776399f744fa8def3b217bc9e 21-Feb-2013 Eli Bendersky <eliben@google.com> getX86SubSuperRegister has a special mode with High=true for i64 which
exists solely to enable it to call itself for i8 with some registers.
The proposed patch simplifies the function somewhat to make the High
bit only meaningful for the i8 mode, which makes sense. No functional
difference (getX86SubSuperRegister is not getting called from anywhere
outside with i64 and High=true).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9b5b8b0b9439da2dd4167ece15db7e13d37f461c 20-Feb-2013 Chad Rosier <mcrosier@apple.com> [ms-inline asm] Make the comment a bit more verbose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175641 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b86f1e5e557f8a00209eef1c6ecb4532b33d7738 20-Feb-2013 Chad Rosier <mcrosier@apple.com> [ms-inline asm] Force the use of a base pointer if the MachineFunction includes
MS-style inline assembly.

This is a follow-on to r175334. Forcing a FP to be emitted doesn't ensure it
will be used. Therefore, force the base pointer as well. We now treat MS
inline assembly in the same way we treat functions with dynamic stack
realignment and VLAs. This guarantees the BP will be used to reference
parameters and locals.
rdar://13218191

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175576 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
74b3c8da4800c7e8ba8f019879db29738ecc5f74 15-Feb-2013 Benjamin Kramer <benny.kra@googlemail.com> Make helpers static. Add missing include so LLVMInitializeObjCARCOpts gets C linkage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175264 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
108fb3202af6f500073cdbb7be32c25d7a273a2e 31-Jan-2013 Chad Rosier <mcrosier@apple.com> [PEI] Pass the frame index operand number to the eliminateFrameIndex function.
Each target implementation was needlessly recomputing the index.
Part of rdar://13076458

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174083 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a5597f0eaf1f93c6d0bc641a0cc54ecffb33955a 25-Jan-2013 Eli Bendersky <eliben@google.com> In this patch, we teach X86_64TargetMachine that it has a ILP32
(defined by the x32 ABI) mode, in which case its pointers are 32-bits
in size. This knowledge is also added to X86RegisterInfo that now
returns the appropriate registers in getPointerRegClass.

There are many outcomes to this change. In order to keep the patches
separate and manageable, we start by focusing on some simple testable
cases. The patch adds a test with passing a pointer to a function -
focusing on the difference between the two data models for x86-64.
Another test is added for handling of 'sret' arguments (and
functionality is added in X86ISelLowering to make it work).

A note on naming: the "x32 ABI" document refers to the AMD64
architecture (in LLVM it's distinguished by being is64Bits() in the
x86 subtarget) with two variations: the LP64 (default) data model, and
the ILP32 data model. This patch adds predicates to the subtarget
which are consistent with this naming scheme.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0b8c9a80f20772c3793201ab5b251d3520b9cea3 02-Jan-2013 Chandler Carruth <chandlerc@gmail.com> Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
831737d329a727f53a1fb0572f7b7a8127208881 30-Dec-2012 Bill Wendling <isanbard@gmail.com> Remove the Function::getFnAttributes method in favor of using the AttributeSet
directly.

This is in preparation for removing the use of the 'Attribute' class as a
collection of attributes. That will shift to the AttributeSet class instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171253 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fbf3b4a07690751f72302757058ab0298dfb832e 20-Dec-2012 Jim Grosbach <grosbach@apple.com> MC: Add MCInstrDesc::mayAffectControlFlow() method.

MC disassembler clients (LLDB) are interested in querying if an
instruction may affect control flow other than by virtue of being
an explicit branch instruction. For example, instructions which
write directly to the PC on some architectures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
034b94b17006f51722886b0f2283fb6fb19aca1f 19-Dec-2012 Bill Wendling <isanbard@gmail.com> Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170502 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d04a8d4b33ff316ca4cf961e06c9e312eff8e64f 03-Dec-2012 Chandler Carruth <chandlerc@gmail.com> Use the new script to sort the includes of every file under lib.

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
1243922fc1a1e3d2681ed9e78503eeabd875ba93 26-Nov-2012 Chad Rosier <mcrosier@apple.com> Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary.
This pass was conservative in that it always reserved the FP to enable dynamic
stack realignment, which allowed the RA to use aligned spills for vector
registers. This happens even when spills were not necessary. The RA has
since been improved to use unaligned spills when necessary.

The new behavior is to realign the stack if the frame pointer was already
reserved for some other reason, but don't reserve the frame pointer just
because a function contains vector virtual registers.

Part of rdar://12719844

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168627 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
dc7f174b5e049172f085ff5957f58998bdc446a4 16-Nov-2012 Duncan Sands <baldrick@free.fr> Add the Erlang/HiPE calling convention, patch by Yiannis Tsiouris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168166 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3575222175b4982f380ff291bb17be67aadc0966 24-Oct-2012 Elena Demikhovsky <elena.demikhovsky@intel.com> Special calling conventions for Intel OpenCL built-in library.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166566 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6c0e04c823cf4034214b050e338c99a401edd2ac 16-Oct-2012 Michael Liao <michael.liao@intel.com> Add __builtin_setjmp/_longjmp supprt in X86 backend

- Besides used in SjLj exception handling, __builtin_setjmp/__longjmp is also
used as a light-weight replacement of setjmp/longjmp which are used to
implementation continuation, user-level threading, and etc. The support added
in this patch ONLY addresses this usage and is NOT intended to support SjLj
exception handling as zero-cost DWARF exception handling is used by default
in X86.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165989 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6765834754cbb3cb0f15b4b15e98c5e73fa50066 09-Oct-2012 Bill Wendling <isanbard@gmail.com> Create enums for the different attributes.

We use the enums to query whether an Attributes object has that attribute. The
opaque layer is responsible for knowing where that specific attribute is stored.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7abf67a092c0a75d6d1631766d6a8ef14e38d526 04-Oct-2012 Michael Liao <michael.liao@intel.com> Add register encoding support in X86 backend

- Add 'HwEncoding' for X86 registers and call getEncodingValue() to
retrieve their encoding values.
- This's the first step to adopt new scheme. Furthur revising is onging.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165241 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f4d25a2c461f7a64fcc643a6ea2541e87067d036 30-Sep-2012 Craig Topper <craig.topper@gmail.com> Change getX86SubSuperRegister to take an MVT::SimpleValueType rather than an EVT and add llvm_unreachable to the switches. Helps it compile to dramatically better code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2c189061184925c6a8ecbb5a19e648b230a41c0e 26-Sep-2012 Bill Wendling <isanbard@gmail.com> Remove the `hasFnAttr' method from Function.

The hasFnAttr method has been replaced by querying the Attributes explicitly. No
intended functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164725 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
74eab5ab9e77ae62fda3cd44e997a7ff4ed6760e 10-Sep-2012 Nick Lewycky <nicholas@mxc.ca> Add missing space before {. No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a20e1e7ef596842127794372244fd5c646f71296 01-Aug-2012 Chad Rosier <mcrosier@apple.com> Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d97f3a5ab084485fe4931b6e7d8fa40ae4caa3c1 31-Jul-2012 Chad Rosier <mcrosier@apple.com> [x86 frame lowering] In 32-bit mode, use ESI as the base pointer.

Previously, we were using EBX, but PIC requires the GOT to be in EBX before
function calls via PLT GOT pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161066 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3f0dbab963197cadb32f70e1ee1a106fe35f5c8e 10-Jul-2012 Chad Rosier <mcrosier@apple.com> Add support for dynamic stack realignment in the presence of dynamic allocas on
X86. Basically, this is a reapplication of r158087 with a few fixes.

Specifically, (1) the stack pointer is restored from the base pointer before
popping callee-saved registers and (2) in obscure cases (see comments in patch)
we must cache the value of the original stack adjustment in the prologue and
apply it in the epilogue.

rdar://11496434


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160002 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
43369249e7c2be91535e3ef900673e6116a953de 18-Jun-2012 Chandler Carruth <chandlerc@gmail.com> Temporarily revert r158087.

This patch causes problems when both dynamic stack realignment and
dynamic allocas combine in the same function. With this patch, we no
longer build the epilog correctly, and silently restore registers from
the wrong position in the stack.

Thanks to Matt for tracking this down, and getting at least an initial
test case to Chad. I'm going to try to check a variation of that test
case in so we can easily track the fixes required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158654 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a97b180fc44718e525bb03b50e05fe66622c2b02 06-Jun-2012 Chad Rosier <mcrosier@apple.com> Add support for dynamic stack realignment in the presence of dynamic allocas on
X86.
rdar://11496434


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158087 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
396618b43a85e12d290a90b181c6af5d7c0c5f11 02-Jun-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Switch all register list clients to the new MC*Iterator interface.

No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
547d8045fbf92eef358379f6e1446e33d8a8a0b8 01-Jun-2012 Chad Rosier <mcrosier@apple.com> Put the shiny new MCSubRegIterator to work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157783 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
1910cb1e3d07d7139d0bb83e4f65188bd3a32622 08-May-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> s/CSR_Ghc/CSR_NoRegs/

Share the CalleeSavedRegs defs between all calling conventions having no
callee-saved registers.

Patch by Yiannis Tsiouris!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156382 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
397fc4874efe9c17e737d4c5c50bd19dc3bf27f5 08-May-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().

The getPointerRegClass() hook can return register classes that depend on
the calling convention of the current function (ptr_rc_tailcall).

So far, we have been able to infer the calling convention from the
subtarget alone, but as we add support for multiple calling conventions
per target, that no longer works.

Patch by Yiannis Tsiouris!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156328 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
66413b61f0fee8f8177aeadb27d16e8eb7d30472 01-May-2012 Preston Gurd <preston.gurd@intel.com> This patch marks the X86 floating point stack registers ST0-ST7 as reserved
in order to avoid assertion failures in the register scavenger. The assertion
failures were “Bad machine code: Using an undefined physical register” and
“Bad machine code: MBB exits via unconditional fall-through but its successor
differs from its CFG successor!”.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6a8c7bf8e72338e55f0f9583e1828f62da165d4a 23-Apr-2012 Preston Gurd <preston.gurd@intel.com> This patch fixes a problem which arose when using the Post-RA scheduler
on X86 Atom. Some of our tests failed because the tail merging part of
the BranchFolding pass was creating new basic blocks which did not
contain live-in information. When the anti-dependency code in the Post-RA
scheduler ran, it would sometimes rename the register containing
the function return value because the fact that the return value was
live-in to the subsequent block had been lost. To fix this, it is necessary
to run the RegisterScavenging code in the BranchFolding pass.

This patch makes sure that the register scavenging code is invoked
in the X86 subtarget only when post-RA scheduling is being done.
Post RA scheduling in the X86 subtarget is only done for Atom.

This patch adds a new function to the TargetRegisterClass to control
whether or not live-ins should be preserved during branch folding.
This is necessary in order for the anti-dependency optimizations done
during the PostRASchedulerList pass to work properly when doing
Post-RA scheduling for the X86 in general and for the Intel Atom in particular.

The patch adds and invokes the new function trackLivenessAfterRegAlloc()
instead of using the existing requiresRegisterScavenging().
It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of
requiresRegisterScavenging(). It changes the all the targets that
implemented requiresRegisterScavenging() to also implement
trackLivenessAfterRegAlloc().

It adds an assertion in the Post RA scheduler to make sure that post RA
liveness information is available when it is needed.

It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order
to avoid running into the added assertion.

Finally, this patch restores the use of anti-dependency checking
(which was turned off temporarily for the 3.1 release) for
Intel Atom in the Post RA scheduler.

Patch by Andy Zhang!

Thanks to Jakob and Anton for their reviews.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155395 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c909950c384e8234a7b3c5a76b7f79e3f7012ceb 20-Apr-2012 Craig Topper <craig.topper@gmail.com> Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155186 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
79aa3417eb6f58d668aadfedf075240a41d35a26 17-Mar-2012 Craig Topper <craig.topper@gmail.com> Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e4fd907e72a599eddfa7a81eac4366b5b82523e3 04-Mar-2012 Craig Topper <craig.topper@gmail.com> Use uint16_t to store register overlaps to reduce static data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
015f228861ef9b337366f92f637d4e8d624bb006 04-Mar-2012 Craig Topper <craig.topper@gmail.com> Use uint16_t to store registers in callee saved register tables to reduce size of static data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
31d157ae1ac2cd9c787dc3c1d28e64c682803844 18-Feb-2012 Jia Liu <proljc@gmail.com> Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4d6ccb5f68cd7c6418a209f1fa4dbade569e4493 20-Jan-2012 David Blaikie <dblaikie@gmail.com> More dead code removal (using -Wunreachable-code)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0bd2ae92b0908f2e3b85eafb9ba48b9d6a82c774 17-Jan-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Move X86 callee saved register lists to the X86CallConv .td file.

Add a trivial implementation of the getCallPreservedMask() hook.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148347 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
570f9a972e02830d1ca223743dd6b4cc4fdf9549 19-Dec-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Emit a getMatchingSuperRegClass() implementation for every target.

Use information computed while inferring new register classes to emit
accurate, table-driven implementations of getMatchingSuperRegClass().

Delete the old manual, error-prone implementations in the targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146873 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd 07-Dec-2011 Evan Cheng <evan.cheng@apple.com> Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8a8d479214745c82ef00f08d4e4f1c173b5f9ce2 02-Dec-2011 Nick Lewycky <nicholas@mxc.ca> Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7d5a61e975260d01bb2079b5dcb9c93b76a4734d 01-Dec-2011 Eric Christopher <echristo@apple.com> For 64-bit the rest of the general regs are ok for the q constraint. Make
sure we can emit both the high and low versions of those registers.

Fixes rdar://10392864

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145579 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b7994fedcbcf375ee70b0ad11e1c962c0ccfc1ae 08-Oct-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Prevent potential NOREX bug.

A GR8_NOREX virtual register is created when extrating a sub_8bit_hi
sub-register:

%vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8_NOREX:%vreg2 %GR64_ABCD:%vreg1
TEST8ri_NOREX %vreg2, 1, %EFLAGS<imp-def>; GR8_NOREX:%vreg2

If such a live range is ever split, its register class must not be
inflated to GR8. The sub-register copy can only target GR8_NOREX.

I dont have a test case for this theoretical bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141500 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9bb272c900b46ebf78aa1b9daa7e3991bec8ff18 05-Oct-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Override TRI::getSubClassWithSubReg for X86.

There are fewer registers with sub_8bit sub-registers in 32-bit mode
than in 64-bit mode. In 32-bit mode, sub_8bit behaves the same as
sub_8bit_hi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141206 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c8e2bb68bbc4a71cc10084c8f89565b9f05e12ef 01-Oct-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Store sub-class lists as a bit vector.

This uses less memory and it reduces the complexity of sub-class
operations:

- hasSubClassEq() and friends become O(1) instead of O(N).

- getCommonSubClass() becomes O(N) instead of O(N^2).

In the future, TableGen will infer register classes. This makes it
cheap to add them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140898 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
08ecb711ac9294dcbd560a53c0345b86aaf1d15f 16-Sep-2011 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Fix PR10884.

This PR basically reports a problem where a crash in generated code
happened due to %rbp being clobbered:

pushq %rbp
movq %rsp, %rbp
....
vmovmskps %ymm12, %ebp
....
movq %rbp, %rsp
popq %rbp
ret

Since Eric's r123367 commit, the default stack alignment for x86 32-bit
has changed to be 16-bytes. Since then, the MaxStackAlignmentHeuristicPass
hasn't been really used, but with AVX it becomes useful again, since per
ABI compliance we don't always align the stack to 256-bit, but only when
there are 256-bit incoming arguments.

ReserveFP was only used by this pass, but there's no RA target hook that
uses getReserveFP() to check for the presence of FP (since nothing was
triggering the pass to run, the uses of getReserveFP() were removed
through time without being noticed). Change this pass to use
setForceFramePointer, which is properly called by MachineFunction
hasFP method.

The testcase is very big and dependent on RA, not sure if it's worth
adding to test/CodeGen/X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2d28617de2b0b731c08d1af9e830f31e14ac75b4 19-Jul-2011 Evan Cheng <evan.cheng@apple.com> Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for
better location welcome).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135438 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0e6a052331f674dd70e28af41f654a7874405eab 18-Jul-2011 Evan Cheng <evan.cheng@apple.com> Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down
to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c60f9b752381baa6c4b80c0739034660f1748c84 14-Jul-2011 Evan Cheng <evan.cheng@apple.com> Next round of MC refactoring. This patch factor MC table instantiations, MC
registeration and creation code into XXXMCDesc libraries.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7e9450107148895cd882dbaa21f17727b876998a 14-Jul-2011 Eli Friedman <eli.friedman@gmail.com> Fix up assertion in r135018 so it doesn't trigger on 32-bit; when we're in 32-bit, it doesn't matter whether the operation overflows because the computed address is not wider than the immediate.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5cf2ee1f80e0d4c5c1ecb0717f3d9baefe7619e1 13-Jul-2011 Eli Friedman <eli.friedman@gmail.com> Add an assert (which should never trigger) that triggers on a testcase I'm looking at.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135018 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
486dd90696545421c55346570b88fa03f6dd464f 06-Jul-2011 Bill Wendling <isanbard@gmail.com> Constify getCompactUnwindRegNum.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134527 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2374cb8e7d05082e15e2ae9950bab87aa2c664c9 01-Jul-2011 Bill Wendling <isanbard@gmail.com> Use the correct registers on X86_64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134208 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5cd2791513919ee7504c309151321e4e37a05a58 01-Jul-2011 Bill Wendling <isanbard@gmail.com> Add target a target hook to get the register number used by the compact unwind
encoding for the registers it knows about. Return -1 if it can't handle that
register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134202 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6531bddb86149b7e5c888fc9209456356b9361c6 30-Jun-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Always adjust the stack pointer immediately after the call.

Some x86-32 calls pop values off the stack, and we need to readjust the
stack pointer after the call. This happens when ADJCALLSTACKUP is
eliminated.

It could happen that spill code was inserted between the CALL and
ADJCALLSTACKUP instructions, and we would compute wrong stack pointer
offsets for those frame index references.

Fix this by inserting the stack pointer adjustment immediately after the
call instead of where the ADJCALLSTACKUP instruction was erased.

I don't have a test case since we don't currently insert code in that
position. We will soon, though. I am testing a regalloc patch that
didn't work on Linux because of this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d5b03f252c0db6b49a242abab63d7c5a260fceae 28-Jun-2011 Evan Cheng <evan.cheng@apple.com> Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6844f7bcdec8c2691c8d1067d90e4a02cf658c27 28-Jun-2011 Evan Cheng <evan.cheng@apple.com> Hide more details in tablegen generated MCRegisterInfo ctor function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134027 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9bbe4d6c004f25bc491e2583cce7bc91891f68c7 28-Jun-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Clean up the handling of the x87 fp stack to make it more robust.

Drop the FpMov instructions, use plain COPY instead.

Drop the FpSET/GET instruction for accessing fixed stack positions.
Instead use normal COPY to/from ST registers around inline assembly, and
provide a single new FpPOP_RETVAL instruction that can access the return
value(s) from a call. This is still necessary since you cannot tell from
the CALL instruction alone if it returns anything on the FP stack. Teach
fast isel to use this.

This provides a much more robust way of handling fixed stack registers -
we can tolerate arbitrary FP stack instructions inserted around calls
and inline assembly. Live range splitting could sometimes break x87 code
by inserting spill code in unfortunate places.

As a bonus we handle floating point inline assembly correctly now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134018 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
73f50d9bc3bd46cc0abeba9bb0d46977ba1aea42 27-Jun-2011 Evan Cheng <evan.cheng@apple.com> Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc
into XXXGenRegisterInfo.inc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d 24-Jun-2011 Evan Cheng <evan.cheng@apple.com> Starting to refactor Target to separate out code that's needed to fully describe
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2fa82bc3da45d272f12a96a61074b637faa62e0b 23-Jun-2011 Evan Cheng <evan.cheng@apple.com> Get rid of one getStackAlignment(). RegisterInfo shouldn't need to know about stack alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133679 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
aad458d57f7ce2969da4d859b1cf705f61cb093e 18-Jun-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> SI, DI, BP, and SP don't have 8-bit sub-registers in x86 mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133308 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2a9d1ca9c244aeac98044a5fc9a081ff3df7b2ff 09-Jun-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Remove custom allocation order boilerplate that is no longer needed.

The register allocators automatically filter out reserved registers and
place the callee saved registers last in the allocation order, so custom
methods are no longer necessary just for that.

Some targets still use custom allocation orders:

ARM/Thumb: The high registers are removed from GPR in thumb mode. The
NEON allocation orders prefer to use non-VFP2 registers first.

X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble.

SystemZ: Some of the allocation orders are omitting R12 aliases without
explanation. I don't understand this target well enough to fix that. It
looks like all the boilerplate could be removed by reserving the right
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132781 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fa226bccaa90c520cac154df74069bbabb976eab 02-Jun-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Use TRI::has{Sub,Super}ClassEq() where possible.

No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6e032942cf58d1c41f88609a1cec74eb74940ecd 30-May-2011 Rafael Espindola <rafael.espindola@gmail.com> Use the dwarf->llvm mapping to print register names in the cfi
directives.

Fixes PR9826.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132317 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f5e771db37bb4c63f81f902a1d21269c4bd45236 28-May-2011 Cameron Zwarich <zwarich@apple.com> Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegClass()
was saying that the matching superregister class of GR32_NOREX in GR64_NOREX_NOSP
is GR64_NOREX, which drops the NOSP constraint. This fixes PR10032.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132225 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6b918b84661687f7b5fc92dabd6d58e258bf39f2 24-May-2011 Charles Davis <cdavis@mines.edu> Add a method to TargetRegisterInfo to get the register number that the Win64 EH
scheme uses internally. Implement it for x86 (the only architecture that LLVM
supports for which this matters right now).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e4c64454051962ab56187c966e981043ff17ae4f 19-May-2011 Cameron Zwarich <zwarich@apple.com> Reserve the segment registers on x86 to fix verifier failures in any code that
uses them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131591 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4f5de9bb406f93e9a20c2ce19b00f5fc2683cc9c 05-May-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Fix X86RegisterInfo::getMatchingSuperRegClass for sub_8bit_hi.

It is OK for B to be any GR8_ABCD_H superclass, the returned register class
doesn't have to map surjectively onto B.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130892 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c9e5015dece0a1a73bec358e11bc87594831279d 26-Apr-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on register class inflation.

The hook will be used by the register allocator when recomputing register
classes after removing constraints.

Thumb1 code doesn't allow anything larger than tGPR, and x86 needs to ensure
that the spill size doesn't change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130228 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7a2bdde0a0eebcd2125055e0eacaca040f0b766c 15-Apr-2011 Chris Lattner <sabre@nondot.org> Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b0519e15f70cef7ba16b712f258d4782ade17e13 10-Mar-2011 Evan Cheng <evan.cheng@apple.com> Re-commit 127368 and 127371. They are exonerated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
02d7c9298298f7f8fba1427f249deb2106126e9c 10-Mar-2011 Evan Cheng <evan.cheng@apple.com> Revert 127368 and 127371 for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
17adafc6c179f3bad757f932a13522851ee5171f 09-Mar-2011 Evan Cheng <evan.cheng@apple.com> Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be more
flexible.

If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127368 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
be2119e8e2bc7006cfd638a24367acbfda625d16 07-Mar-2011 Cameron Zwarich <zwarich@apple.com> Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127175 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7754f85885f8a961cb403ef13ab39583492d2b1e 26-Jan-2011 NAKAMURA Takumi <geek4civic@gmail.com> Target/X86: Tweak win64's tailcall.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124272 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c5b7a4223d4d91abbfd98f016f2f173ce181003e 26-Jan-2011 NAKAMURA Takumi <geek4civic@gmail.com> lib/Target/X86/X86RegisterInfo.cpp: Fix whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124268 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b9010763871a186d2a42c445431f9bdff9d83530 26-Jan-2011 NAKAMURA Takumi <geek4civic@gmail.com> lib/Target/X86/X86RegisterInfo.cpp: Fix a typo in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124267 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
16c29b5f285f375be53dabaa73e3e91107485fe4 10-Jan-2011 Anton Korobeynikov <asl@math.spbu.ru> Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b2581353011673d1241af2d7d334be46088248d8 09-Jan-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Fix the last virtual register enumerations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123102 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e4a2dd2f1ada7acea92df156ebaf8a45a17e139d 24-Dec-2010 Evan Cheng <evan.cheng@apple.com> Code clean up. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122528 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
94c5ae08750f314bc3cf1bf882b686244a3927d9 28-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> Move more PEI-related hooks to TFI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120229 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
82f58740c76b42af8370247b23677a0318f6dde8 20-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> Move some more hooks to TargetFrameInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119904 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d9e3385ced2dc887e2fe8e1c071bd2611e4d3ede 19-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> Move getInitialFrameState() to TargetFrameInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119754 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d0c38176690e9602a93a20a43f1bd084564a8116 18-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> Move hasFP() and few related hooks to TargetFrameInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119740 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
33464912237efaa0ed7060829e66b59055bdd48b 15-Nov-2010 Anton Korobeynikov <asl@math.spbu.ru> First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119097 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8456c4f957e33887f3ab5a23bcf3e6d5cb4884a7 07-Oct-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Fix obvious mistake pointed out by Michael Spencer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8f42a19fb0793e1af465e9cf315524fa81396c76 07-Oct-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Properly handle GR32_NOSP in X86RegisterInfo::getMatchingSuperRegClass.

This function looks like it is about ready to be generated by TebleGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115876 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6af61ca789ae3c18bc03bc3256244f80bb0938f8 04-Oct-2010 Anton Korobeynikov <asl@math.spbu.ru> Properly emit stack probe on win64 (for non-mingw targets).
Based on the patch by Cameron Esfahani!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115479 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4af1eaee70a8de71f805ef7c3eca581ff6a014e8 23-Sep-2010 Cameron Esfahani <dirty@apple.com> Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bc57c6db4a3a1f5df4450d8dbb100e1eb6944c28 22-Sep-2010 Chris Lattner <sabre@nondot.org> fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"
Teaching the code generator about CR8-15, how to rex them up, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114533 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ace53f2fbc65f1e26c084c733ffbdbe3516580a6 03-Sep-2010 Anton Korobeynikov <asl@math.spbu.ru> Properly emit __chkstk call instead of __alloca on non-mingw windows targets.
Patch by Cameron Esfahani!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112902 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c7c62bb3caed31fb1e43a9f6c3b833627388d2fc 03-Sep-2010 Anton Korobeynikov <asl@math.spbu.ru> Revert win64 changes. They seem to be incomplete

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2f4fad99ea776906c853f0c4eef0eb0f7d2dc579 03-Sep-2010 Anton Korobeynikov <asl@math.spbu.ru> Properly allocate win64 shadow reg area.
Patch by Jan Sjodin!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fcb4a8ead3cd8d9540d5eaa448af5d14a0ee341a 27-Aug-2010 Jim Grosbach <grosbach@apple.com> Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
to try to re-use scavenged frame index reference registers. rdar://8277890

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112241 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9f7f83b861f6d03df81c440364ba10f55f6447d5 25-Aug-2010 Anton Korobeynikov <asl@math.spbu.ru> Fix nasty mingw32 bug, which e.g. prevented llvm-gcc bootstrap there.
Mark _alloca call as clobberring EFLAGS, otherwise some DCE might remove
other flags-clobberring stuff (e.g. cmp instructions) occuring after
_alloca call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112034 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
90c579de5a383cee278acc3f7e7b9d0a656e6a35 06-Aug-2010 Owen Anderson <resistor@mac.com> Reapply r110396, with fixes to appease the Linux buildbot gods.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
1f74590e9d1b9cf0f1f81a156efea73f76546e05 06-Aug-2010 Owen Anderson <resistor@mac.com> Revert r110396 to fix buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e74a088d92e6010a1413a88865c85bb47a76f90c 06-Aug-2010 Eric Christopher <echristo@apple.com> Add an option to always emit realignment code for a particular module.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110404 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9ccaf53ada99c63737547c0235baeb8454b04e80 06-Aug-2010 Owen Anderson <resistor@mac.com> Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier. Clean up APIs related to this change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3c8e1bee6399e829eda801a32158c1f52d2733ad 24-Jul-2010 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Support x86 "eiz" and "riz" pseudo index registers in the assembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109295 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
72852a8cfb605056d87b644d2e36b1346051413d 20-Jul-2010 Eric Christopher <echristo@apple.com> Constify some arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108812 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
697cba8ec2b3f5160175fd5b4a641dbd48606e17 17-Jul-2010 Eric Christopher <echristo@apple.com> Remove unnecessary check that was subsumed into canRealignStack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108588 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
acdb4b920351b13c23b3795fe00079a8f8f4bff8 17-Jul-2010 Eric Christopher <echristo@apple.com> Make comment a bit more clear as well as return statement since
needsStackRealignment is currently checking the can conditions as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108581 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7431beaba2a01c3fe299c861b2ec85cbf1dc81c4 17-Jul-2010 Bill Wendling <isanbard@gmail.com> Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
thus is a much more meaningful name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108563 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e86b01c153ba52307ecb6e7513ec33f57caedfdd 09-Jul-2010 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Start the support for AVX instructions with 256-bit %ymm registers. A couple of
notes:
- The instructions are being added with dummy placeholder patterns using some 256
specifiers, this is not meant to work now, but since there are some multiclasses
generic enough to accept them, when we go for codegen, the stuff will be already
there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
file.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
599b531a960833719f607d66c97871f1f5ad12c0 09-Jul-2010 Chris Lattner <sabre@nondot.org> Change LEA to have 5 operands for its memory operand, just
like all other instructions, even though a segment is not
allowed. This resolves a bunch of gross hacks in the
encoder and makes LEA more consistent with the rest of the
instruction set.

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107934 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ed2ae136d29dd36122d2476801e7d7a86e8301e3 03-Jul-2010 Evan Cheng <evan.cheng@apple.com> Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107550 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bf37850e4289308c7d74d720b1d9556c99b6719d 15-Jun-2010 Dale Johannesen <dalej@apple.com> Reapply 105986 with fix for bug pointed out by Jakob:
flag argument to addReg is not the same format as flags attached
to MachineOperand, although both have the same info. I don't
think this actually mattered; the bootstrap failure did not
reproduce on the next run anyway.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106049 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
69ba5c6aa8d459a5d81e68ee3457deaa6a903e86 15-Jun-2010 Dale Johannesen <dalej@apple.com> Revert 105986; looks like I'd better try bootstrapping.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105988 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4b559f070a118341f575bbedd5a1d6b6c27a608b 15-Jun-2010 Dale Johannesen <dalej@apple.com> The form of BuildMI used for TAILJMPr was changing the register
containing the target address, an input, into an output. I don't
think this actually broke anything on x86 (it does on ARM), but
it's wrong.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
691820a1a0934ccc3b0830d3800987834a8fe858 02-Jun-2010 Rafael Espindola <rafael.espindola@gmail.com> Remove unused function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105325 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
31b6c5b2f3118ba8ab9366ecf37085a26be6db97 28-May-2010 Kevin Enderby <enderby@apple.com> Fix the use of x86 control and debug registers so that the assertion failure in
getX86RegNum() does not happen. Patch by Shantonu Sen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104994 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b106543592abcaabdbe929dd05d914f613f00af2 26-May-2010 Kevin Enderby <enderby@apple.com> Fix the x86 move to/from segment register instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104731 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b53985239c856464c1a904dc4371904394c4da91 25-May-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Separate unrelated cases that once shared a numeric value

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104629 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
48d0c163fb60f7da7ef3657df242bf11dbdb0617 25-May-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Ignore NumberHack and give each SubRegIndex instance a unique enum value instead.

This passes lit tests, but I'll give it a go through the buildbots to smoke out
any remaining places that depend on the old SubRegIndex numbering.

Then I'll remove NumberHack entirely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104615 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
22c0e97c567dd15c819906035d15c745100e75bc 25-May-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Use enums instead of literals for X86 subregisters.

The cases in getMatchingSuperRegClass cannot be broken up until the enums have
unique values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104611 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7c2e03916c22d9ad1d8596ad00dee04a9f1454ed 19-May-2010 Dan Gohman <gohman@apple.com> Factor out the code for picking integer arithmetic with immediate
opcodes into a helper function. This fixes a few places in the code
which were not properly selecting the 8-bit-immediate opcodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104091 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f84d60b6495d059be725b432c0adf2fdf780dad6 14-May-2010 Bill Wendling <isanbard@gmail.com> Several tail call tests apparently rely upon this being "adjusts stack" instead
of "has calls". That's probably wrong, but it needs further
investigation. Revert to the original behavior until this is settled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103824 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
55ed945bfd4886313fde8075e6512219fd881ab4 14-May-2010 Bill Wendling <isanbard@gmail.com> This should happen if there are no calls, not if it just doesn't adjust the
stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103813 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0fc546b053135a6a176aedb1b133dc9dafd4c8aa 14-May-2010 Bill Wendling <isanbard@gmail.com> Revert r103804. The comment is correct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103808 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d33fa0f9e0c5ecfa5097c359bdfbb2a0f2895889 14-May-2010 Bill Wendling <isanbard@gmail.com> Fix comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103804 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b92187a4103dca24c3767c380f63593d1f6161a7 14-May-2010 Bill Wendling <isanbard@gmail.com> Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b63387afc6b10e88631d1ef232c41ab6c18c8581 06-May-2010 Evan Cheng <evan.cheng@apple.com> Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103172 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f865cb5c1f00d5655d981503ed5761b2836fa5a8 06-May-2010 Eric Christopher <echristo@apple.com> Revert r103156 since it was breaking the build bots.

Reverse-merging r103156 into '.':
U lib/Target/ARM/ARMInstrNEON.td
U lib/Target/ARM/ARMRegisterInfo.h
U lib/Target/ARM/ARMBaseRegisterInfo.cpp
U lib/Target/ARM/ARMBaseInstrInfo.cpp
U lib/Target/ARM/ARMRegisterInfo.td



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d2c2d1809fb7d64fd0f15392b33864eb06752823 05-May-2010 Evan Cheng <evan.cheng@apple.com> Trim include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103103 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d2760d1cba46e60011b04be70a4da047a21542ff 05-May-2010 Eric Christopher <echristo@apple.com> Update comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103057 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3f54c64a9834f949fdd3abcf8bb68e596c87a6bd 29-Apr-2010 Evan Cheng <evan.cheng@apple.com> Load folding tail call should not use ebp / rbp after it's popped. PEI
should use esp / rsp to reference frame instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102596 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e566763b1915c7a4821ce95937b763724d271fec 21-Apr-2010 Evan Cheng <evan.cheng@apple.com> Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101984 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
75361b69f3f327842b9dad69fa7f28ae3b688412 08-Apr-2010 Chris Lattner <sabre@nondot.org> rename llvm::llvm_report_error -> llvm::report_fatal_error



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fa85eb62378900a884a7eb4933a9deb6513d26ab 06-Apr-2010 Jim Grosbach <grosbach@apple.com> Fix PR6696 and PR6663

When a frame pointer is not otherwise required, and dynamic stack alignment
is necessary solely due to the spilling of a register with larger alignment
requirements than the default stack alignment, the frame pointer can be both
used as a general purpose register and a frame pointer. That goes poorly, for
obvious reasons. This patch brings back a bit of old logic for identifying
the use of such registers and conservatively reserves the frame pointer
during register allocation in such cases.

For now, implement for X86 only since it's 32-bit linux which is hitting this,
and we want a targeted fix for 2.7. As a follow-on, this will be expanded
to handle other targets, as theoretically the problem could arise elsewhere
as well.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100559 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a267b0076e7887f5566e635ba35790f24d4524d9 05-Apr-2010 Chris Lattner <sabre@nondot.org> remove the MMI pointer from MachineFrameInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
63d7836267298f5b6cde43f0a89acbabfc109f48 14-Mar-2010 Chris Lattner <sabre@nondot.org> get MMI out of the label uniquing business, just go to MCContext
to get unique assembler temporary labels.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98489 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2e9919a5e5fe76f4b1e3290103c4bfd149ebba9c 14-Mar-2010 Chris Lattner <sabre@nondot.org> Now that DBG_LABEL is updated, we can finally make MachineMove
contain an MCSymbol instead of a label index.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6ffcccab5191ef1dcde876800c24a1f58b3b7ad8 14-Mar-2010 Chris Lattner <sabre@nondot.org> change the DBG_LABEL MachineInstr to always be created
with an MCSymbol instead of an immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98481 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f48ef0365545b6160836e3f4b4a210d1e21f1881 14-Mar-2010 Evan Cheng <evan.cheng@apple.com> Do not force indirect tailcall through fixed registers: eax, r11. Add support to allow loads to be folded to tail call instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98465 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
464bee191feb3062a63a378189e542d15bb806e2 13-Mar-2010 Chris Lattner <sabre@nondot.org> simplify some overly general code. The stack always grows down on x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98431 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
29689434635364346cbef6f4e309f1d9fcdd5d80 11-Mar-2010 Chris Lattner <sabre@nondot.org> add support, testcases, and dox for the new GHC calling
convention. Patch by David Terei!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98212 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
dff4b4c5a7cc894d3b4b6c6e779ea8f47fa50630 09-Mar-2010 Jim Grosbach <grosbach@apple.com> Change the Value argument to eliminateFrameIndex to a type-tagged value. This
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98086 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
043f3c2a0e286dcfd4cc5a16bf006e3c45929516 06-Mar-2010 Anton Korobeynikov <asl@math.spbu.ru> Lower dynamic stack allocation on mingw32 to separate instruction.
We cannot use a normal call here since it has extra unmodelled side
effects (it changes stack pointer). This should fix PR5292.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
874cadaf210d4ab05eadc64a41228df0f5078eb7 28-Feb-2010 Dan Gohman <gohman@apple.com> Implement XMM subregs.

Extracting the low element of a vector is now done with EXTRACT_SUBREG,
and the zero-extension performed by load movss is now modeled with
SUBREG_TO_REG, and so on.

Register-to-register movss and movsd are no longer considered copies;
they are two-address instructions which insert a scalar into a vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97354 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5dfa26795da9c521babd598ef911e6d95bd20d37 19-Feb-2010 Charles Davis <cdavis@mines.edu> Add support for the 'alignstack' attribute to the x86 backend. Fixes PR5254.

Also, FileCheck'ize a test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96686 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7545f49a5edfe19612d03e683d8b955c03018056 13-Feb-2010 Evan Cheng <evan.cheng@apple.com> Teach MachineFrameInfo to track maximum alignment while stack objects are being
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96069 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
aa92bec010ef2072bb466013f4e61d0c097b4a9c 31-Jan-2010 Evan Cheng <evan.cheng@apple.com> Change TAILJMP's to be varargs and transfer implicit uses over from TCRETURN's. Otherwise the missing uses can make post-regalloc scheduling do bad things. This fixes 403.gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94950 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
1d885c0ede4b384559a82ebb437341d8b5cb11e2 30-Jan-2010 Evan Cheng <evan.cheng@apple.com> Don't forget to transfer target flag when inserting a tailcall instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94872 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
30c6b75ac2eef548c18110a38c9798ea5314caba 27-Jan-2010 Chris Lattner <sabre@nondot.org> constify a method argument.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94612 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
73e884bb3e971b1e794ba2501df15138f73b8b1a 20-Jan-2010 Dale Johannesen <dalej@apple.com> make findDebugLoc a class method



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94032 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
918f0f0beab7401172b0b17aeb04e8d757e97a10 20-Jan-2010 Dale Johannesen <dalej@apple.com> Move findDebugLoc somewhere more central. Fix
more cases where debug declarations affect
debug line info.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93953 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bbe2bbeac834dfe60fe98cfdeff9a9cc94858b7e 19-Jan-2010 Dale Johannesen <dalej@apple.com> Fix a case where debug_value was perturbing the
line number info.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93937 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e45ab8a0a90e4f3a59d8c38038ae3e495ee1fef3 19-Jan-2010 Jim Grosbach <grosbach@apple.com> For aligned load/store instructions, it's only required to know whether a
function can support dynamic stack realignment. That's a much easier question
to answer at instruction selection stage than whether the function actually
will have dynamic alignment prologue. This allows the removal of the
stack alignment heuristic pass, and improves code quality for cases where
the heuristic would result in dynamic alignment code being generated when
it was not strictly necessary.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3752d2fe34a8d576203f8034baeabb02e65c87bc 15-Jan-2010 Dale Johannesen <dalej@apple.com> Revert 93499. After discussion with Chris we agreed
FrameIndexes should be lowered, but the same way as
everything else (target dependent) rather than in a
special hacked way. The lowering needs to be done
for eventual purposes of Dwarf generation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93530 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bc971c1575ab0f3f647ee7cc8b803a443a8db8ad 15-Jan-2010 Dale Johannesen <dalej@apple.com> Lower FrameIndex operand of DEBUG_VALUE (specially) and
print it as a comment on X86.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93499 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7896c9f436a4eda5ec15e882a7505ba482a2fcd0 03-Dec-2009 Chris Lattner <sabre@nondot.org> improve portability to avoid conflicting with std::next in c++'0x.
Patch by Howard Hinnant!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e27d205d5d4d53cceabcd6325533fbdf9c0cee42 02-Dec-2009 Jim Grosbach <grosbach@apple.com> Factor the stack alignment calculations out into a target independent pass.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90336 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
39a1fab856acec40e486d075a8017ed824c8bc25 01-Dec-2009 Dan Gohman <gohman@apple.com> Minor whitespace fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90166 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b23f3aa2701374ae54d6bd1732eb225217edc5a2 14-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> Temporary disable the error - it seems to be too conservative.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88800 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
52cd548525089056ac5be97e2b8eb05257bcdf3b 13-Nov-2009 Jakob Stoklund Olesen <stoklund@2pi.dk> The instruction pointer %RIP is a reserved register on x86_64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88705 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3f2bf85d14759cc4b28a86805f566ac805a54d00 12-Nov-2009 David Greene <greened@obbligato.org> Add a bool flag to StackObjects telling whether they reference spill
slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.

Update all targets to adhere to the new interfaces..


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
773943ac5ce3d4d8fce21f8585e0094ec0d2716a 08-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> Throw an error when stack realignment stuff fails instead of silent
code miscompilation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86463 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f5a86f45e75ec744c203270ffa03659eb0a220c1 25-Oct-2009 Nick Lewycky <nicholas@mxc.ca> Remove includes of Support/Compiler.h that are no longer needed after the
VISIBILITY_HIDDEN removal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6726b6d75a8b679068a58cb954ba97cf9d1690ba 25-Oct-2009 Nick Lewycky <nicholas@mxc.ca> Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b58f498f7502e7e1833decbbbb4df771367c7341 07-Oct-2009 Jim Grosbach <grosbach@apple.com> Add register-reuse to frame-index register scavenging. When a target uses
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.

eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.

ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
18f13c66bfb9cb2116be0f339fa955949dd60dd1 06-Sep-2009 Duncan Sands <baldrick@free.fr> Mark more constants unsigned, as warned about by icc (#68).
Patch by Erick Tryzelaar.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81116 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
eb3a7665296bf35a8f5f4b17a9a4b9d20961dd84 04-Sep-2009 Bill Wendling <isanbard@gmail.com> If we've pushed registers onto the stack, but aren't adjusting the stack pointer
(i.e., there are no local variables and stuff), we still need to output FDE
information for the pushed registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
af76e592c7f9deff0e55c13dbb4a34f07f1c7f64 22-Aug-2009 Chris Lattner <sabre@nondot.org> Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
80c76436fe22a5481fac2cafe3c0a652fa6ddb31 16-Aug-2009 Bill Wendling <isanbard@gmail.com> Styalistic and format changes. No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79187 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3f5bb168bcea8c34f9bd1536096f05fb7e8312f8 15-Aug-2009 Bill Wendling <isanbard@gmail.com> An overhaul of the exception handling code. This is arguably more correct than
what was there before. In "no FP mode", we weren't generating labels and unwind
table entries after each "push" instruction. While more than likely "okay", it's
not technically correct. The major thing was that the ordering of when to define
a new CFA register and at what offset wasn't correct. This would cause the
exception handling to fail in ways most miserable to users.

I also cleaned up some code a bit. There's one function which has a "return" at
the beginning, so it's never used. Should I just remove it? :-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79139 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
825b72b0571821bf2d378749f69d6c4cfb52d2f9 11-Aug-2009 Owen Anderson <resistor@mac.com> Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e50ed30282bb5b4a9ed952580523f2dda16215ac 11-Aug-2009 Owen Anderson <resistor@mac.com> Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
74f6f9a931e313948782aed9d463ea83cc3e214c 05-Aug-2009 Dan Gohman <gohman@apple.com> Enable the new no-SP register classes by default. This is to address
PR4572. A few tests have some minor code regressions due to different
coalescing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78217 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
dd93f5eb7196e0235db72c7bac49912410c37a51 03-Aug-2009 Anton Korobeynikov <asl@math.spbu.ru> Create proper frame index for FP

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77966 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
cf6b739d3d4921dc9fc6908ec2009055c0927125 03-Aug-2009 Anton Korobeynikov <asl@math.spbu.ru> Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77962 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3bb9b9a1ab0641694b5bc1aa3cdec42d69ef0606 03-Aug-2009 Bill Wendling <isanbard@gmail.com> The x86 jit doesn't generate a def_cfa_offset unwind instruction after the
pushes in the function prolog if the function doesn't have any stack space,
i.e. for a prolog like:

0x40011870: push %r15
0x40011872: push %r14
0x40011874: push %rbx

Patch by Zoltan!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
92aa4045d27fa50c02488f8d5131322c19329795 01-Aug-2009 Dan Gohman <gohman@apple.com> The X86 maximal stack alignment calculator preserves the CFG. Also,
be more careful about the return value of runOnMachineFunction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a4714e025de720d0fcbaa78ab6c12dc789599233 30-Jul-2009 Dan Gohman <gohman@apple.com> Add a new register class to describe operands that can't be SP,
due to x86 encoding restrictions. This is currently off by default
because it may cause code quality regressions. This is for PR4572.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77565 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2cfd52c507bd5790457a171eb9bcb39019cc6860 29-Jul-2009 Chris Lattner <sabre@nondot.org> Give getPointerRegClass() a "kind" value so that targets can
support multiple different pointer register classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77501 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
daf2212e8337c2333631787ed2765a23ddafd527 23-Jul-2009 Duncan Sands <baldrick@free.fr> Revert r75581: it causes massive breakage in the Ada
testsuite, due to exception handling not working
correctly. Maybe because the libgcc unwinder is
miscompiled - not sure, and I won't have time to
look into it before leaving on holiday. Note that
miscompilations of libgcc are not picked up by the
nightly testers, because they dynamically link with
libgcc, so pick up the system version rather than
the version built as part of llvm-gcc. This is a
nasty flaw in the nightly testers. (On the other
hand the Ada testsuite links with the just built
libgcc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76895 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
753480ad204c122dab5942ff40f7f5b10c7a891e 20-Jul-2009 Evan Cheng <evan.cheng@apple.com> Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76458 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5248468473f0488a652b545ad95f7abda302b7b5 18-Jul-2009 Evan Cheng <evan.cheng@apple.com> Enable cross register class coalescing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c23197a26f34f559ea9797de51e187087c039c42 14-Jul-2009 Torok Edwin <edwintorok@gmail.com> llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7d43cd8f3ef877570190d28c6f326d05ae820fbc 14-Jul-2009 Bill Wendling <isanbard@gmail.com> Remove hack now that Evan fixed it so that the frame pointer isn't saved twice.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75581 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c25e7581b9b8088910da31702d4ca21c4734c6d7 11-Jul-2009 Torok Edwin <edwintorok@gmail.com> assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d15f45f53e2d5f89b777b1c2d36de0b40f303a01 10-Jul-2009 Bill Wendling <isanbard@gmail.com> If -fomit-frame-pointer is used, we still need to record when the %esp register
is modified. Otherwise, the unwinder will get confused. The old code (before I
started my hacking) did this. It dropped on the floor, because I wasn't aware of
this requirement.

On the plus side, if we use "alloca" in a function, we create frame pointers
even with -fomit-frame-pointer is enabled!

This is a Good Thing(tm)!!!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75183 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
910139f9ca53fc20a680d51ae61bb1e072095141 09-Jul-2009 Evan Cheng <evan.cheng@apple.com> Targets sometimes assign fixed stack object to spill certain callee-saved
registers based on dynamic conditions. For example, X86 EBP/RBP, when used as
frame register has to be spilled in the first fixed object. It should inform
PEI this so it doesn't get allocated another stack object. Also, it should not
be spilled as other callee-saved registers but rather its spilling and restoring
are being handled by emitPrologue and emitEpilogue. Avoid spilling it twice.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75116 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c3d505c3c2a8c0e1f1db572f47451cfe2a1a58a3 08-Jul-2009 Bill Wendling <isanbard@gmail.com> Recommit r74952 with a bug fix:

DWARF requires frame moves be specified at specific times. If you have a
prologue like this:

__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
pushl %ebp
Llabel1:
movl %esp, %ebp
Llabel2:
pushl %esi
Llabel3:
subl $20, %esp
call "L1$pb"
"L1$pb":
popl %esi

The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.

Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.

This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.

There is some ugliness where we generate code like this:


LBB22_0: ## entry
pushl %ebp
Llabel280:
movl %esp, %ebp
Llabel281:
Llabel284:
pushl %ebp <----------
pushl %ebx
pushl %edi
pushl %esi
Llabel282:
subl $328, %esp

Notice the extra "pushl %ebp". If we generate a "machine move" instruction in
the FDE for that pushl, the linker may get very confused about what value %ebp
should have when exitting the function. I.e., it'll give it the value %esp
instead of the %ebp value from the first "pushl". Not to mention that, in this
case, %ebp isn't modified in the function (that's a separate bug). I put a small
hack in to get it to work. It might be the only solution, but should be
revisited once the above case is fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
97b4d4a8b534334ea858f4722c93fa858b79ba2a 08-Jul-2009 Bill Wendling <isanbard@gmail.com> --- Reverse-merging (from foreign repository) r74952 into '.':
U lib/Target/X86/X86RegisterInfo.cpp
U lib/Target/X86/X86RegisterInfo.h

Temporarily revert. This was causing an infinite loop in the linker on Leopard.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74970 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
66c6324fcf0db0f834e34dbb0e82a5038672eda3 07-Jul-2009 Bill Wendling <isanbard@gmail.com> DWARF requires frame moves be specified at specific times. If you have a
prologue like this:

__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
pushl %ebp
Llabel1:
movl %esp, %ebp
Llabel2:
pushl %esi
Llabel3:
subl $20, %esp
call "L1$pb"
"L1$pb":
popl %esi

The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.

Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.

This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
369de261e7cb2ec17b135d827af639300943562e 17-Jun-2009 Devang Patel <dpatel@apple.com> Do not use first actual instruction's location for prologue. The debug wants to skip prologue while setting a breakpoint for the function.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73592 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fe7f294d5cb42bcb98f4d23b26e83b361175df38 16-Jun-2009 Bill Wendling <isanbard@gmail.com> There doesn't seem to be a reason to move the save FP stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d0446b08c42a5ee7a781c38d6b40dc1c4af48527 16-Jun-2009 Bill Wendling <isanbard@gmail.com> The DWARF to compact encoding converter assumes that the DW_CFA_def_cfa_offset
comes after the DW_CFA_def_cfa_register, because the CFA is really ESP from the
start of the function and only gets an offset when the "subl $xxx,%esp"
instruction happens, not the other way around.

And reapply r72898:

The DWARF unwind info was incorrect. While compiling with
`-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a
lot of function, and then they would be `0'. The linker (at least on Darwin)
needs to encode the stack size. In some cases, the stack size is too large to
directly encode. So the linker checks to see if there is a "subl $xxx,%esp"
instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If
so, the compact encoding records the offset in the function to where the stack
size is embedded. But because the `DW_CFA_advance_loc' instructions are missing,
it looks before the function and dies.

So, instead of emitting the EH debug label before the stack adjustment
operations, emit it afterwards, right before the frame move stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73465 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3ae67f59104d9837a7012d73574a8c7cfa176b12 09-Jun-2009 Bill Wendling <isanbard@gmail.com> Simplified logic of this if-then statement to reduce nesting. No functionality
change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73143 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
faf2671776da307af2ae73d94597d2934ef406b5 08-Jun-2009 Bill Wendling <isanbard@gmail.com> Revert r72898. It does not solve the problem I want it to solve.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73075 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e075a6274600f987e040caf9134d8429cb52dbb6 05-Jun-2009 Bill Wendling <isanbard@gmail.com> The DWARF unwind info was incorrect. While compiling with
`-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a
lot of function, and then they would be `0'. The linker (at least on Darwin)
needs to encode the stack size. In some cases, the stack size is too large to
directly encode. So the linker checks to see if there is a "subl $xxx,%esp"
instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If
so, the compact encoding records the offset in the function to where the stack
size is embedded. But because the `DW_CFA_advance_loc' instructions are missing,
it looks before the function and dies.

So, instead of emitting the EH debug label before the stack adjustment
operations, emit it afterwards, right before the frame move stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72898 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d18e31ae17390d9c6f6cf93d18badf962452031d 05-Jun-2009 Devang Patel <dpatel@apple.com> Add new function attribute - noredzone.
Update code generator to use this attribute and remove DisableRedZone target option.
Update llc to set this attribute when -disable-red-zone command line option is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72894 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9a417121225506cdde5a9b3c73122b2158830bf0 04-Jun-2009 Eli Friedman <eli.friedman@gmail.com> PR3739, part 1: Disable the red zone on Win64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72830 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4 13-May-2009 Bill Wendling <isanbard@gmail.com> Change MachineInstrBuilder::addReg() to take a flag instead of a list of
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.

I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
094fad37b90946c91a09eb9270a0dbe800f49d87 08-Apr-2009 Rafael Espindola <rafael.espindola@gmail.com> Re-apply 68552.
Tested by bootstrapping llvm-gcc and using that to build llvm.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68645 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
044b5344c4a97b3c709a05b9c5f9296656477652 08-Apr-2009 Bill Wendling <isanbard@gmail.com> Temporarily revert r68552. This was causing a failure in the self-hosting LLVM
builds.

--- Reverse-merging (from foreign repository) r68552 into '.':
U test/CodeGen/X86/tls8.ll
U test/CodeGen/X86/tls10.ll
U test/CodeGen/X86/tls2.ll
U test/CodeGen/X86/tls6.ll
U lib/Target/X86/X86Instr64bit.td
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86InstrInfo.td
U lib/Target/X86/X86RegisterInfo.cpp
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86CodeEmitter.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86InstrInfo.h
U lib/Target/X86/X86ISelDAGToDAG.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86ISelLowering.h
U lib/Target/X86/X86InstrInfo.cpp
U lib/Target/X86/X86InstrBuilder.h
U lib/Target/X86/X86RegisterInfo.td



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68560 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2a6411bbbdc6a23605fa206e07fc4f99a3d5dff2 07-Apr-2009 Rafael Espindola <rafael.espindola@gmail.com> Reduce code duplication on the TLS implementation.
This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.

Will work on it and on X86-64 support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68552 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9c0f146d50ccc3ba780d4854b8e14422430013ef 19-Mar-2009 Nick Lewycky <nicholas@mxc.ca> Remove strange extra semicolons.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67287 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5a45d76c25d859c526fcdcdec3f07c97fec07d6b 21-Feb-2009 Bill Wendling <isanbard@gmail.com> Make sure this doesn't access .end() too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65213 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8aa374b6290210ad86499e129e67dea066d94433 21-Feb-2009 Bill Wendling <isanbard@gmail.com> Make sure we don't dereference the .end() of the container.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65211 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3d2445f5d97ab615ecb8b26d8c5440a6d774c28d 21-Feb-2009 Bill Wendling <isanbard@gmail.com> Propagate more debug loc infos. This also includes some code cleaning.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65207 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2625f9b2e4388a957286063f6c7fe5406fd0ca7a 21-Feb-2009 Bill Wendling <isanbard@gmail.com> We need to propagate the debug location information even when dealing with the
prologue/epilogue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65206 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8d13f8f1043d8b47940ecab7bac838ff1e8166f8 13-Feb-2009 Dale Johannesen <dalej@apple.com> Remove non-DebugLoc versions of BuildMI from X86.
There were some that might even matter in X86FastISel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64437 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
92c1e126473dfa93eeb4c9a124af4fedb40f0d5b 13-Feb-2009 Bill Wendling <isanbard@gmail.com> Revert this. It was breaking stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64428 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
54fc7d67146b2b95ae2d1c93ed59008d4338d8c8 13-Feb-2009 Bill Wendling <isanbard@gmail.com> Turn off the old way of handling debug information in the code generator. Use
the new way, where all of the information is passed on SDNodes and machine
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64427 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
21b5541814d57d0a31f353948e4e933dbb1af6a4 13-Feb-2009 Dale Johannesen <dalej@apple.com> Eliminate a couple of non-DebugLoc BuildMI variants.
Modify callers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64409 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d293e0d2dcd3dc4e6030e9644846ed4d0b1bbde3 11-Feb-2009 Dan Gohman <gohman@apple.com> Don't try to set an EFLAGS operand to dead if no instruction was created.
This fixes a bug introduced by r61215.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64316 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
770bcc7b15adbc978800db70dbb1c3c22913b52c 06-Feb-2009 Evan Cheng <evan.cheng@apple.com> Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63938 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
336b636dd7d9f690cae4eff27e46b138c1f586db 27-Jan-2009 Dan Gohman <gohman@apple.com> Fix the Red Zone calculation for functions with frame pointers.

Don't use the Red Zone when dynamic stack realignment is needed.
This could be implemented, but most x86-64 ABIs don't require
dynamic stack realignment so it isn't urgent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63074 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
92f4f16a19c8d5edafad700a22e76eb2f22b4b31 26-Jan-2009 Dan Gohman <gohman@apple.com> Implement Red Zone utilization on x86-64. This is currently
disabled by default; I'll enable it when I hook it up with
the llvm-gcc flag which controls it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63056 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
82779704ffd1723e57386e32b3bf6c096eadbbc7 24-Dec-2008 Dan Gohman <gohman@apple.com> Fix a compiler-abort on a testcase where the stack-pointer is added to
a symbolic constant. This is unlikely to be intentional, but it
shouldn't crash the compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61408 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fd1c6c31231025eb23c73cbfc58a5bd7e0b9736f 23-Dec-2008 Devang Patel <dpatel@apple.com> Silence unused variable warnings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61392 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bfd23c9961d6a02df0982fe45d7f21a72a1075e1 18-Dec-2008 Dan Gohman <gohman@apple.com> When emitting instructions that define EFLAGS and the EFLAGS value isn't
used, mark the defs as dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61215 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
34d6ad73e13a443ab013ea48c9d7e46b61577a76 18-Dec-2008 Dan Gohman <gohman@apple.com> When setting up the frame pointer, add it as a live-in register to all
non-entry blocks, so that it doesn't appear use-before-def anywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61214 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a32b7ac86f90b61731a1798768eef0403f16a869 18-Dec-2008 Dan Gohman <gohman@apple.com> Mark the x86 fp stack registers as "reserved". This tells LiveVariables
and the RegisterScavenger not to expect traditional liveness
techniques are applicable to these registers, since we don't fully
modify the effects of push and pop after stackification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61179 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
25a1b47cc3a153eb2f4a840b060196c3a19e3e07 26-Nov-2008 Dan Gohman <gohman@apple.com> Fish kill flag annotations in PUSH instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f7c094000f4baf094b1d60ba68a5b4e0193c502a 31-Oct-2008 Bill Wendling <isanbard@gmail.com> Revert r58489. It isn't correct for all cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58523 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f6a9988ceab0ca660fa4f4e89d8d683f487118eb 31-Oct-2008 Bill Wendling <isanbard@gmail.com> Don't skip over all "terminator" instructions when determining where to put the
callee-saved restore code. It could skip over conditional jumps
accidentally. Instead, just skip the "return" instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58489 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d735b8019b0f297d7c14b55adcd887af24d8e602 03-Oct-2008 Dan Gohman <gohman@apple.com> Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6d4b0525791182435a36d33340b97e1d7041e388 01-Oct-2008 Dan Gohman <gohman@apple.com> Split x86's ADJCALLSTACK instructions into 32-bit and 64-bit forms.
This allows the 64-bit forms to use+def RSP instead of ESP. This
doesn't fix any real bugs today, but it is more precise and it
makes the debug dumps on x86-64 look more consistent.

Also, add some comments describing the CALL instructions' physreg
operand uses and defs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56925 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
184793fc8a9cf6ecc9147468bbcc068f472b8517 27-Sep-2008 Evan Cheng <evan.cheng@apple.com> Re-apply 56683 with fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d5d8191b202c0f96f33c826c93d9796451ff7fca 27-Sep-2008 Bill Wendling <isanbard@gmail.com> Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:

/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
36a55023c1daae86afedf6e6672c0adad7bbe5ea 26-Sep-2008 Evan Cheng <evan.cheng@apple.com> Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56683 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4367ff7aff54cac3e84d79d1b038f50390d66103 26-Sep-2008 Evan Cheng <evan.cheng@apple.com> X86 address displacement field must be interpreted as a 32-bit value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5979d7192c9a5f85da5bf700ffe38200228137ca 25-Sep-2008 Anton Korobeynikov <asl@math.spbu.ru> XMM6-XMM15 are callee-saved on Win64. Patch by Nicolas Capens!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b84c1676f1e324b1ed5bba191f840eff8bdf2f4f 08-Sep-2008 Anton Korobeynikov <asl@math.spbu.ru> Reapply 55899: First draft of EH support on x86/64-linux
Now with fix, which prevents subtle codegen bug to trigger on darwin.
No fix for bug though, it's still there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55955 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a425e0073df51ab99665062a8c00d704e89d2ef8 08-Sep-2008 Bill Wendling <isanbard@gmail.com> Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin:

/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55928 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
302affbc5337e8b9c2c920eba0756d620d06c386 08-Sep-2008 Anton Korobeynikov <asl@math.spbu.ru> First draft of EH support on x86/64-linux

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55899 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ae73dc1448d25b02cabc7c64c86c64371453dda8 04-Sep-2008 Dan Gohman <gohman@apple.com> Tidy up several unbeseeming casts from pointer to intptr_t.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bdf7b5da476c31dbccd79e1768cc2b14ceeb11f9 25-Aug-2008 Evan Cheng <evan.cheng@apple.com> 80 col. violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55341 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
beb572b6986d818cff33725a15dd1b6c9c29a15d 25-Jul-2008 Nate Begeman <natebegeman@mac.com> Fit in 80 cols


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54029 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8e5f2c6f65841542e2a7092553fe42a00048e4c7 08-Jul-2008 Dan Gohman <gohman@apple.com> Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9f1c8317a4676945b4961ddb9827ef2412551620 03-Jul-2008 Evan Cheng <evan.cheng@apple.com> - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53097 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2dad0250f683ac5b28a8984ce5be00d299f3c35e 01-Jul-2008 Dan Gohman <gohman@apple.com> Prune a few dependencies on MachineFunction.h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52976 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4406604047423576e36657c7ede266ca42e79642 01-Jul-2008 Dan Gohman <gohman@apple.com> Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b5dae003252d8e650a32bfdf33cba5aed8e41e40 26-Jun-2008 Dale Johannesen <dalej@apple.com> Fixes the last x86-64 test failure in compat.exp:
<16 x float> is 64-byte aligned (for some reason),
which gets us into the stack realignment code. The
computation changing FP-relative offsets to SP-relative
was broken, assiging a spill temp to a location
also used for parameter passing. This
fixes it by rounding up the stack frame to a multiple
of the largest alignment (I concluded it wasn't fixable
without doing this, but I'm not very sure.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52750 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
83ec4b6711980242ef3c55a4fa36b2d7a39c1bfb 06-Jun-2008 Duncan Sands <baldrick@free.fr> Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
941ff5818bef5ffd5ae8e67190b474cbf2608467 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Fix typo


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
dc28bd43d3b9fa52aa1063a29b75536171b58c3c 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Only allow increase of max alignment value


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50168 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d52bdaff0c73c105167b70941af245f46b70753f 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Be over-conservative: scan for all used virtual registers and calculate maximal stack alignment in assumption, that there will be spill of vector register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50167 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
856914fe0084278d11edec79c8b707a6276b8857 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Add X86 Maximal Stack Alignment Calculator Pass before RA


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50166 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2c430cbf03b359b2db9001f17f75832dc0400c04 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Do proper book-keeping of offsets and prologue/epilogue code for stack realignment


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50163 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8e91ec5e29d930fd07a7ebb7d9c4b34a41873962 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> If stack realignment is used - incoming args will use EBP as base register and locals - ESP


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b51dce3013b4370691469f415f54f1b7b7b0fdf1 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Eastimate required stack alignment early, so we can decide, whether we will need frame pointer or not


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50161 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d1c133a051dbf6e82d27f051a5992407b09123af 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Cleanup


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
82751e3eda28bd7a0f7caa7dc286aadfacd09d0d 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Simplify


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
45709ae09b252a18efd342bbd56574a12437c81c 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Make stack alignment options global for all targets


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50157 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
cfcd20e7bece78e79e4509abcdc312aa0b1b6e15 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Provide option for enabling-disabling stack realignment


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50156 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
35410a493bb393d0d8d5868feb5ef901aba64575 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Disable stack realignment for functions with dynamic-sized alloca's


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9bbbea568c6a48a5be6a5f7c1449c164fed55e70 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Provide convenient helpers for some operations


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50153 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e201190eb74d85f1f86fe2c333c7109d7f710eb8 23-Apr-2008 Anton Korobeynikov <asl@math.spbu.ru> Whitespace cleanup


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50152 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
52e724ad7e679ee590f4bd763d55280586a8f1bc 16-Apr-2008 Nicolas Geoffray <nicolas.geoffray@lip6.fr> Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3541af73b6b8a083cf2d7784438d60e8bcce3883 14-Apr-2008 Dale Johannesen <dalej@apple.com> Reverse sense of unwind-tables option. This means
stack tracebacks on Darwin x86-64 won't work by default;
nevertheless, everybody but me thinks this is a good idea.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49663 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4e1b79459fcf72216cdc42a59953e172c60e15ca 08-Apr-2008 Dale Johannesen <dalej@apple.com> Implement new llc flag -disable-required-unwind-tables.
Corresponds to -fno-unwind-tables (usually default in gcc).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e00406281d94ebb9c69b7803311936f07994da43 02-Apr-2008 Dale Johannesen <dalej@apple.com> Cosmetic changes per EH patch review feedback.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
1532f3ddd77c362dd5f613af06b4de636e3c5b0e 02-Apr-2008 Dale Johannesen <dalej@apple.com> Recommitting EH patch; this should answer most of the
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49064 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b6d5b1439047609c050576f3dc52b722e76bd30b 01-Apr-2008 Dale Johannesen <dalej@apple.com> Revert 49006 for the moment.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49046 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
1544e4713be68edcf042de5aed7265dff7169d9d 01-Apr-2008 Dale Johannesen <dalej@apple.com> Emit exception handling info for functions which are
not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.

llvm-gcc generates nounwind in the right places; other FEs
will need to do so also. Given such a FE, -enable-eh should
no longer be needed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ca1267c02b025cc719190b05f9e1a5d174a9caf7 31-Mar-2008 Evan Cheng <evan.cheng@apple.com> Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
1dcce2148d855af67f845319414a94db5601be3e 22-Mar-2008 Anton Korobeynikov <asl@math.spbu.ru> Add information about callee-saved registers on Win64


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4aefd6b7d4dadf8109221a89742725c116d8f8e0 20-Feb-2008 Anton Korobeynikov <asl@math.spbu.ru> Fix newly-introduced 4.3 warnings


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6f0d024a534af18d9e60b3ea757376cd8a3a980e 10-Feb-2008 Dan Gohman <gohman@apple.com> Rename MRegisterInfo to TargetRegisterInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
60783304f6385c952634c9da5f9b0c9eee8eccb8 08-Feb-2008 Dan Gohman <gohman@apple.com> Avoid needlessly casting away const qualifiers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46877 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b8033e821d9ccad10ba8770c4561600a3e9ce6cc 02-Feb-2008 Evan Cheng <evan.cheng@apple.com> Frame index can be negative.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46655 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
1b08bbca5592351a940bcd164bdec724ee954326 01-Feb-2008 Evan Cheng <evan.cheng@apple.com> Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bb81d97feb396a8bb21d074db1c57e9f66525f40 31-Jan-2008 Evan Cheng <evan.cheng@apple.com> Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46609 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c67aa7cbd507eb0ecf65724dd22a1bc968a2a549 31-Jan-2008 Evan Cheng <evan.cheng@apple.com> Add x86 specific getFrameIndexOffset(). This fixes local variable debugging info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46598 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
965d1b4bba6107b451edee403c6666acb86f39e3 30-Jan-2008 Evan Cheng <evan.cheng@apple.com> Treat the label for the first @llvm.dbg.stoppoint the same way as the dbg_func_start label. Make sure nothing else is inserted before them.
Note this solution might be somewhat fragile since ISD::LABEL may be used for other
purposes. If that ends up to be an issue, we may need to introduce a different node
for debug labels.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46571 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d2c860cef1593307b48096bc83343bcf6583edf1 30-Jan-2008 Evan Cheng <evan.cheng@apple.com> Skip over the label which marks the beginning of the function before inserting prologue code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46546 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8eea3392984428930b287aecb160c2feda981a13 25-Jan-2008 Anton Korobeynikov <asl@math.spbu.ru> Provide correct DWARF register numbering for debug information emission on x86-32/Darwin.
This should fix bunch of issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
749c6f6b5ed301c84aac562e414486549d7b98eb 07-Jan-2008 Chris Lattner <sabre@nondot.org> rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
69244300b8a0112efb44b6273ecea4ca6264b8cf 07-Jan-2008 Chris Lattner <sabre@nondot.org> Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
43dbe05279b753aabda571d9c83eaeb36987001a 07-Jan-2008 Owen Anderson <resistor@mac.com> Move even more functionality from MRegisterInfo into TargetInstrInfo.

Some day I'll get it all moved over...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d94b6a16fec7d5021e3922b0e34f9ddb268d54b1 05-Jan-2008 Owen Anderson <resistor@mac.com> Move some more functionality from MRegisterInfo to TargetInstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45603 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f6372aa1cc568df19da7c5023e83c75aa9404a07 01-Jan-2008 Owen Anderson <resistor@mac.com> Move some more instruction creation methods from RegisterInfo into InstrInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d10fd9791c20fd8368fa0ce94b626b769c6c8ba0 31-Dec-2007 Owen Anderson <resistor@mac.com> Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
84bc5427d6883f73cfeae3da640acd011d35c006 31-Dec-2007 Chris Lattner <sabre@nondot.org> Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8aa797aa51cd4ea1ec6f46f4891a6897944b75b2 31-Dec-2007 Chris Lattner <sabre@nondot.org> Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f73823000e2d5d6e1cf65bdf5a107297e18d35fb 30-Dec-2007 Chris Lattner <sabre@nondot.org> More cleanups for MachineOperand:
- Eliminate the static "print" method for operands, moving it
into MachineOperand::print.
- Change various set* methods for register flags to take a bool
for the value to set it to. Remove unset* methods.
- Group methods more logically by operand flavor in MachineOperand.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45461 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
39697a83b5ebb857263fc8b9a83ea1834e9d7fe4 30-Dec-2007 Chris Lattner <sabre@nondot.org> Shrinkify the machine operand creation method names.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45433 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4ee451de366474b9c228b4e5fa573795a715216d 29-Dec-2007 Chris Lattner <sabre@nondot.org> Remove attribution from file headers, per discussion on llvmdev.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7a831ce85f79a950c3bea2bcfbeda35f9bab9cdb 15-Dec-2007 Evan Cheng <evan.cheng@apple.com> Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45058 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0c5a507fcb59f3a1f76561de87a9c321bc20d6f6 14-Dec-2007 Evan Cheng <evan.cheng@apple.com> Actually, MOVPQIto64mr is a dup of MOVPQI2QImr, MOV64toPQIrm is a dup of MOVQI2PQIrm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45041 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6e041c2015dc25140b20e09ed7adbc9b8d6dc62b 11-Dec-2007 Nate Begeman <natebegeman@mac.com> Allow the JIT to encode MMX instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44869 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d64b5c82b97ad1b74eb9fd2f23257a7899b0c307 05-Dec-2007 Evan Cheng <evan.cheng@apple.com> Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
aee4af68ae2016afc5b4ec0c430e539c5810a766 02-Dec-2007 Evan Cheng <evan.cheng@apple.com> Remove redundant foldMemoryOperand variants and other code clean up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44517 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e62f97c094dba44e4c259d20135167fa91912eea 01-Dec-2007 Evan Cheng <evan.cheng@apple.com> Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44479 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c498b0281fa81bc213ad1a1228664d480936c0e6 14-Nov-2007 Evan Cheng <evan.cheng@apple.com> Clean up sub-register implementation by moving subReg information back to
MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44104 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b97aec663b1591e71c9ddee6dbb327d1b827eda5 13-Nov-2007 Dale Johannesen <dalej@apple.com> Add parameter to getDwarfRegNum to permit targets
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e7c8754a521d90e1164f2db7a5f999f51b818f12 13-Nov-2007 Evan Cheng <evan.cheng@apple.com> Fix x86-64 jit: remove reliance on Dwarf numbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44048 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f191c80cd79ee35e47b5a4feed98d687782dfe85 11-Nov-2007 Anton Korobeynikov <asl@math.spbu.ru> Use TableGen to emit information for dwarf register numbers.
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7a42f24f0c4171d6df94aca8db9cab567e79cf18 09-Nov-2007 Dale Johannesen <dalej@apple.com> Revert previous rewrite per chris's comments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43950 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3556bc1a9dde393a415ba3ac43c1e94426c90add 09-Nov-2007 Dale Johannesen <dalej@apple.com> Rewrite Dwarf number handling per review comments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43918 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4542edcaa7fb508481f454b87d3dd11f636082dc 07-Nov-2007 Dale Johannesen <dalej@apple.com> Complete conditionalization of Dwarf reg numbers.

Would somebody not on Darwin please make sure this
doesn't break anything. Exception handling failures
would be the most likely symptom.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43844 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
483ec21d90295c146b5555ed66c16860bcfff942 07-Nov-2007 Dale Johannesen <dalej@apple.com> Interchange Dwarf numbers of ESP and EBP on x86 Darwin.
Much improvement in exception handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43794 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
db807edd66d6f6fd566a050f3b6f1af6f7c09082 05-Nov-2007 Evan Cheng <evan.cheng@apple.com> Use movups to spill / restore SSE registers on targets where stacks alignment is
less than 16. This is a temporary solution until dynamic stack alignment is
implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8d9d74eaa81b3fdc3e0ab47dc88673c2364558f9 26-Oct-2007 Anton Korobeynikov <asl@math.spbu.ru> Fix off-by-one stack offset computations (dwarf information) for callee-saved
registers in case, when FP pointer was eliminated. This should fixes misc. random
EH-related crahses, when stuff is compiled with -fomit-frame-pointer.
Thanks Duncan for nailing this bug!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
42b08be973cc05a0718757308f8389882e167e79 22-Oct-2007 Evan Cheng <evan.cheng@apple.com> Fix an unfolding bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43212 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f7c9695a3890102916929e60bbf8ed33c0fc417a 20-Oct-2007 Evan Cheng <evan.cheng@apple.com> Resolve unfold tables ambiguity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43194 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
66f716354527c5ab4687a89a1605915e5128a106 19-Oct-2007 Evan Cheng <evan.cheng@apple.com> Local spiller optimization:
Turn a store folding instruction into a load folding instruction. e.g.
xorl %edi, %eax
movl %eax, -32(%ebp)
movl -36(%ebp), %eax
orl %eax, -32(%ebp)
=>
xorl %edi, %eax
orl -36(%ebp), %eax
mov %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43192 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f0a0cddbcda344a90b7217b744c78dccec71851c 19-Oct-2007 Evan Cheng <evan.cheng@apple.com> - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
- Fix some copy+paste bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43153 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
58184e6878fdab651bc7c9a59dab2687ca82ede2 18-Oct-2007 Evan Cheng <evan.cheng@apple.com> Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
106e8020bd1e36cffb749aa8358018b48839e336 13-Oct-2007 Evan Cheng <evan.cheng@apple.com> Change unfoldMemoryOperand(). User is now responsible for passing in the
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42946 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f4a9c69ff65801b04c8df07b8cd39ef41191ef56 12-Oct-2007 Evan Cheng <evan.cheng@apple.com> Fold load / store into MOV32to32_ and MOV16to16_.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42895 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c85e1716f0e45e4c18a9ef2fbe431a51ac3a4252 11-Oct-2007 Arnold Schwaighofer <arnold.schwaighofer@gmail.com> Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc. The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
elf/pic enabled + callee is in module + callee has
visibility protected or hidden


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f443ba7f9733cf7505b71f14760dd6109a9d6bde 08-Oct-2007 Chris Lattner <sabre@nondot.org> disable this entirely: it is causing use of invalidated iterators and infinite looping.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
eac9385f098e6fc730ad9a3ba9933957f1650127 07-Oct-2007 Chris Lattner <sabre@nondot.org> Fix many regressions on x86 by avoiding dereferencing the end iterator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42738 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
250837274684a410ec1ba09ccb69300338c6bdc1 06-Oct-2007 Anton Korobeynikov <asl@math.spbu.ru> Oops, I really wanted to commit this part also :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4f1c33f7c801937ff42090fe54256be606da07cb 06-Oct-2007 Anton Korobeynikov <asl@math.spbu.ru> Move merge code into new helper function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42699 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
75b4e46b8a39cac5bcec1365bb25f395611d0be2 05-Oct-2007 Evan Cheng <evan.cheng@apple.com> Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42624 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7f3394f3796883707961f2f61ea761cee15a0308 02-Oct-2007 Evan Cheng <evan.cheng@apple.com> Refactor code to add load / store folded instructions -> register only
instructions reverse map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42509 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e5f6204cd5d2306379bf8954e280ad35619a38b5 29-Sep-2007 Evan Cheng <evan.cheng@apple.com> Enabling new condition code modeling scheme.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42459 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
82482944edd810c7a1803d6694d435adf341e611 28-Sep-2007 Dan Gohman <gohman@apple.com> TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3f2d9ec186ce25b19bb36ae54eaee025150058fd 27-Sep-2007 Evan Cheng <evan.cheng@apple.com> Use GR64 in 64-bit mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42417 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ff110265753c19daf0468ee1facf357460497b7e 26-Sep-2007 Evan Cheng <evan.cheng@apple.com> - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from).
- X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42372 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9efce638d307b2c71bd7f0258d47501661434c27 26-Sep-2007 Evan Cheng <evan.cheng@apple.com> Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
29be8486e3cf719c8173635b5ee734c4e414e0af 26-Sep-2007 Anton Korobeynikov <asl@math.spbu.ru> Correctly restore stack pointer after realignment in main() on Cygwin/Mingw32


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42332 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fdd0837448d756becf88da6c6a632c03a637ba57 26-Sep-2007 Evan Cheng <evan.cheng@apple.com> Missing load / store folding entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42323 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0488db9b99fcfca407e859ef5cccf40dea23de16 25-Sep-2007 Evan Cheng <evan.cheng@apple.com> Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
all the kinks are worked out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5e6e93ecdcf49e572ef9aba5f68fb21d07f7e6d8 24-Sep-2007 Dan Gohman <gohman@apple.com> The code that used the StartLabelId label was removed, so remove the
code that creates the label too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42265 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a4ddacf60bc1c319ddb397a8a61b3696a43ff0e4 20-Sep-2007 Dan Gohman <gohman@apple.com> Fix several more entries in the x86 reload/remat folding tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fab7eff0faf126d66af4717a77deb6cfd429788a 19-Sep-2007 Evan Cheng <evan.cheng@apple.com> PSHUFDmi, etc. are actually folding a load, not a store.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42147 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
869b2b2c231e2208e1273e65123393ee06d13611 18-Sep-2007 Dan Gohman <gohman@apple.com> Move the entries for 64-bit CMP, IMUL, and a few others into the correct
tables so that they are eligible for reload/remat folding. And add
entries for JMP and CALL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ca8035e3569afd5a8d0ef406b82dad1b7e673683 17-Sep-2007 Dale Johannesen <dalej@apple.com> Remove RSTRegClass case from loadRegFromStackSlot
and storeRegToStackSlot. Evan and I concluded this
should never be needed and it appears to be true.
(It if is needed, adjustment would be needed for
long double to work.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42049 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9e3d3abd937c9bb79d56d25ec0e0724c7cbba67c 15-Sep-2007 Dale Johannesen <dalej@apple.com> Remove the assumption that FP's are either float or
double from some of the many places in the optimizers
it appears, and do something reasonable with x86
long double.
Make APInt::dump() public, remove newline, use it to
dump ConstantSDNode's.
Allow APFloats in FoldingSet.
Expand X86 backend handling of long doubles (conversions
to/from int, mostly).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41967 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
92dfe2001e96f6e2b6d327e8816f38033f88b295 14-Sep-2007 Dan Gohman <gohman@apple.com> Remove isReg, isImm, and isMBB, and change all their users to use
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b0869ed44d477b63c304eee762abb49d73b4fd68 10-Sep-2007 Evan Cheng <evan.cheng@apple.com> It's not safe to rematerialize MOV32r0 etc. by simply cloning the original
instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
718cb665ca6ce2bc4d8e8479f46a45db91b49f86 07-Sep-2007 Owen Anderson <resistor@mac.com> Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f4c3a59dbaa5e7a91fb1db1f7f989ffb60d5b982 30-Aug-2007 Evan Cheng <evan.cheng@apple.com> Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41599 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ee465749313579ccd91575ca8acf70b75c221a2c 29-Aug-2007 Duncan Sands <baldrick@free.fr> Move getX86RegNum into X86RegisterInfo and use it
in the trampoline lowering. Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41577 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fcc8793dc8b11c1471d7fef8f3d12db919d3123d 26-Jul-2007 Evan Cheng <evan.cheng@apple.com> Make sure epilogue esp adjustment is placed before any terminator and pop instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40538 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d97b8cd38c0a2d79c49f8ff7a17a7185d4dbdd82 24-Jul-2007 Anton Korobeynikov <asl@math.spbu.ru> Heal EH handling stuff by emitting correct offsets to callee-saved registers.

Pretty hackish, but code itself is dirty mess, so we won't make anything worse. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40472 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
64d80e3387f328d21cd9cc06464b5de7861e3f27 19-Jul-2007 Evan Cheng <evan.cheng@apple.com> Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7e7bbf82719f14d71f1170f82da82269ae12d377 19-Jul-2007 Evan Cheng <evan.cheng@apple.com> Only adjust esp around calls in presence of alloca.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40028 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3c46eefba2e2c0ab6e5aae18229c52a49b4fde29 18-Jul-2007 Evan Cheng <evan.cheng@apple.com> Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if previous instruction updates esp, fold it in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40018 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9b8c67443280c8e1b50766b312a5c07df080a638 17-Jul-2007 Evan Cheng <evan.cheng@apple.com> Fold prologue esp update when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39984 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5b3332cc272589b3cba938663f6bd37fbda97566 17-Jul-2007 Evan Cheng <evan.cheng@apple.com> Make sure not to break eh_return.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39978 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f27795d174d55884098aca07a2bf3f8fe8ba8650 17-Jul-2007 Evan Cheng <evan.cheng@apple.com> Missed the case where alloca is used but the stack size (not including callee-saved portion) is zero. Thanks Dan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39974 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
89d1659cf2db49162742ea3a261832b70e2897f9 17-Jul-2007 Evan Cheng <evan.cheng@apple.com> Use push / pop for prologues and epilogues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39967 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2365f51ed03afe6993bae962fdc2e5a956a64cd5 14-Jul-2007 Anton Korobeynikov <asl@math.spbu.ru> Long live the exception handling!

This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2038252c6a36efd18cc0bef216fa2c5bb9236617 10-Jul-2007 Dan Gohman <gohman@apple.com> Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp,
in addition to the intrinsic forms. Add spill-folding entries for these new
instructions, and for the scalar min and max instrinsic instructions which
were missing. And add some preliminary ISelLowering code for using the new
non-intrinsic vector sqrt instruction, and fneg and fabs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38478 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e377d4d142d7e2ec9266435087c99ffc43f394aa 04-Jul-2007 Dale Johannesen <dalej@apple.com> Refactor X87 instructions. As a side effect, all
their names are changed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37876 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
849f214a4e3676e41168b0c5398165c4d4fb99f8 03-Jul-2007 Dale Johannesen <dalej@apple.com> Fix for PR 1505 (and 1489). Rewrite X87 register
model to include f32 variants. Some factoring
improvments forthcoming.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37847 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0ff3ca4f9240048462d4cf8e708b519177acf1b4 13-May-2007 Anton Korobeynikov <asl@math.spbu.ru> More DWARF-related things cleanup:
1. Fix PR1380
2. Apply Duncan's patch from PR1410
3. Insert workaround for "one personality function per module" as noted in PR1414
4. Emit correct debug frames for x86/linux. This partly fixes DebugInfo/2006-11-06-StackTrace.cpp: stack trace is
shown correctly, but arguments for function on top of stack are displayed incorrectly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37015 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ce3b46552a03f502e56fb3c4db82f3f92c09eff9 02-May-2007 Anton Korobeynikov <asl@math.spbu.ru> Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux
with non-llvm-compiled (e.g. "native") unwind runtime.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36647 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
038082d96652601c70a98d4edffc834c835fc0bf 02-May-2007 Anton Korobeynikov <asl@math.spbu.ru> Emit correct DWARF reg # for RA (return address) register


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36646 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
97de9138217d6f76f25100df272ec1a3c4d31aad 01-May-2007 Evan Cheng <evan.cheng@apple.com> eliminateFrameIndex() change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36626 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a24ddddf68cc29cdcc93c572a98651c3f3be18a1 26-Apr-2007 Evan Cheng <evan.cheng@apple.com> Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36456 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7c6eefa5f110fd1b0b40f771f2e24944ad794c45 25-Apr-2007 Chris Lattner <sabre@nondot.org> do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292
when promoted to 64-bits


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36442 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ea84c5ee952c62dd0c703c9852d7a60715e4a435 25-Apr-2007 Chris Lattner <sabre@nondot.org> support for >4G stack frames


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36425 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
618078016d41becbd3af439fdeb2d65305170657 25-Apr-2007 Chris Lattner <sabre@nondot.org> support >4G stack frames


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36423 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b53e98eb30e58c1c6129c81bd12f303e5a680ed2 24-Apr-2007 Bill Wendling <isanbard@gmail.com> Add the PADDQ to the list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36406 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d15dff24c6a3712298e16453eb8d09c4404563a5 17-Apr-2007 Chris Lattner <sabre@nondot.org> rename X86FunctionInfo to X86MachineFunctionInfo to match the header file
it is defined in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36196 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
57fc00d5cf47343ba762493b8781ca0b14489c35 17-Apr-2007 Anton Korobeynikov <asl@math.spbu.ru> Implemented correct stack probing on mingw/cygwin for dynamic alloca's.
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36195 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c9c9d2d554e3b88e4f0dc470c523f3ed5bc50d1f 03-Apr-2007 Bill Wendling <isanbard@gmail.com> Changed to new MMX_ recipes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35617 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bf2c8b3c96f5c885095a10b0fcb29438f92d73c2 20-Mar-2007 Evan Cheng <evan.cheng@apple.com> Added MRegisterInfo hook to re-materialize an instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2f88dcdfb3a9c9592da93dcf3f0e0a9333932187 08-Mar-2007 Bill Wendling <isanbard@gmail.com> Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that
moves, loads, etc. are recognized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5e6df4647e15c50daea9a8a4e7f4f417a266335c 28-Feb-2007 Evan Cheng <evan.cheng@apple.com> PEI now passes a RegScavenger ptr to eliminateFrameIndex.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34707 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0fa1b6d1b1ce5437c30585baddcba20e691d31e0 23-Feb-2007 Evan Cheng <evan.cheng@apple.com> By default, spills kills the register being stored.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34515 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
62819f31440fe1b1415473a89b8683b5b690d5fa 21-Feb-2007 Jim Laskey <jlaskey@mac.com> Support to provide exception and selector registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b371f457b0ea4a652a9f526ba4375c80ae542252 19-Feb-2007 Evan Cheng <evan.cheng@apple.com> Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34428 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a284cbf667e11660840dc7bae3ee9eeaa3c7cbd2 19-Feb-2007 Reid Spencer <rspencer@reidspencer.com> For PR1207:
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
eceada67286f0d8081c23aedd242f4deeffa85ad 17-Feb-2007 Evan Cheng <evan.cheng@apple.com> Added getReservedRegs().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e078d1a14a2633d5fe5b5b9d9dec90669f5c7082 30-Jan-2007 Jim Laskey <jlaskey@mac.com> Only gather frame info if debug or eh.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33639 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
072200c36dd96b94e772029fd72edf9fa120c467 29-Jan-2007 Jim Laskey <jlaskey@mac.com> Landing pad-less eh for PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33622 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
44c3b9fdd416c79f4b67cde1aecfced5921efd81 26-Jan-2007 Jim Laskey <jlaskey@mac.com> Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
for debugging and exception handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33550 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
1ee29257428960fede862fcfdbe80d5d007927e9 26-Jan-2007 Jim Laskey <jlaskey@mac.com> Make LABEL a builtin opcode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0e41094d499efa585c11904cf088016140c462d1 24-Jan-2007 Jim Laskey <jlaskey@mac.com> Call frames for intel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33490 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7ac947d23d04802b8448d677c90084b36cdd2200 24-Jan-2007 Jim Laskey <jlaskey@mac.com> 80 columns


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33489 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
367372a30c36776e31958f0dc38306f32b80aa7c 23-Jan-2007 Evan Cheng <evan.cheng@apple.com> PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33460 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
dc77540d9506dc151d79b94bae88bd841880ef37 23-Jan-2007 Evan Cheng <evan.cheng@apple.com> hasFP() is now a virtual method of MRegisterInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2bd7b2b41fbfb4fd3f93b1e93a9e68e678fbce16 20-Jan-2007 Evan Cheng <evan.cheng@apple.com> One more try...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33400 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5ad334fbda276512e492a77601715e8e5e2b188e 20-Jan-2007 Evan Cheng <evan.cheng@apple.com> Last check-in was bogus. There is no need to align the stack if the function is a leaf function (and without alloca).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0327863a73a888e4f2ab103067bf4144ff3d462d 20-Jan-2007 Evan Cheng <evan.cheng@apple.com> Backend is reponsible for aligning the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33388 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7f70559bc47877bafc6dfa92b7df6b64650445fb 12-Jan-2007 Anton Korobeynikov <asl@math.spbu.ru> * PIC codegen for X86/Linux has been implemented
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33136 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
317848f4a11f7fe55afdd6d90ded8444069b56fb 03-Jan-2007 Anton Korobeynikov <asl@math.spbu.ru> Really big cleanup.
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32833 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c2b861da18c54a4252fecba866341e1513fa18cc 02-Jan-2007 Evan Cheng <evan.cheng@apple.com> Fix naming inconsistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32823 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
21b76123e524398ccf55bd51be4b676e45490657 14-Dec-2006 Evan Cheng <evan.cheng@apple.com> f64 <-> i64 bit_convert using movq in 64-bit mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32587 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0e8dbc6d5abec245bcd8b7c289138912228a0f23 14-Dec-2006 Evan Cheng <evan.cheng@apple.com> Added MOVSS2DIrr and MOVDI2SSrr to foldMemeoryOperand().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32583 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f5da13367f88f06e3b585dc2263ab6e9ca6c4bf8 07-Dec-2006 Bill Wendling <isanbard@gmail.com> What should be the last unnecessary <iostream>s in the library.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
51cdcd197268a7abf19b2698fc824e0da3d98049 07-Dec-2006 Evan Cheng <evan.cheng@apple.com> MI keeps a ptr of TargetInstrDescriptor, use it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32296 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ba59a1e453e110f7b84233f07613f9c5d9a39b87 01-Dec-2006 Evan Cheng <evan.cheng@apple.com> Match TargetInstrInfo changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32098 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c0f64ffab93d11fb27a3b8a0707b77400918a20e 28-Nov-2006 Evan Cheng <evan.cheng@apple.com> Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9dea41d9e1c9e288630db503668468560aa4286e 17-Nov-2006 Jim Laskey <jlaskey@mac.com> Hopefully a good crack at making debugging work on intel -disable-fp-elim.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31830 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ebf01d63b0ae24b29aa3e917d51458231c203b6f 17-Nov-2006 Evan Cheng <evan.cheng@apple.com> Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31795 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6ce7dc2a97260eea5fba414332796464912b9359 15-Nov-2006 Evan Cheng <evan.cheng@apple.com> Properly transfer kill / dead info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31765 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7ce45783531cfa81bfd7be561ea7e4738e8c6ca8 14-Nov-2006 Evan Cheng <evan.cheng@apple.com> Matches MachineInstr changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
50b3b50cd03f09f7fa87f48edaa72d519948ab63 10-Nov-2006 Evan Cheng <evan.cheng@apple.com> Fix a potential bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
438f7bc67cf235ccee7e6f7ac7f4ae2186eb8020 10-Nov-2006 Evan Cheng <evan.cheng@apple.com> Add implicit def / use operands to MachineInstr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
171d09ea537ac272091a1a2560302074b144fcca 10-Nov-2006 Evan Cheng <evan.cheng@apple.com> Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31616 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a1fd6504aaf62b87530e8230517957bad3facc96 09-Nov-2006 Evan Cheng <evan.cheng@apple.com> Remove M_2_ADDR_FLAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31583 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bdd371c0ed2a07875f813978d2f4781a6e78685b 03-Nov-2006 Evan Cheng <evan.cheng@apple.com> Dead code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31405 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f10c17f986f2986d0501046aa13a08db4886dd77 22-Sep-2006 Evan Cheng <evan.cheng@apple.com> Delete dead code; fix 80 col violations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30583 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bcb9770efe409f3291ce21269904744e7bf3397b 17-Sep-2006 Anton Korobeynikov <asl@math.spbu.ru> Added some eye-candy for Subtarget type checking
Added X86 StdCall & FastCall calling conventions. Codegen will follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6f34b43292fe478b28ac4b1c6f7c0162cda71c5f 08-Sep-2006 Evan Cheng <evan.cheng@apple.com> Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex
in addition to immediate operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30205 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
25ab690a43cbbb591b76d49e3595b019c32f4b3f 08-Sep-2006 Evan Cheng <evan.cheng@apple.com> Committing X86-64 support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b14ca605d712cfcbabb9873b2ecaa623a295e3d0 07-Sep-2006 Chris Lattner <sabre@nondot.org> Some notes on better load folding we could do


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2f5993bcf116119e5ee5cbc90dae09bf43a581c5 05-Sep-2006 Evan Cheng <evan.cheng@apple.com> Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
09e460662a8d7328da1b938d5581a6ef3740b51d 05-Sep-2006 Chris Lattner <sabre@nondot.org> Completely eliminate def&use operands. Now a register operand is EITHER a
def operand or a use operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2926869b4a083fc951484de03a9867eabf81e880 05-Sep-2006 Chris Lattner <sabre@nondot.org> Fix a long-standing wart in the code generator: two-address instruction lowering
actually *removes* one of the operands, instead of just assigning both operands
the same register. This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5ea64fd9eb0027ad20a66ea29211eef79d8842a0 18-Aug-2006 Chris Lattner <sabre@nondot.org> Constify some methods. Patch provided by Anton Vayvod, thanks!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29756 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3c62934268a048a069de5d01b6b40f64ae8b2443 21-Jul-2006 Evan Cheng <evan.cheng@apple.com> Missing a space.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
613f1f83fd183681cb7a2c68ea3b63aa6c44befb 19-Jul-2006 Jim Laskey <jlaskey@mac.com> Tidy up a few things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29213 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f19807cecb3a6f440acb34a90fb3614f17afd308 19-Jul-2006 Jim Laskey <jlaskey@mac.com> Reduce size of routine. Shrinks .o by 37%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29210 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
09c545790dc3a512d50ba787a688e194eced6a34 29-Jun-2006 Evan Cheng <evan.cheng@apple.com> Add shift and rotate by 1 instructions / patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28980 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
004fb92615b23e661da9d0bfd883296094b8b777 13-Jun-2006 Evan Cheng <evan.cheng@apple.com> Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e8bd0a332ab43c30a7745381075a9749070b6a50 07-Jun-2006 Evan Cheng <evan.cheng@apple.com> Added X86FunctionInfo subclass of MachineFunction to record whether the
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3649b0efa5e663aba9596a0225c34f82de1d95b7 03-Jun-2006 Evan Cheng <evan.cheng@apple.com> Cygwin support. Patch by Anton Korobeynikov!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
190717d3cf5882e43d2797108b72df7448f47fcc 31-May-2006 Evan Cheng <evan.cheng@apple.com> Rename instructions for consistency sake.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28594 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0f3ac8d8d4ce23eb2ae6f9d850f389250874eea5 18-May-2006 Evan Cheng <evan.cheng@apple.com> getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
069287d460321af43b7c88b816da5c778e5f46d1 16-May-2006 Evan Cheng <evan.cheng@apple.com> X86 integer register classes naming changes. Make them consistent with FP, vector classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
98d0d7d6f0b4b4f44105bacd3af9570d0e4d9346 12-May-2006 Chris Lattner <sabre@nondot.org> More coverity fixes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28266 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
403be7eafc8922c20d7e8253bc8d6d0abd0448cb 08-May-2006 Evan Cheng <evan.cheng@apple.com> Fixing truncate. Previously we were emitting truncate from r16 to r8 as
movw. That is we promote the destination operand to r16. So
%CH = TRUNC_R16_R8 %BP
is emitted as
movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28164 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8f7f7125e95e4fce29a4b8acbc88f708e7fae42f 05-May-2006 Evan Cheng <evan.cheng@apple.com> Better implementation of truncate. ISel matches it to a pseudo instruction
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28119 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8b915b4ed2c6e43413937ac71c0cbcf476ad1a98 04-May-2006 Chris Lattner <sabre@nondot.org> Remove and simplify some more machineinstr/machineoperand stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e53f4a055f74bded20d6129b4724ddd17fd199f6 04-May-2006 Chris Lattner <sabre@nondot.org> Move some methods out of MachineInstr into MachineOperand


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
63b3d7113d93fda622c4954c6b1d046ce029044e 04-May-2006 Chris Lattner <sabre@nondot.org> There shalt be only one "immediate" operand type!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ea50fabfd4e5fad25a25b312f64a9b2a53363586 04-May-2006 Chris Lattner <sabre@nondot.org> Remove a bunch more SparcV9 specific stuff


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ed1492eaf5998678a5e403ab84abc8c9e52e46fa 28-Apr-2006 Evan Cheng <evan.cheng@apple.com> Use movaps instead of movapd for spill / restore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28005 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
49bca8536cc7997813e6fcd68e4bfd5e61f6a79c 24-Apr-2006 Evan Cheng <evan.cheng@apple.com> MakeMIInst() should handle jump table index operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27955 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f0d4e3d7c0c4cceaf5667846637f8f4bfd72e0c5 18-Apr-2006 Evan Cheng <evan.cheng@apple.com> - PEXTRW cannot take a memory location as its first source operand.
- PINSRWrmi encoding bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27818 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f463f51161fe65da93ec573f19d2d32353be4116 18-Apr-2006 Evan Cheng <evan.cheng@apple.com> SHUFP{S|D}, PSHUF* encoding bugs. Left out the mask immediate operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27817 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a52b214f5650aa8b41e42394bae0bbd0dcd1549f 18-Apr-2006 Evan Cheng <evan.cheng@apple.com> Encoding bug: CMPPSrmi, CMPPDrmi dropped operand 2 (condtion immediate).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27815 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
51c9c43656d92ab3f782cc6655c0ecd151624cc4 17-Apr-2006 Evan Cheng <evan.cheng@apple.com> Incorrect foldMemoryOperand entries


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
800f12df1e0f29f30614f02cd05442f069a0c9fd 16-Apr-2006 Evan Cheng <evan.cheng@apple.com> Can't fold loads into alias vector SSE ops used for scalar operation. The load
address has to be 16-byte aligned but the values aren't spilled to 128-bit
locations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27732 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
407428e1eab7dfd3a1f45c958b059549ccfda10b 15-Apr-2006 Evan Cheng <evan.cheng@apple.com> Added SSE (and other) entries to foldMemoryOperand().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27716 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d9245ca1a1aa96371a2513c91a3e2a1f26b16e22 14-Apr-2006 Evan Cheng <evan.cheng@apple.com> We were not adjusting the frame size to ensure proper alignment when alloca /
vla are present in the function. This causes a crash when a leaf function
allocates space on the stack used to store / load with 128-bit SSE
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27698 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a964ccdc3f0e5d2820e33ce19c7e84365e5ea767 10-Apr-2006 Evan Cheng <evan.cheng@apple.com> Use movaps to do VR128 reg-to-reg copies for now. It's shorter and available for SSE1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27554 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
4188699f80c233a20b6ddc61570a8a8c1804cb85 07-Apr-2006 Jim Laskey <jlaskey@mac.com> Foundation for call frame information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8703be4ab6fde8bcdf5be039d886a2f1a1521132 04-Apr-2006 Evan Cheng <evan.cheng@apple.com> Minor fixes + naming changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27410 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4 28-Mar-2006 Jim Laskey <jlaskey@mac.com> Expose base register for DwarfWriter. Refactor code accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
414e682bac7c7fb618aef6bb0caf8ae501f7a2ed 27-Mar-2006 Jim Laskey <jlaskey@mac.com> Translate llvm target registers to dwarf register numbers properly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f1d78e83356a412e525c30ac90dabf090a8cfc99 23-Mar-2006 Jim Laskey <jlaskey@mac.com> Add support to locate local variables in frames (early version.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26994 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2246f8449f1f6ed3d919eced1b993fc498db4def 18-Mar-2006 Evan Cheng <evan.cheng@apple.com> Use the generic vector register classes VR64 / VR128 rather than V4F32,
V8I16, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26838 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8586b953a0e2a69eb80521d2cfa1c50431e79194 17-Mar-2006 Evan Cheng <evan.cheng@apple.com> Also fold MOV8r0, MOV16r0, MOV32r0 + store to MOV8mi, MOV16mi, and MOV32mi.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26817 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5bd4d48c24ba04455d472c599244a15b80fbe749 17-Mar-2006 Evan Cheng <evan.cheng@apple.com> Add some missing entries to X86RegisterInfo::foldMemoryOperand(). e.g.
ADD32ri8.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26816 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
cb4a38e75d0c05ea490da26d03d78bd81cd2dac8 25-Feb-2006 Evan Cheng <evan.cheng@apple.com> Fix an obvious bug exposed when we are doing
ADD X, 4
==>
MOV32ri $X+4, ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
933be3318be64ec08687ac3ee92e8405662fb88f 21-Feb-2006 Evan Cheng <evan.cheng@apple.com> Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64.
Added generic vector types: VR64 and VR128.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26295 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
aea20f50e53a16374d514bc70e30b4ff234c015a 20-Feb-2006 Evan Cheng <evan.cheng@apple.com> Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26294 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fe5cb19405794e478b944581c3a7be5c29cbaa0e 16-Feb-2006 Evan Cheng <evan.cheng@apple.com> 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
spill / restore FsMOVAPSrr and FsMOVAPDrr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26241 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
19ade3bf9ca6e92d29bb5f2bdf2195ba058e50b8 16-Feb-2006 Evan Cheng <evan.cheng@apple.com> Use movaps / movapd to spill / restore V4F4 / V2F8 registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26240 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d51425a82da3d519b85f86e380358aa22e63442d 16-Feb-2006 Evan Cheng <evan.cheng@apple.com> Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg
transfer.

According to the Intel P4 Optimization Manual:

Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.

Not to mention movaps is shorter than movss.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26226 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d77525da5e120eeaccf2322340111b1d65c49211 03-Feb-2006 Chris Lattner <sabre@nondot.org> When rewriting frame instructions, emit the appropriate small-immediate
instruction when possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25938 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
408396014742a05cad1c91949d2226169e3f9d80 02-Feb-2006 Chris Lattner <sabre@nondot.org> Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
9c8dd970f773f7481b83c9368ad6324f2e17b444 02-Feb-2006 Chris Lattner <sabre@nondot.org> implement isStoreToStackSlot


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25911 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b1b4e86a02c952f28cf8c5330679f67a5f68f93f 02-Feb-2006 Evan Cheng <evan.cheng@apple.com> Added SSE entries to foldMemoryOperand().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25888 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e3413160ca2fb42854b2a23be6b2114c1da2778c 09-Jan-2006 Evan Cheng <evan.cheng@apple.com> Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d9558e0ba6ddcf2798cfb88cc56e5f1c8135eb0d 06-Jan-2006 Evan Cheng <evan.cheng@apple.com> * Fast call support.
* FP cmp, setcc, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25117 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e4672aa5b42755d470f403b484958903227013ff 24-Dec-2005 Evan Cheng <evan.cheng@apple.com> Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25004 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
171049d10f71fdeffdfd9592243d7af40db86c71 23-Dec-2005 Evan Cheng <evan.cheng@apple.com> * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
58fe459e36605342410e8c11d12ee1901428b14b 21-Dec-2005 Chris Lattner <sabre@nondot.org> Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns
that were overloaded to work before and after the stackifier runs. With the
new clean world, it is possible to write patterns for these instructions: woo!

This also adds a few simple patterns here and there, though there are a lot
still missing. These should be easy to add though. :)

See the comments under "Floating Point Stack Support" for more details on
the new world order.

This patch as absolutely no effect on the generated code, woo!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24899 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
14e2cf62f43130a6ba5c4c72f83051a452633d8b 15-Oct-2005 Nate Begeman <natebegeman@mac.com> Properly split f32 and f64 into separate register classes for scalar sse fp
fixing a bunch of nasty hackery


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
56bcae0de9d51645193bdcdd4e8bdcf80b523276 30-Sep-2005 Chris Lattner <sabre@nondot.org> simplify this code using the new regclass info passed in


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23557 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
97d5e6461a28790fa341d9e3b58f043db549dc6a 30-Sep-2005 Chris Lattner <sabre@nondot.org> Pass extra regclasses into spilling code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a92aab74dd303c81537169cb53935665199c3afc 19-Sep-2005 Chris Lattner <sabre@nondot.org> Implement the isLoadFromStackSlot interface


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23387 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2505d6b72731628e34097adecc3dc6e26e220e04 19-Aug-2005 Chris Lattner <sabre@nondot.org> The simple isel being gone makes this dead!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
00b16889ab461b7ecef1c91ade101186b7f1fce2 27-Jul-2005 Jeff Cohen <jeffc@jolt-lang.org> Eliminate all remaining tabs and trailing spaces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f63be7d3959939b2ffaf0bba5519b71216ec9ee6 06-Jul-2005 Nate Begeman <natebegeman@mac.com> First round of support for doing scalar FP using the SSE2 ISA extension and
XMM registers. There are many known deficiencies and fixmes, which will be
addressed ASAP. The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.

The x86 backend will still default to x87 style FP. To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.

An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
Sum += P[i]; return Sum; }

The inner loop looks like the following:
x87:
.LBB_foo_1: # no_exit
fldl (%esp)
faddl (%eax,%ecx,8)
fstpl (%esp)
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit

SSE2:
addsd (%eax,%ecx,8), %xmm0
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22340 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5fae9ccd399e6fc7fc94d89a1adda517c12ed64b 15-May-2005 Chris Lattner <sabre@nondot.org> Teach reginfo how to deal with ADJSTACKPTRri, allowing us to generate:
add %ESP, 20
jmp %EDX # TAIL CALL

instead of:
add %ESP, -8
add %ESP, 28
jmp %EDX # TAIL CALL


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6972177bd497fd61d43ed90618fe11f827c441c5 15-May-2005 Chris Lattner <sabre@nondot.org> When emitting the function epilog, check to see if there already a stack
adjustment. If so, we merge the adjustment into the existing one. This
allows us to generate:

caller2:
sub %ESP, 12
mov DWORD PTR [%ESP], 0
mov %EAX, 1234567890
mov %EDX, 0
call func2
add %ESP, 8
ret 4

intead of:

caller2:
sub %ESP, 12
mov DWORD PTR [%ESP], 0
mov %EAX, 1234567890
mov %EDX, 0
call func2
sub %ESP, 4
add %ESP, 12
ret 4

for X86/fast-cc-merge-stack-adj.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22038 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2b3d56ee725fd353c161bd2775e8af4ce948ca4f 15-May-2005 Chris Lattner <sabre@nondot.org> Add some new instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22036 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3648c67eb260f9141b36571ed5435e4a78bd7c4f 13-May-2005 Chris Lattner <sabre@nondot.org> switch to having the callee pop stack operands for fastcc. This is currently buggy
do not use


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21984 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
24ddc6d06767059aa83db886503f90337f8fa7b4 13-May-2005 Chris Lattner <sabre@nondot.org> allow RETI


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21980 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
1e6a71524e6b048af22e8349e0a785596fb8aca6 06-Apr-2005 Chris Lattner <sabre@nondot.org> add signed versions of the extra precision multiplies


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
40ff633b05926efa2733f947e93a9f804d891613 19-Jan-2005 Chris Lattner <sabre@nondot.org> Add rotate instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19690 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0df53d22c33c4b34ce1e61dd26eeaee1898c09c0 19-Jan-2005 Chris Lattner <sabre@nondot.org> Improve coverage of the X86 instruction set by adding 16-bit shift doubles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
57fbfb5879f130fd8b191eada3046930882ab9ad 10-Jan-2005 Chris Lattner <sabre@nondot.org> Add conditional moves for the parity flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19437 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
eb96ec52ff77e6cfd97c71fbbab2ea19901fbe12 02-Jan-2005 Chris Lattner <sabre@nondot.org> Add support for SETNPr to lower to memory form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19248 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
45de191b0bb337142a3f2a09f5f7410844e46a81 02-Dec-2004 Chris Lattner <sabre@nondot.org> Spill/restore X86 floating point stack registers with 64-bits of precision
instead of 80-bits of precision. This fixes PR467.

This change speeds up fldry on X86 with LLC from 7.32s on apoc to 4.68s.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18433 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d93d3b047cad68de985d413d2cad953ac758d2a7 06-Oct-2004 Chris Lattner <sabre@nondot.org> Add some new instructions. Fix the asm string for sbb32rr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
551ccae044b0ff658fe629dd67edd5ffe75d10e8 02-Sep-2004 Reid Spencer <rspencer@reidspencer.com> Changes For Bug 352
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fae896999cae02516501f6cbefa91c9416d11eb4 21-Aug-2004 Chris Lattner <sabre@nondot.org> Reduce uses of getRegClass


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15973 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
01d0efba3982e98e2dc7bc534406fbf9fd1af137 16-Aug-2004 Chris Lattner <sabre@nondot.org> Code insertion methods now return void instead of an int.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15780 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
57f1b67c347b9ba1f8a1cdc3a55362d4f2aa8653 15-Aug-2004 Chris Lattner <sabre@nondot.org> These methods no longer take a TargetRegisterClass* operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f8be5e94aaf70d53dc043f5e541fc0bf6771db22 15-Aug-2004 Nate Begeman <natebegeman@mac.com> Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3b5e6e5f844fd102871649449da59859f15f1e67 17-Jul-2004 Chris Lattner <sabre@nondot.org> Reserve the correct amt of space.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14913 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0cf0c3746995e8b95fc055cdf8e7210200cb942d 11-Jul-2004 Chris Lattner <sabre@nondot.org> Delete the allocate*TargetMachine function, which is now dead .
The shared command line options are now in a header that makes sense.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14756 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
954da37bb492b519f5c31dc360f2a142567e08b4 04-Jul-2004 Reid Spencer <rspencer@reidspencer.com> Add #include <iostream> since Value.h does not #include it any more.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14622 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
66d6ee4247aa17b3019eb42f07b3842250b6f990 21-Jun-2004 Misha Brukman <brukman+llvm@gmail.com> Spell out `NoFramePointerElim' for readability.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14299 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
83eaa0b567156875d8d5f831dec0287627706da2 21-Jun-2004 Misha Brukman <brukman+llvm@gmail.com> Use the common `NoFPElim' setting instead of our own.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14298 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f70c22b019494723d0e706f93d6542dfaa6e73a5 17-Jun-2004 Chris Lattner <sabre@nondot.org> Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14201 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
665e661384b2882432f50803bea7234c5c7df81a 11-Jun-2004 Chris Lattner <sabre@nondot.org> Add support for the setp instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14140 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d029cd2d5a159823f20a91d30fd782aae871c589 02-Jun-2004 Chris Lattner <sabre@nondot.org> Convert to the new TargetMachine interface.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8b28b6d187282367e1d1c8f9a155a10bcfef52de 02-Apr-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add more ADC and SBB variants


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12607 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
87d3bb5dfa9b705952c89ca6e0dca251368a9457 30-Mar-2004 Chris Lattner <sabre@nondot.org> Implement spill code folding for all of the conditional move instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12554 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a1a7148c4de22a2cedc76b97ef80569b36698342 14-Mar-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Another API change to MRegisterInfo::foldMemoryOperand. Instead of a
MachineBasicBlock::iterator take a MachineInstr*.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12392 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
39354c99a158685d8bc91b0836c283e936a29cb2 14-Mar-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Change MRegisterInfo::foldMemoryOperand to return the folded
instruction to make the API more flexible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12386 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
13d362f31073524b7cc64a01955d50d9c0994c3c 07-Mar-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add memory operand version of conditional move.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12190 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8295f202d9cc37a6c325abd38e2feb5b47d7fc63 29-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> A big X86 instruction rename. The instructions are renamed to make
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:

ADD8rr -> add, 8-bit register, 8-bit register

IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate

IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate

MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11995 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
da474adb2117ac1647348aa381a95c7b6e1fb524 29-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them
to denote this fact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11972 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8e475b8cfdd3c7a86afa6aa21326c7bad0be7f02 29-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Floating point loads/stores act on memory operands. Rename them to
denote this fact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11971 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f8da4d8839ed2a6655db7099cc186dd9af39658f 28-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Uncomment instructions that take both an immediate and a memory
operand but their sizes differ.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
745502a04bc786053e7a19bf7f1266180a6985e9 28-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Do not generate instructions with mismatched memory/immediate sized
operands. The X86 backend doesn't handle them properly right now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11944 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
08388a4787e7cdbd19f4ba100f217254bfd55be3 27-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add memory operand folding support for the SETcc family of
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11907 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e56508eb7e21f6e0bfd3948379791e412f82ce58 27-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add memory operand folding support for SHLD and SHRD instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11905 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
58ec60589be9440af01bfa82adfdb5c9d86ecbeb 27-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add memory operand folding support for SHL, SHR and SAR, SHLD instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
890f92328d5478e050d2eba8f4de24737a04a812 22-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Move MOTy::UseType enum into MachineOperand. This eliminates the
switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11715 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f216421181393fd3993b47960de44ad448710fb9 22-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> When folding memory operands in machine instructions be careful to
leave register operands with the same use/def flags as the original
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11709 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
cc0d2f586f87a6aef77514ee75dab67cbfc235cb 17-Feb-2004 Chris Lattner <sabre@nondot.org> Add support for GlobalAddress's for alkis


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11560 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d886ed99fbd3528bdcebf324f747a9ae92977f06 17-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Instructiosn with 1 memory operand have 4 operands in our
representation.. duh!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11554 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f41dadafae176705cfd9514eee40cce1ec25b6c9 17-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Align case statements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11552 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
14ffe75c9c21311d6e54b87041f6b42a2d6fa933 17-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add TEST and XCHG memory operand support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11550 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
68bff8e15db12aa565818914cf7e452171f13e3a 17-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add OR and XOR memory operand support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11549 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a7be982e722c68d4f9ef7310348711e588b915a7 17-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT,
MOVSX, and MOVZX.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11546 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
89b0214b76078658a1324db6a6798721a4844f59 17-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add memory operand folding for CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32}
and DECm{8,16,32} instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11545 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
18bd7bb4d453e014c39729c4bf2b43f1846b8a9a 17-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add support for folding memory operands for ADC, SBB and SUB instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11541 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ee0919bb10735d25953998da6bd20383defdbbc6 17-Feb-2004 Chris Lattner <sabre@nondot.org> Add a (hidden) option to print instructions that fail to fuse. It's looking
like compares and test's would be the next huge win...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11539 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
17dc674c13d0c8b696672ca55cd0fb265e01a164 17-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add support for folding memory operands in MOVri{8,16,32} instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11538 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a7660be6c21f23922baf61c880ec8f2224c23200 17-Feb-2004 Chris Lattner <sabre@nondot.org> Add an option to disable spill fusing in the X86 backend


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11531 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e87331d11d153747cbb473a95c954693ad0c59b6 17-Feb-2004 Chris Lattner <sabre@nondot.org> Fix the mneumonics for the mov instructions to have the source and destination
order in the correct sense!! Arg!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11530 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f120ebbf8a8aa17d6ef31aacb1c53413bcf97e25 17-Feb-2004 Chris Lattner <sabre@nondot.org> GRRR. Move instructions have swapped the order of the r/m operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11528 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5a051f65d3074126b762eaf44b30c44e996577fe 17-Feb-2004 Chris Lattner <sabre@nondot.org> Change to match the newer, simpler, interface


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11525 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0f9c491abc098f9dc10050f82134c1beb9903413 17-Feb-2004 Chris Lattner <sabre@nondot.org> Add support for folding memory operands into AND and IMUL's


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11523 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7c035b73a4f433200cd720aaf673ab564fb393dd 17-Feb-2004 Chris Lattner <sabre@nondot.org> Scrunchify code, by adding helpers. No functionality changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11522 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b499866c05cac0e97a22c5e1f477c89096be836b 17-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Add API to check and fold memory operands into instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11519 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
96c3d2e2e783004654a55e305274a3741d44024a 15-Feb-2004 Chris Lattner <sabre@nondot.org> Fix the 'have a framepointer' case, so that the frame pointer always points
to the old saved EBP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e9dd84ea8a97c17b36a7bc489ca29947c8b3de69 14-Feb-2004 Chris Lattner <sabre@nondot.org> There is no reason to align the stack pointer if there are no callees of this
function!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
bb07ef97cfbe88eb5d69784acab5f36815738881 14-Feb-2004 Chris Lattner <sabre@nondot.org> The prologue/epilogue related method calls have no reason to return a value,
make them return void.

This allows us to avoid some costly MBB.size() calls


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11448 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
300d0eda6fe644a32c931a9c4eee02eebd289902 14-Feb-2004 Chris Lattner <sabre@nondot.org> finegrainify namespacification, fix 80col prob


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11445 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f81af21caf9c0f62c60b72762d9a927e8c24f679 14-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Use newly added next() and prior() utility functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11430 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
024126ee23e6e4430a77025b61d0e713180f03d3 12-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Change interface so that we can add to the end of a basic block
without getting an assertion from ilist that we are dereferencing
ilist<T>::end().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11345 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c0b9dc5be79f009d260edb5cd5e1d8346587aaa2 12-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Change MachineBasicBlock's vector of MachineInstr pointers into an
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
14be64018fb38d1fa535b9cd12d11371f4eba3b5 04-Feb-2004 Alkis Evlogimenos <alkis@evlogimenos.com> Modify the two address instruction pass to remove the duplicate
operand of the instruction and thus simplify the register allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d0fde30ce850b78371fd1386338350591f9ff494 11-Nov-2003 Brian Gaeke <gaeke@uiuc.edu> Put all LLVM code into the llvm namespace, as per bug 109.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
e668dab5b339df01920b8bff890a70455b7dd27a 04-Nov-2003 Alkis Evlogimenos <alkis@evlogimenos.com> Change all machine basic block modifier functions in MRegisterInfo to
return the number of instructions added to/removed from the basic block
passed as their first argument.

Note: This is only needed because we use a std::vector instead of an
ilist to keep MachineBasicBlock instructions. Inserting an instruction
to a MachineBasicBlock invalidates all iterators to the basic
block. The return value can be used to update an index to the machine
basic block instruction vector and circumvent the iterator elimination
problem but this is really not needed if we move to a better
representation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9704 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b576c94c15af9a440f69d9d03c2afead7971118c 20-Oct-2003 John Criswell <criswell@uiuc.edu> Added LLVM project notice to the top of every C++ source file.
Header files will be on the way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c2b81f69ed34754c38c9f5caf3277d058df00c58 14-Oct-2003 Chris Lattner <sabre@nondot.org> Output a contorted sequence of instructions to make sure that we don't access
off the bottom of the stack. This fixes PR#41


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9114 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d5b7c47b270c01cdc2a71fdb24789a6c8a4e80fd 14-Oct-2003 Chris Lattner <sabre@nondot.org> Disable the leaf function optimization, which is apparently not legal on
X86/linux. :( The problem is that a signal delivered while the function
is executing could clobber the functions stack. This is a partial fix
for PR41.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
5560c9d49ccae132cabf1155f18aa0480dce3eda 18-Aug-2003 Misha Brukman <brukman+llvm@gmail.com> Spell `necessary' correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7944 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6770aedf7f463201d787a4d1b5a61d9d6a51bd38 04-Aug-2003 Chris Lattner <sabre@nondot.org> Rename register classes to be upper case to make it obvious that they are X86
specific in the tree patterns


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
7ad3e063f508218a2823bd5cf092ef622ed7ba6c 03-Aug-2003 Chris Lattner <sabre@nondot.org> Switch over to TableGen generated register file description


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7511 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
c8c377d111e9f01d5ad7359bc9b655da565fdd41 29-Jul-2003 Chris Lattner <sabre@nondot.org> Move "register flags" definition the type of registers to be fully fledged
value types


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7377 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
ddd5b417c6eb7ee480976ec479e7c9e6a466f176 26-Feb-2003 Chris Lattner <sabre@nondot.org> Rename -no-* to -disable-*


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5642 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f158da2f78b5bedbffddeb15ff19de647954e645 16-Jan-2003 Chris Lattner <sabre@nondot.org> Implement code to keep the stack pointer aligned to an 8 byte boundary.
This improves the performance of the power benchmark by a few percent.
This will be neccesary for SSE code, which requires 16 byte alignment of
the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5320 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
eafa42388160fa28621934392a7c5a22dbea54d0 15-Jan-2003 Chris Lattner <sabre@nondot.org> Handle frame offset due to return address pushed on the stack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5319 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
d264bec88a2c6fb75fe71a030b303569efc8da1a 13-Jan-2003 Chris Lattner <sabre@nondot.org> * Move frame and constant pool indexes to first argument of memory reference
so we can put an offset in there as well...
* Fix long/ulong stuff


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5231 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
aa09b75d2257545c4583265c7ce10f2d0e3be72b 28-Dec-2002 Chris Lattner <sabre@nondot.org> Rename FunctionFrameInfo to MachineFrameInfo


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5201 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3c1c03d7a76e51f5a668fcf27fccc3fb91675ced 28-Dec-2002 Chris Lattner <sabre@nondot.org> *** Implement frame pointer elimination on X86!
* Include contents of X86RegisterClasses.cpp into here
* Adjustments to register api to work with new frame manager
* Eliminate moveImm2Reg, getFramePointer, and getStackPointer
* Cleanup and simplify prolog/epilog code generation
* Prolog/epilog are MUCH more efficient now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5186 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8e581790489cedd2a734e833973415b79d9e791a 25-Dec-2002 Chris Lattner <sabre@nondot.org> New simpler spill interface


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5148 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fc1c705965643ec22a1791e8ab06f0a6f720caaf 24-Dec-2002 Chris Lattner <sabre@nondot.org> Fix compilation on gcc 2.96


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5116 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6eaa46956aa0b35d7b4b1d49fd70d077870a296e 20-Dec-2002 Chris Lattner <sabre@nondot.org> Fix warning


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5109 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
79de6319b1ff6a5609c4ef0d4a0d603b66127a20 17-Dec-2002 Chris Lattner <sabre@nondot.org> Update to use new interface for register info


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5098 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3bbe7cc51dd402871d206ca3fb77f84240e0c100 17-Dec-2002 Chris Lattner <sabre@nondot.org> Round number of bytes allocated on the stack up to a multiple of 4 so that the
stack remains aligned


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6c6cf873f33440fca780e9c3bb28586165798e74 17-Dec-2002 Chris Lattner <sabre@nondot.org> Register allocator is responsible for spilling callee saved regs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
3fc14c2602b37863c65c47b9e3eef1b93c4e6f40 16-Dec-2002 Chris Lattner <sabre@nondot.org> Fix prolog/epilog in the presence of alloca


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5087 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
27177cb1c1f0cf39945b0328b0a732b349b93dbd 16-Dec-2002 Chris Lattner <sabre@nondot.org> Finish implementation of alias list impl


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5083 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
92aec04cd64836449c788dadc40e0d98a9fce482 16-Dec-2002 Chris Lattner <sabre@nondot.org> Try #2 to get alias set stuff to work


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5077 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
dfb0a541c7938e0f9451edbaaaec4527fd9fa484 16-Dec-2002 Chris Lattner <sabre@nondot.org> Add info about register file aliasing


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5074 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
f4b95d94e2acd3bd82504087b93e6177f7a8bc58 15-Dec-2002 Chris Lattner <sabre@nondot.org> Correct the setting of Def flags on registers that are modified!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5065 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
198ab640bbb0b8e1cdda518b7f8b348764e4402c 15-Dec-2002 Chris Lattner <sabre@nondot.org> Simplify interfaces used by regalloc to insert code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
87e369d2217d5932f5c2deff5b3db63f0085dffc 13-Dec-2002 Misha Brukman <brukman+llvm@gmail.com> Cleaned up the code: factored out switch/case into a separate function, put
constants in an array for quick lookup. Stole the idea from elsewhere in
Jello.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5017 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
fa18ade05b006cc7e170a0ee89962f990448a2f6 13-Dec-2002 Misha Brukman <brukman+llvm@gmail.com> Treat longs as ints => pretend they're all 32-bit values and squeeze them into
32-bit registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5008 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2b46e8ecccfe8a6adc861158a21b67fb9e786885 13-Dec-2002 Misha Brukman <brukman+llvm@gmail.com> Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to
PHI nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5001 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
07e376bd0de0ae8451c9036310e670f098555c7a 13-Dec-2002 Misha Brukman <brukman+llvm@gmail.com> Moves now select correct opcode based on the data size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4981 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
2adb3959f629bdacab0e47b29e52139595523236 05-Dec-2002 Misha Brukman <brukman+llvm@gmail.com> Implemented functions for emitting prologues and epilogues;
removed EBP from the list of callee-saved registers (it isn't one).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4929 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
a361c8417b9c2381a097a6dfdbfb7ac0d8379a69 04-Dec-2002 Misha Brukman <brukman+llvm@gmail.com> storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value
instead of by reference, since they return the modified iterator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4914 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
0af0d5bd3e38dfcf29aec3e9982e3097a6e491d9 04-Dec-2002 Misha Brukman <brukman+llvm@gmail.com> Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since
it is target-independent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4911 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
03c6fafd05c067d934d15ce8f472cb09740d0133 04-Dec-2002 Misha Brukman <brukman+llvm@gmail.com> Added support for callee- and caller-save registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4897 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
6877dd3fb05bb7f8fabf907e520c7d3ae0fab341 02-Dec-2002 Misha Brukman <brukman+llvm@gmail.com> Fix order of operands on a store from reg to [reg+offset].


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4857 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
8b938664f29e7634b401368f018a398de4c54100 23-Nov-2002 Misha Brukman <brukman+llvm@gmail.com> Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out
instructions correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4830 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
cf2b9ac204078defaa01327a21a3fc15a25c2816 22-Nov-2002 Misha Brukman <brukman+llvm@gmail.com> Added methods to read/write values to stack in .h, fixed implementation in
.cpp to return the iterator correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4827 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
b83b28697ccabfcb6b8ddbc73fb3c4554f6d17ce 20-Nov-2002 Misha Brukman <brukman+llvm@gmail.com> Add definitions for function headers from MRegisterInfo.h:
Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4784 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86RegisterInfo.cpp
726140821f96e3472a8eccef0c67c0b5ad65a1d9 26-Oct-2002 Chris Lattner <sabre@nondot.org> Initial checkin of X86 backend.
We can instruction select exactly one instruction 'ret void'. Wow.


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/external/llvm/lib/Target/X86/X86RegisterInfo.cpp