X86RegisterInfo.cpp revision 7ad3e063f508218a2823bd5cf092ef622ed7ba6c
1//===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===// 2// 3// This file contains the X86 implementation of the MRegisterInfo class. This 4// file is responsible for the frame pointer elimination optimization on X86. 5// 6//===----------------------------------------------------------------------===// 7 8#include "X86.h" 9#include "X86RegisterInfo.h" 10#include "X86InstrBuilder.h" 11#include "llvm/Constants.h" 12#include "llvm/Type.h" 13#include "llvm/CodeGen/ValueTypes.h" 14#include "llvm/CodeGen/MachineInstrBuilder.h" 15#include "llvm/CodeGen/MachineFunction.h" 16#include "llvm/CodeGen/MachineFrameInfo.h" 17#include "llvm/Target/TargetMachine.h" 18#include "llvm/Target/TargetFrameInfo.h" 19#include "Support/CommandLine.h" 20 21namespace { 22 cl::opt<bool> 23 NoFPElim("disable-fp-elim", 24 cl::desc("Disable frame pointer elimination optimization")); 25} 26 27X86RegisterInfo::X86RegisterInfo() 28 : X86GenRegisterInfo(X86::ADJCALLSTACKDOWN, X86::ADJCALLSTACKUP) {} 29 30static unsigned getIdx(const TargetRegisterClass *RC) { 31 switch (RC->getSize()) { 32 default: assert(0 && "Invalid data size!"); 33 case 1: return 0; 34 case 2: return 1; 35 case 4: return 2; 36 case 10: return 3; 37 } 38} 39 40void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, 41 MachineBasicBlock::iterator &MBBI, 42 unsigned SrcReg, int FrameIdx, 43 const TargetRegisterClass *RC) const { 44 static const unsigned Opcode[] = 45 { X86::MOVrm8, X86::MOVrm16, X86::MOVrm32, X86::FSTPr80 }; 46 MachineInstr *MI = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5), 47 FrameIdx).addReg(SrcReg); 48 MBBI = MBB.insert(MBBI, MI)+1; 49} 50 51void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, 52 MachineBasicBlock::iterator &MBBI, 53 unsigned DestReg, int FrameIdx, 54 const TargetRegisterClass *RC) const{ 55 static const unsigned Opcode[] = 56 { X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FLDr80 }; 57 MachineInstr *MI = addFrameReference(BuildMI(Opcode[getIdx(RC)], 4, DestReg), 58 FrameIdx); 59 MBBI = MBB.insert(MBBI, MI)+1; 60} 61 62void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB, 63 MachineBasicBlock::iterator &MBBI, 64 unsigned DestReg, unsigned SrcReg, 65 const TargetRegisterClass *RC) const { 66 static const unsigned Opcode[] = 67 { X86::MOVrr8, X86::MOVrr16, X86::MOVrr32, X86::FpMOV }; 68 MachineInstr *MI = BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg); 69 MBBI = MBB.insert(MBBI, MI)+1; 70} 71 72//===----------------------------------------------------------------------===// 73// Stack Frame Processing methods 74//===----------------------------------------------------------------------===// 75 76// hasFP - Return true if the specified function should have a dedicated frame 77// pointer register. This is true if the function has variable sized allocas or 78// if frame pointer elimination is disabled. 79// 80static bool hasFP(MachineFunction &MF) { 81 return NoFPElim || MF.getFrameInfo()->hasVarSizedObjects(); 82} 83 84// hasSPAdjust - Return true if this function has ESP adjustment instructions in 85// the prolog and epilog which allocate local stack space. This is neccesary 86// because we elide these instructions if there are no function calls in the 87// current function (ie, this is a leaf function). In this case, we can refer 88// beyond the stack pointer because we know that nothing will trample on that 89// part of the stack. 90// 91static bool hasSPAdjust(MachineFunction &MF) { 92 assert(!hasFP(MF) && "Can only eliminate SP adjustment if no frame-pointer!"); 93 return MF.getFrameInfo()->hasCalls(); 94} 95 96void X86RegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF, 97 MachineBasicBlock &MBB, 98 MachineBasicBlock::iterator &I) const { 99 MachineInstr *New = 0, *Old = *I;; 100 if (hasFP(MF)) { 101 // If we have a frame pointer, turn the adjcallstackup instruction into a 102 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP, 103 // <amt>' 104 unsigned Amount = Old->getOperand(0).getImmedValue(); 105 if (Amount != 0) { 106 // We need to keep the stack aligned properly. To do this, we round the 107 // amount of space needed for the outgoing arguments up to the next 108 // alignment boundary. 109 unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment(); 110 Amount = (Amount+Align-1)/Align*Align; 111 112 if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) { 113 New=BuildMI(X86::SUBri32, 2, X86::ESP).addReg(X86::ESP).addZImm(Amount); 114 } else { 115 assert(Old->getOpcode() == X86::ADJCALLSTACKUP); 116 New=BuildMI(X86::ADDri32, 2, X86::ESP).addReg(X86::ESP).addZImm(Amount); 117 } 118 } 119 } 120 121 if (New) 122 *I = New; // Replace the pseudo instruction with a new instruction... 123 else 124 I = MBB.erase(I);// Just delete the pseudo instruction... 125 delete Old; 126} 127 128void X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF, 129 MachineBasicBlock::iterator &II) const { 130 unsigned i = 0; 131 MachineInstr &MI = **II; 132 while (!MI.getOperand(i).isFrameIndex()) { 133 ++i; 134 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 135 } 136 137 int FrameIndex = MI.getOperand(i).getFrameIndex(); 138 139 // This must be part of a four operand memory reference. Replace the 140 // FrameIndex with base register with EBP. Add add an offset to the offset. 141 MI.SetMachineOperandReg(i, hasFP(MF) ? X86::EBP : X86::ESP); 142 143 // Now add the frame object offset to the offset from EBP. 144 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) + 145 MI.getOperand(i+3).getImmedValue()+4; 146 147 if (!hasFP(MF) && hasSPAdjust(MF)) { 148 const MachineFrameInfo *MFI = MF.getFrameInfo(); 149 Offset += MFI->getStackSize(); 150 } 151 152 MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset); 153} 154 155void X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF) 156 const { 157 if (hasFP(MF)) { 158 // Create a frame entry for the EBP register that must be saved. 159 int FrameIdx = MF.getFrameInfo()->CreateStackObject(4, 4); 160 assert(FrameIdx == MF.getFrameInfo()->getObjectIndexEnd()-1 && 161 "Slot for EBP register must be last in order to be found!"); 162 } 163} 164 165void X86RegisterInfo::emitPrologue(MachineFunction &MF) const { 166 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB 167 MachineBasicBlock::iterator MBBI = MBB.begin(); 168 MachineFrameInfo *MFI = MF.getFrameInfo(); 169 MachineInstr *MI; 170 171 // Get the number of bytes to allocate from the FrameInfo 172 unsigned NumBytes = MFI->getStackSize(); 173 if (hasFP(MF)) { 174 // Get the offset of the stack slot for the EBP register... which is 175 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized. 176 int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4; 177 178 MI = addRegOffset(BuildMI(X86::MOVrm32, 5), // mov [ESP-<offset>], EBP 179 X86::ESP, EBPOffset).addReg(X86::EBP); 180 MBBI = MBB.insert(MBBI, MI)+1; 181 182 MI = BuildMI(X86::MOVrr32, 2, X86::EBP).addReg(X86::ESP); 183 MBBI = MBB.insert(MBBI, MI)+1; 184 } else { 185 // If we don't have a frame pointer, and the function contains no call sites 186 // (it's a leaf function), we don't have to emit ANY stack adjustment 187 // instructions at all, we can just refer to the area beyond the stack 188 // pointer. This can be important for small functions. 189 // 190 if (!hasSPAdjust(MF)) return; 191 192 // When we have no frame pointer, we reserve argument space for call sites 193 // in the function immediately on entry to the current function. This 194 // eliminates the need for add/sub ESP brackets around call sites. 195 // 196 NumBytes += MFI->getMaxCallFrameSize(); 197 198 // Round the size to a multiple of the alignment (don't forget the 4 byte 199 // offset though). 200 unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment(); 201 NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4; 202 203 // Update frame info to pretend that this is part of the stack... 204 MFI->setStackSize(NumBytes); 205 } 206 207 if (NumBytes) { 208 // adjust stack pointer: ESP -= numbytes 209 MI = BuildMI(X86::SUBri32, 2, X86::ESP).addReg(X86::ESP).addZImm(NumBytes); 210 MBBI = 1+MBB.insert(MBBI, MI); 211 } 212} 213 214void X86RegisterInfo::emitEpilogue(MachineFunction &MF, 215 MachineBasicBlock &MBB) const { 216 const MachineFrameInfo *MFI = MF.getFrameInfo(); 217 MachineBasicBlock::iterator MBBI = MBB.end()-1; 218 MachineInstr *MI; 219 assert((*MBBI)->getOpcode() == X86::RET && 220 "Can only insert epilog into returning blocks"); 221 222 if (hasFP(MF)) { 223 // Get the offset of the stack slot for the EBP register... which is 224 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized. 225 int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4; 226 227 // mov ESP, EBP 228 MI = BuildMI(X86::MOVrr32, 1,X86::ESP).addReg(X86::EBP); 229 MBBI = 1+MBB.insert(MBBI, MI); 230 231 // mov EBP, [ESP-<offset>] 232 MI = addRegOffset(BuildMI(X86::MOVmr32, 5, X86::EBP), X86::ESP, EBPOffset); 233 MBBI = 1+MBB.insert(MBBI, MI); 234 } else { 235 if (!hasSPAdjust(MF)) return; 236 237 // Get the number of bytes allocated from the FrameInfo... 238 unsigned NumBytes = MFI->getStackSize(); 239 240 if (NumBytes) { // adjust stack pointer back: ESP += numbytes 241 MI =BuildMI(X86::ADDri32, 2, X86::ESP).addReg(X86::ESP).addZImm(NumBytes); 242 MBBI = 1+MBB.insert(MBBI, MI); 243 } 244 } 245} 246 247#include "X86GenRegisterInfo.inc" 248 249const TargetRegisterClass* 250X86RegisterInfo::getRegClassForType(const Type* Ty) const { 251 switch (Ty->getPrimitiveID()) { 252 case Type::LongTyID: 253 case Type::ULongTyID: assert(0 && "Long values can't fit in registers!"); 254 default: assert(0 && "Invalid type to getClass!"); 255 case Type::BoolTyID: 256 case Type::SByteTyID: 257 case Type::UByteTyID: return &r8Instance; 258 case Type::ShortTyID: 259 case Type::UShortTyID: return &r16Instance; 260 case Type::IntTyID: 261 case Type::UIntTyID: 262 case Type::PointerTyID: return &r32Instance; 263 264 case Type::FloatTyID: 265 case Type::DoubleTyID: return &rFPInstance; 266 } 267} 268