cd0295d81b6d53bbade117a0531b2453e8cb7c7f |
|
01-Apr-2017 |
Chris Larsen <chris.larsen@imgtec.com> |
MIPS: Use Lsa/Dlsa when possible. For MIPS32R6 replace instances of "sll/addu" to calculate the address of an item in an array with "lsa". For other versions of MIPS32 use the "sll/addu" sequence. Encapsulate this logic in an assembler method to eliminate having a lot of statements like "if (IsR6()) { ... } else { ... }" scattered throughout the code. MIPS64 always supports R6. This means that all instances of "dsll/daddu" used to calculate the address of an item in an array can be replaced by "dlsa" so there is no need to encapsulate conditional logic in a special method. The code can just emit "dlsa" directly. Test: mma -j2 ART_TEST_OPTIMIZING=true test-art-target-run-test Tested on MIPS32, and MIPS64 QEMU. Test: "make test-art-target-gtest32" on CI20 board. Test: "cd art; test/testrunner/testrunner.py --target --optimizing --32" on CI20 board. Change-Id: Ibe5facc1bc2a6a7a6584e23d3a48e163ae38077d
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c061de1236e98fdd34d0214a9bbcc0e2149ff226 |
|
14-Feb-2017 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS: Implement heap poisoning in ART's Optimizing compiler. This is in preparation for read barrier support. Bug: 12687968 Test: test-art-host-gtest Test: booted MIPS32R2 in QEMU Test: test-art-target Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target (both MIPS64R6 and MIPS32R6) Note: built with ART_HEAP_POISONING=true. Change-Id: I0e6e04ff8de2fc8ca6126388409fa218e6920734
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692235eb54544277e2bde862caa6038472fab833 |
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22-Nov-2016 |
Chris Larsen <chris.larsen@imgtec.com> |
MIPS32: java.lang.String.getChars Use memcpy(3) to copy characters under the assumption that memcpy() has been hand optimized for best performance on the platform being tested. Test: run-test --optimizing 020-string Test: run-test 020-string Test: run-test --no-prebuild --optimizing 020-string Test: run-test --no-prebuild 020-string Test: run-test --optimizing 082-inline-execute Test: run-test 082-inline-execute Test: run-test --no-prebuild --optimizing 082-inline-execute Test: run-test --no-prebuild 082-inline-execute Test: mma -j2 ART_TEST_OPTIMIZING=true test-art-target-run-test Test: booted MIPS32R2 emulator. Note: Tested against both the MIPS32R2, and MIPS64R6 emulators. Change-Id: I4192cf6244db120c8de5cc4932d4132acfc9740d
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1b8464d17c2266763714ae18be7c4dc26e28bf61 |
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13-Nov-2016 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Pass more arguments in registers. Specifically, use A0-A3,T0-T1 for non-floats and F8-F19 for floats. Test: booted MIPS32R2 in QEMU Test: test-art-target-run-test-optimizing (MIPS32R2) on CI20 Test: test-art-target-gtest (MIPS32R2) on CI20 Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target-run-test-optimizing (MIPS32R6) in QEMU Test: test-art-target-gtest (MIPS32R6) in QEMU Test: test-art-host-gtest Change-Id: Ib8b0310a109d9f3d70119c1e605e54b013e60728
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674b9ee50c812d684a27a28cf09098195f068f3d |
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20-Sep-2016 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Implement HSelect Test: booted MIPS32R2 in QEMU Test: test-art-target-run-test-optimizing (MIPS32R2) on CI20 Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target-run-test-optimizing (MIPS32R6) in QEMU Test: test-art-host-gtest Change-Id: I8a8127d8d29cb5df84ed6f4fd4478f8d889e5cb7
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96b6682d2d65f94c262590ef88bafdc70171ab8c |
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10-Sep-2016 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Implement table-based packed switch Test: booted MIPS32R2 in QEMU Test: test-art-target-run-test-optimizing (MIPS32R2) on CI20 Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target-run-test-optimizing (MIPS32R6) in QEMU Test: test-art-host-gtest Change-Id: I2e1a65ff1ba9406b84351ba7998f853b1ce4aef9
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57eb0f58419e0e6773f69cf6e0c78e5fed0464cd |
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30-Jul-2016 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Fill branch delay slots Test: booted MIPS32 in QEMU Test: test-art-host-gtest Test: test-art-target-gtest Test: test-art-target-run-test-optimizing on CI20 Change-Id: I727e80753395ab99fff004cb5d2e0a06409150d7
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2923db7314da613d50c9e6e44f38bb8d3e1c49f0 |
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20-Aug-2016 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Refactor implicit null checks in array/field get/set. Rationale: on MIPS32 64-bit loads and stores may be performed as pairs of 32-bit loads/stores. Implicit null checks must be associated with the first 32-bit load/store in a pair and not the last. This change ensures proper association of said checks (a few were done after the last 32-bit load/store in a pair) and lays ground for further improvements in array/field get/set. Test: booted MIPS32 in QEMU Test: test-art-host-gtest Test: test-art-target-run-test-optimizing in QEMU Change-Id: I3674947c00bb17930790a7a47c9b7aadc0c030b8
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3b165bc53c2f063e3a9c644d0edc7bc30c634884 |
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02-Aug-2016 |
Andreas Gampe <agampe@google.com> |
ART: Extract macro assembler Extract macro assembler functionality used by the JNI compiler from the assembler interface. Templatize the new interface so that type safety ensures correct usage. Change-Id: Idb9f56e5b87e43ee6a7378853d8a9f01abe156b2 Test: m test-art-host
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542451cc546779f5c67840e105c51205a1b0a8fd |
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26-Jul-2016 |
Andreas Gampe <agampe@google.com> |
ART: Convert pointer size to enum Move away from size_t to dedicated enum (class). Bug: 30373134 Bug: 30419309 Test: m test-art-host Change-Id: Id453c330f1065012e7d4f9fc24ac477cc9bb9269
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06a46c44bf1a5cba6c78c3faffc4e7ec1442b210 |
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20-Jul-2016 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Improve string and class loads Tested: - MIPS32 Android boots in QEMU - test-art-host-gtest - test-art-target-run-test-optimizing in QEMU, on CI20 - test-art-target-gtest on CI20 Change-Id: I70fd5d5267f8594c3b29d5a4ccf66b8ca8b09df3
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e3fb245fbdb5e91cf8a9750504df40bd629e0080 |
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11-May-2016 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Improve method invocation Improvements include: - CodeGeneratorMIPS::GenerateStaticOrDirectCall() supports: - MethodLoadKind::kDirectAddressWithFixup (via literals) - CodePtrLocation::kCallDirectWithFixup (via literals) - MethodLoadKind::kDexCachePcRelative - 32-bit literals to support the above (not ready for general- purpose applications yet because RA is not saved in leaf methods, but is clobbered on MIPS32R2 when simulating PC-relative addressing (MIPS32R6 is OK because it has PC-relative addressing with the lwpc instruction)) - shorter instruction sequences for recursive static/direct calls Tested: - test-art-host-gtest - test-art-target-gtest and test-art-target-run-test-optimizing on: - MIPS32R2 QEMU - CI20 board - MIPS32R6 (2nd arch) QEMU Change-Id: Id5b137ad32d5590487fd154c9a01d3b3e7e044ff
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cad3a4c890a5df1dfd294b74384ca3c27888cd0a |
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08-Jun-2016 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Improve offset calculations in loads and stores Change-Id: I6c3773e8bc1233bcda83d5b7254438ef69e9570d
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3224838dfe9c95330ad963286f2c47e9546d3b5c |
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19-May-2016 |
Vladimir Marko <vmarko@google.com> |
Clean up JNI calling convention callee saves. Precalculate callee saves at compile time and return them as ArrayRef<> instead of keeping then in a std::vector<>. Change-Id: I4fd7d2bbf6138dc31b0fe8554eac35b0777ec9ef
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51aff3a6564303cab0b7ac82495b4e2e349c6ff3 |
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18-Mar-2016 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Implement UnsafeCASInt and UnsafeCASObject intrinsics. Change-Id: Ie871763b9a36075fd3d70ee6e2e241ae1ccc36cf
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b74353a6765447b1551b337fd76803eb6aa86b8b |
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20-Nov-2015 |
Chris Larsen <chris.larsen@imgtec.com> |
MIPS32: Implement intrinsics from java.lang.Math: - abs(double) - abs(float) - abs(int) - abs(long) - max(double, double) - max(float, float) - max(int, int) - max(long, long) - min(double, double) - min(float, float) - min(int, int) - min(long, long) - sqrt(double) The math intrinsics: - ceil(double) - floor(double) - rint(double) - round(double) - round(float) aren't implemented because they require instructions which only exist for MIPS64, or for MIPS32r6. Change-Id: I943be3592b52a423fcb7ac40f46f38a5e2a58c50
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3acee732f9475fbfc6b046e0044b764e7ff5ac01 |
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18-Nov-2015 |
Chris Larsen <chris.larsen@imgtec.com> |
MIPS32: peek*/poke*, and String.charAt intrinsics. - byte libcore.io.Memory.peekByte(long address) - short libcore.io.Memory.peekShort(long address) - int libcore.io.Memory.peekInt(long address) - long libcore.io.Memory.peekLong(long address) - void libcore.io.Memory.pokeByte(long address, byte value) - void libcore.io.Memory.pokeShort(long address, short value) - void libcore.io.Memory.pokeInt(long address, int value) - void libcore.io.Memory.pokeLong(long address, long value) - char java.lang.String.charAt(int index) Change-Id: I5ff30b61d87313d00f0fd3f0ee09f1c454f9c9fa
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bb9863af3a98622e650de78fb235ab484b50eb1f |
|
12-Jan-2016 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: don't use R2+ instructions (mthc1, mfhc1) on MIPS32R1 or with 32-bit FPUs. Change-Id: If66932fb39cdd5946f6c05c82036191ad405a877
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baf60b7cceb3968ae36540e2f7f92cec3805f6ed |
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23-Dec-2015 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS: Improve conversion between ints and floats. Change-Id: I767fe9623cc14e8480c31e305725eb5221cac282
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5c7aed3b9844e240cf785e5885524ac133a04396 |
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26-Nov-2015 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: improvements in code generation (mostly 64-bit ALU ops) Specifically: - Use the delay slot in InvokeRuntime() for direct entry points - Use kNoOutputOverlap wherever possible - Improve and/or/xor/add/sub with 64-bit integer constants - Improve 64-bit shifts by a constant amount on R2+ - More efficient load/store of 64-bit constants (especially, 0 & +0.0) Change-Id: I86d2217c8b5b8e2a9371effc2ce38b9eec62782b
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cd7b0ee296b0462961c63e51d99c9c323e2690df |
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04-Dec-2015 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Fuse long and FP compare & condition in Optimizing. This also does a minor clean-up in the assembler and its test. Bug: 25559148 Change-Id: I9bad3c500b592a09013b56745f70752eb284a842
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e16ce5a52da4fcbb8c6b5d1ec696863fcf113409 |
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18-Nov-2015 |
Chris Larsen <chris.larsen@imgtec.com> |
MIPS32: Bit rotation intrinsics - int java.lang.Integer.rotateLeft(int i, int distance) - int java.lang.Integer.rotateRight(int i, int distance) - long java.lang.Long.rotateLeft(long i, int distance) - long java.lang.Long.rotateRight(long i, int distance) Change-Id: I7620ee12562c0dd55476a1d54e225c5e624cfb5b
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e384547851a9d9e5d89ae5bb4c16bfd7d93cc12e |
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18-Nov-2015 |
Chris Larsen <chris.larsen@imgtec.com> |
MIPS32: int java.lang.*.numberOfLeadingZeros - int java.lang.Integer.numberOfLeadingZeros(int) - int java.lang.Long.numberOfLeadingZeros(long) Change-Id: Icaf746cb807863f944ff4ebb5da6e6b2846eac58
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70014c8af8d3a20c2987c308788bc86671bc39e9 |
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18-Nov-2015 |
Chris Larsen <chris.larsen@imgtec.com> |
MIPS32: java.lang.*.reverse - int java.lang.Integer.reverse(int) - long java.lang.Long.reverse(long) Change-Id: I18d0f784b9e4bffdc1bda3604f4ed7d3c57b8d68
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7e99e054d023af878d6632bc8c8ba07357ded294 |
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25-Nov-2015 |
Alexey Frunze <Alexey.Frunze@imgtec.com> |
MIPS32: Improve integer division by constants Change-Id: I2d1e84e84bdf8d3007cde7c51611ec893a0e9527
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3f8bf65f36e14650bb6eb6876a42d9344a9d64d9 |
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28-Oct-2015 |
Chris Larsen <chris.larsen@imgtec.com> |
MIPS32: Miscellaneous bit manipulations routines: - short java.lang.Short.reverseBytes(short) - int java.lang.Integer.reverseBytes(int) - long java.lang.Long.reverseBytes(long) - float java.lang.Float.intBitsToFloat(int) - double java.lang.Double.longBitsToDouble(long) - int java.lang.Float.floatToRawIntBits(float) - long java.lang.Double.doubleToRawLongBits(double) Change-Id: Id9803349d465c28756820e90e2cbe633f3f40a44
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10ef6941648aad04d54527d4a7a6070bf7065e88 |
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22-Oct-2015 |
Vladimir Marko <vmarko@google.com> |
Delay emitting CFI PC adjustments until after Thumb2/Mips fixup. On Mips also take into account out-of-order CFI data emitted from EmitBranches(). Change-Id: I03b0b0b4c2b1ea31a02699ef5fa1c55aa42c23c3
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8c434dcc78d497e18590461700894d1c3e96013d |
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26-Aug-2015 |
Goran Jakovljevic <Goran.Jakovljevic@imgtec.com> |
MIPS: Assemblers changes needed for optimizing compiler Also add assembler tests for MIPS32. Change-Id: I3ab1fba7f3b06eb3b5058861946d675494a30775
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ff73498a5539d87424a964265e43765e788aec44 |
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24-Aug-2015 |
Goran Jakovljevic <Goran.Jakovljevic@imgtec.com> |
Revert "Revert "[MIPS] Use hard float calling convention for managed code"" This reverts commit 7fee84c087e0f903e7d43bef180df047db1c8051. Fixed issue with temporary registers on Mips32r6. Change-Id: I93018927e6a6036cff2d55e6cda66d3212a4316b
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7fee84c087e0f903e7d43bef180df047db1c8051 |
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21-Aug-2015 |
Vladimir Marko <vmarko@google.com> |
Revert "[MIPS] Use hard float calling convention for managed code" MipsMir2Lir::LockCallTemps() is broken for secondary architecture on aosp_mips64-eng. This reverts commit a29449dcf57c57fe0876f51367985477317cc557. Change-Id: I480ea7569d73aea7894fc0a6dd804b1135286a37
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a29449dcf57c57fe0876f51367985477317cc557 |
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22-Jul-2015 |
Goran Jakovljevic <Goran.Jakovljevic@imgtec.com> |
[MIPS] Use hard float calling convention for managed code Note that this isn't o32 ABI. Same set of registers is used for arguments ($a0-$a3 and $f12-$f15), but we don't skip registers and fp arguments are never passed via core registers. Change-Id: Ifb883ff6e15758b539137898b49ac2f8ee075f49
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4d02711ea578dbb789abb30cbaf12f9926e13d81 |
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01-Jul-2015 |
Roland Levillain <rpl@google.com> |
Implement heap poisoning in ART's Optimizing compiler. - Instrument ARM, ARM64, x86 and x86-64 code generators. - Note: To turn heap poisoning on in Optimizing, set the environment variable `ART_HEAP_POISONING' to "true" before compiling ART. Bug: 12687968 Change-Id: Ib3120b38cf805a8a50207a314b9ccc90c8d93740
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3d21bdf8894e780d349c481e5c9e29fe1556051c |
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22-Apr-2015 |
Mathieu Chartier <mathieuc@google.com> |
Move mirror::ArtMethod to native Optimizing + quick tests are passing, devices boot. TODO: Test and fix bugs in mips64. Saves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS. Some of the savings are from removal of virtual methods and direct methods object arrays. Bug: 19264997 (cherry picked from commit e401d146407d61eeb99f8d6176b2ac13c4df1e33) Change-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d Fix some ArtMethod related bugs Added root visiting for runtime methods, not currently required since the GcRoots in these methods are null. Added missing GetInterfaceMethodIfProxy in GetMethodLine, fixes --trace run-tests 005, 044. Fixed optimizing compiler bug where we used a normal stack location instead of double on ARM64, this fixes the debuggable tests. TODO: Fix JDWP tests. Bug: 19264997 Change-Id: I7c55f69c61d1b45351fd0dc7185ffe5efad82bd3 ART: Fix casts for 64-bit pointers on 32-bit compiler. Bug: 19264997 Change-Id: Ief45cdd4bae5a43fc8bfdfa7cf744e2c57529457 Fix JDWP tests after ArtMethod change Fixes Throwable::GetStackDepth for exception event detection after internal stack trace representation change. Adds missing ArtMethod::GetInterfaceMethodIfProxy call in case of proxy method. Bug: 19264997 Change-Id: I363e293796848c3ec491c963813f62d868da44d2 Fix accidental IMT and root marking regression Was always using the conflict trampoline. Also included fix for regression in GC time caused by extra roots. Most of the regression was IMT. Fixed bug in DumpGcPerformanceInfo where we would get SIGABRT due to detached thread. EvaluateAndApplyChanges: From ~2500 -> ~1980 GC time: 8.2s -> 7.2s due to 1s less of MarkConcurrentRoots Bug: 19264997 Change-Id: I4333e80a8268c2ed1284f87f25b9f113d4f2c7e0 Fix bogus image test assert Previously we were comparing the size of the non moving space to size of the image file. Now we properly compare the size of the image space against the size of the image file. Bug: 19264997 Change-Id: I7359f1f73ae3df60c5147245935a24431c04808a [MIPS64] Fix art_quick_invoke_stub argument offsets. ArtMethod reference's size got bigger, so we need to move other args and leave enough space for ArtMethod* and 'this' pointer. This fixes mips64 boot. Bug: 19264997 Change-Id: I47198d5f39a4caab30b3b77479d5eedaad5006ab
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e401d146407d61eeb99f8d6176b2ac13c4df1e33 |
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22-Apr-2015 |
Mathieu Chartier <mathieuc@google.com> |
Move mirror::ArtMethod to native Optimizing + quick tests are passing, devices boot. TODO: Test and fix bugs in mips64. Saves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS. Some of the savings are from removal of virtual methods and direct methods object arrays. Bug: 19264997 Change-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d
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41b175aba41c9365a1c53b8a1afbd17129c87c14 |
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19-May-2015 |
Vladimir Marko <vmarko@google.com> |
ART: Clean up arm64 kNumberOfXRegisters usage. Avoid undefined behavior for arm64 stemming from 1u << 32 in loops with upper bound kNumberOfXRegisters. Create iterators for enumerating bits in an integer either from high to low or from low to high and use them for <arch>Context::FillCalleeSaves() on all architectures. Refactor runtime/utils.{h,cc} by moving all bit-fiddling functions to runtime/base/bit_utils.{h,cc} (together with the new bit iterators) and all time-related functions to runtime/base/time_utils.{h,cc}. Improve test coverage and fix some corner cases for the bit-fiddling functions. Bug: 13925192 (cherry picked from commit 80afd02024d20e60b197d3adfbb43cc303cf29e0) Change-Id: I905257a21de90b5860ebe1e39563758f721eab82
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80afd02024d20e60b197d3adfbb43cc303cf29e0 |
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19-May-2015 |
Vladimir Marko <vmarko@google.com> |
ART: Clean up arm64 kNumberOfXRegisters usage. Avoid undefined behavior for arm64 stemming from 1u << 32 in loops with upper bound kNumberOfXRegisters. Create iterators for enumerating bits in an integer either from high to low or from low to high and use them for <arch>Context::FillCalleeSaves() on all architectures. Refactor runtime/utils.{h,cc} by moving all bit-fiddling functions to runtime/base/bit_utils.{h,cc} (together with the new bit iterators) and all time-related functions to runtime/base/time_utils.{h,cc}. Improve test coverage and fix some corner cases for the bit-fiddling functions. Bug: 13925192 Change-Id: I704884dab15b41ecf7a1c47d397ab1c3fc7ee0f7
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dd97393aca1a3ff2abec4dc4f78d7724300971bc |
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07-Apr-2015 |
David Srbecky <dsrbecky@google.com> |
Implement CFI for JNI. CFI is necessary for stack unwinding in gdb, lldb, and libunwind. Change-Id: I37eb7973f99a6975034cf0e699e138c3a9aba10f
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8d36591d93920e7b7830c3ffee3759b561f5339e |
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13-Jan-2015 |
Andreas Gampe <agampe@google.com> |
ART: Use jalr instead of jr for Mips Use the jalr instruction instead of jr in stubs and compiled code. Change-Id: Idacc5167a5bb0113dc2e7716e4767e5ed07b5e0b
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eb8167a4f4d27fce0530f6724ab8032610cd146b |
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08-May-2014 |
Mathieu Chartier <mathieuc@google.com> |
Add Handle/HandleScope and delete SirtRef. Delete SirtRef and replaced it with Handle. Handles are value types which wrap around StackReference*. Renamed StackIndirectReferenceTable to HandleScope. Added a scoped handle wrapper which wraps around an Object** and restores it in its destructor. Renamed Handle::get -> Get. Bug: 8473721 Change-Id: Idbfebd4f35af629f0f43931b7c5184b334822c7a
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8194963098247be6bca9cc4a54dbfa65c73e8ccc |
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02-May-2014 |
Vladimir Marko <vmarko@google.com> |
Replace CountOneBits and __builtin_popcount with POPCOUNT. Clean up utils.h, make some functions constexpr. Change-Id: I2399100280cbce81c3c4f5765f0680c1ddcb5883
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790a6b7312979513710c366b411ba6791ddf78c2 |
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01-Apr-2014 |
Ian Rogers <irogers@google.com> |
Calling convention support for cross 64/32 compilation. Add REX support for x86-64 operands. Change-Id: I093ae26fb8c111d54b8c72166f054984564c04c6
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dd7624d2b9e599d57762d12031b10b89defc9807 |
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15-Mar-2014 |
Ian Rogers <irogers@google.com> |
Allow mixing of thread offsets between 32 and 64bit architectures. Begin a more full implementation x86-64 REX prefixes. Doesn't implement 64bit thread offset support for the JNI compiler. Change-Id: If9af2f08a1833c21ddb4b4077f9b03add1a05147
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fca82208f7128fcda09b6a4743199308332558a2 |
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21-Mar-2014 |
Dmitry Petrochenko <dmitry.petrochenko@intel.com> |
x86_64: JNI compiler Passed all tests from jni_compiler_test and art/test on host with jni_copiler. Incoming argument spill is enabled, entry_spills refactored. Now each entry spill contains data type size (4 or 8) and offset which should be used for spill. Assembler REX support implemented in opcodes used in JNI compiler. Please note, JNI compiler is not enabled by default yet (see compiler_driver.cc:1875). Change-Id: I5fd19cca72122b197aec07c3708b1e80c324be44 Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
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e63a745f26fec5a5b4162fc83f6e88a1f696c30c |
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27-Feb-2014 |
Hiroshi Yamauchi <yamauchi@google.com> |
Make heap reference poisoning work with the interpreter. It is disabled by default. Bug: 12687968 Change-Id: Iee0cad647f341a7b566f4cf74c2770d1c19312c9
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ef7d42fca18c16fbaf103822ad16f23246e2905d |
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06-Jan-2014 |
Ian Rogers <irogers@google.com> |
Object model changes to support 64bit. Modify mirror objects so that references between them use an ObjectReference value type rather than an Object* so that functionality to compress larger references can be captured in the ObjectRefererence implementation. ObjectReferences are 32bit and all other aspects of object layout remain as they are currently. Expand fields in objects holding pointers so they can hold 64bit pointers. Its expected the size of these will come down by improving where we hold compiler meta-data. Stub out x86_64 architecture specific runtime implementation. Modify OutputStream so that reads and writes are of unsigned quantities. Make the use of portable or quick code more explicit. Templatize AtomicInteger to support more than just int32_t as a type. Add missing, and fix issues relating to, missing annotalysis information on the mutator lock. Refactor and share implementations for array copy between System and uses elsewhere in the runtime. Fix numerous 64bit build issues. Change-Id: I1a5694c251a42c9eff71084dfdd4b51fff716822
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468532ea115657709bc32ee498e701a4c71762d4 |
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05-Aug-2013 |
Ian Rogers <irogers@google.com> |
Entry point clean up. Create set of entry points needed for image methods to avoid fix-up at load time: - interpreter - bridge to interpreter, bridge to compiled code - jni - dlsym lookup - quick - resolution and bridge to interpreter - portable - resolution and bridge to interpreter Fix JNI work around to use JNI work around argument rewriting code that'd been accidentally disabled. Remove abstact method error stub, use interpreter bridge instead. Consolidate trampoline (previously stub) generation in generic helper. Simplify trampolines to jump directly into assembly code, keeps stack crawlable. Dex: replace use of int with ThreadOffset for values that are thread offsets. Tidy entry point routines between interpreter, jni, quick and portable. Change-Id: I52a7c2bbb1b7e0ff8a3c3100b774212309d0828e (cherry picked from commit 848871b4d8481229c32e0d048a9856e5a9a17ef9)
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848871b4d8481229c32e0d048a9856e5a9a17ef9 |
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05-Aug-2013 |
Ian Rogers <irogers@google.com> |
Entry point clean up. Create set of entry points needed for image methods to avoid fix-up at load time: - interpreter - bridge to interpreter, bridge to compiled code - jni - dlsym lookup - quick - resolution and bridge to interpreter - portable - resolution and bridge to interpreter Fix JNI work around to use JNI work around argument rewriting code that'd been accidentally disabled. Remove abstact method error stub, use interpreter bridge instead. Consolidate trampoline (previously stub) generation in generic helper. Simplify trampolines to jump directly into assembly code, keeps stack crawlable. Dex: replace use of int with ThreadOffset for values that are thread offsets. Tidy entry point routines between interpreter, jni, quick and portable. Change-Id: I52a7c2bbb1b7e0ff8a3c3100b774212309d0828e
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834b394ee759ed31c5371d8093d7cd8cd90014a8 |
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31-Jul-2013 |
Brian Carlstrom <bdc@google.com> |
Merge remote-tracking branch 'goog/dalvik-dev' into merge-art-to-dalvik-dev Change-Id: I323e9e8c29c3e39d50d9aba93121b26266c52a46
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7655f29fabc0a12765de828914a18314382e5a35 |
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29-Jul-2013 |
Ian Rogers <irogers@google.com> |
Portable refactorings. Separate quick from portable entrypoints. Move architectural dependencies into arch. Change-Id: I9adbc0a9782e2959fdc3308215f01e3107632b7c
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166db04e259ca51838c311891598664deeed85ad |
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26-Jul-2013 |
Ian Rogers <irogers@google.com> |
Move assembler out of runtime into compiler/utils. Other directory layout bits of clean up. There is still work to separate quick and portable in some files (e.g. argument visitor, proxy..). Change-Id: If8fecffda8ba5c4c47a035f0c622c538c6b58351
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