44804252881c11668e0af9b7803a0667922c93eb |
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06-Aug-2014 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Miscellaneous documentation fixes This patch gathers miscellaneous minor fixes to the documentation, and comments in the source code. Change-Id: I631e3dda5abafa2d90f464edaee069a1e58b751b Co-Authored-By: Soby Mathew <soby.mathew@arm.com> Co-Authored-By: Dan Handley <dan.handley@arm.com>
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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0c8d4fef28768233f1f46b4d085f904293dffd2c |
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05-Aug-2014 |
Achin Gupta <achin.gupta@arm.com> |
Unmask SError interrupt and clear SCR_EL3.EA bit This patch disables routing of external aborts from lower exception levels to EL3 and ensures that a SError interrupt generated as a result of execution in EL3 is taken locally instead of a lower exception level. The SError interrupt is enabled in the TSP code only when the operation has not been directly initiated by the normal world. This is to prevent the possibility of an asynchronous external abort which originated in normal world from being taken when execution is in S-EL1. Fixes ARM-software/tf-issues#153 Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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6397bf6a99d785caa9b50016cd6c8eb76083c117 |
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28-Jul-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #172 from soby-mathew/sm/asm_assert Introduce asm assert and optimize crash reporting
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626ed510f179c905a699f4663ee933c10892b4c3 |
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25-Jun-2014 |
Soby Mathew <soby.mathew@arm.com> |
Rework the crash reporting in BL3-1 to use less stack This patch reworks the crash reporting mechanism to further optimise the stack and code size. The reporting makes use of assembly console functions to avoid calling C Runtime to report the CPU state. The crash buffer requirement is reduced to 64 bytes with this implementation. The crash buffer is now part of per-cpu data which makes retrieving the crash buffer trivial. Also now panic() will use crash reporting if invoked from BL3-1. Fixes ARM-software/tf-issues#199 Change-Id: I79d27a4524583d723483165dc40801f45e627da5
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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b51da821821cfda0d44f09a6f92fdc5933f9b23b |
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26-Jun-2014 |
Achin Gupta <achin.gupta@arm.com> |
Remove coherent stack usage from the warm boot path This patch uses stacks allocated in normal memory to enable the MMU early in the warm boot path thus removing the dependency on stacks allocated in coherent memory. Necessary cache and stack maintenance is performed when a cpu is being powered down and up. This avoids any coherency issues that can arise from reading speculatively fetched stale stack memory from another CPUs cache. These changes affect the warm boot path in both BL3-1 and BL3-2. The EL3 system registers responsible for preserving the MMU state are not saved and restored any longer. Static values are used to program these system registers when a cpu is powered on or resumed from suspend. Change-Id: I8357e2eb5eb6c5f448492c5094b82b8927603784
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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a37810853630098559d93f1b9ecdc222e63ef9cf |
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28-May-2014 |
Soby Mathew <soby.mathew@arm.com> |
Fix compilation issue for IMF_READ_INTERRUPT_ID build flag This patch fixes the compilation issue for trusted firmware when the IMF_READ_INTERRUPT_ID is enabled. Change-Id: I94ab613b9bc96a7c1935796c674dc42246aaafee
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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b460b8bf23633195535006b29e14c615f888fa24 |
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27-May-2014 |
Soby Mathew <soby.mathew@arm.com> |
Pass 'cookie' parameter to interrupt handler in BL3-1 The interrupt handling routine in BL3-1 expects a cookie as its last parameter which was not being passed when invoking the interrupt handler in BL3-1. This patch fixes that by passing a dummy cookie parameter in the x3 register. Fixes ARM-software/tf-issues#171 Change-Id: Ic98abbbd9f849e6f1c55343e865b5e0a4904a1c5
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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9865ac15765f260069047c0e7c56623eb1a70b9a |
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27-May-2014 |
Dan Handley <dan.handley@arm.com> |
Further renames of platform porting functions Rename the ic_* platform porting functions to plat_ic_* to be consistent with the other functions in platform.h. Also rename bl31_get_next_image_info() to bl31_plat_get_next_image_ep_info() and remove the duplicate declaration in bl31.h. Change-Id: I4851842069d3cff14c0a468daacc0a891a7ede84
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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5f0cdb059d7d5c3a8a834074a7f236b85d014dde |
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14-May-2014 |
Dan Handley <dan.handley@arm.com> |
Split platform.h into separate headers Previously, platform.h contained many declarations and definitions used for different purposes. This file has been split so that: * Platform definitions used by common code that must be defined by the platform are now in platform_def.h. The exact include path is exported through $PLAT_INCLUDES in the platform makefile. * Platform definitions specific to the FVP platform are now in /plat/fvp/fvp_def.h. * Platform API declarations specific to the FVP platform are now in /plat/fvp/fvp_private.h. * The remaining platform API declarations that must be ported by each platform are still in platform.h but this file has been moved to /include/plat/common since this can be shared by all platforms. Change-Id: Ieb3bb22fbab3ee8027413c6b39a783534aee474a
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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dce74b891e0e6020d0a18384e32f280133631d9b |
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09-May-2014 |
Achin Gupta <achin.gupta@arm.com> |
Introduce interrupt handling framework in BL3-1 This patch adds a common handler for FIQ and IRQ exceptions in the BL3-1 runtime exception vector table. This function determines the interrupt type and calls its handler. A crash is reported if an inconsistency in the interrupt management framework is detected. In the event of a spurious interrupt, execution resumes from the instruction where the interrupt was generated. This patch also removes 'cm_macros.S' as its contents have been moved to 'runtime_exceptions.S' Change-Id: I3c85ecf8eaf43a3fac429b119ed0bd706d2e2093
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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a43d431b80541ea436b71f967c5749babf978c7a |
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07-Apr-2014 |
Soby Mathew <soby.mathew@arm.com> |
Rework BL3-1 unhandled exception handling and reporting This patch implements the register reporting when unhandled exceptions are taken in BL3-1. Unhandled exceptions will result in a dump of registers to the console, before halting execution by that CPU. The Crash Stack, previously called the Exception Stack, is used for this activity. This stack is used to preserve the CPU context and runtime stack contents for debugging and analysis. This also introduces the per_cpu_ptr_cache, referenced by tpidr_el3, to provide easy access to some of BL3-1 per-cpu data structures. Initially, this is used to provide a pointer to the Crash stack. panic() now prints the the error file and line number in Debug mode and prints the PC value in release mode. The Exception Stack is renamed to Crash Stack with this patch. The original intention of exception stack is no longer valid since we intend to support several valid exceptions like IRQ and FIQ in the trusted firmware context. This stack is now utilized for dumping and reporting the system state when a crash happens and hence the rename. Fixes ARM-software/tf-issues#79 Improve reporting of unhandled exception Change-Id: I260791dc05536b78547412d147193cdccae7811a
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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c3260f9b82c5017ca078f090c03cd7135ee8f8c9 |
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30-Apr-2014 |
Soby Mathew <soby.mathew@arm.com> |
Preserve x19-x29 across world switch for exception handling Previously exception handlers in BL3-1, X19-X29 were not saved and restored on every SMC/trap into EL3. Instead these registers were 'saved as needed' as a side effect of the A64 ABI used by the C compiler. That approach failed when world switching but was not visible with the TSP/TSPD code because the TSP is 64-bit, did not clobber these registers when running and did not support pre-emption by normal world interrupts. These scenarios showed that the values in these registers can be passed through a world switch, which broke the normal and trusted world assumptions about these registers being preserved. The Ideal solution saves and restores these registers when a world switch occurs - but that type of implementation is more complex. So this patch always saves and restores these registers on entry and exit of EL3. Fixes ARM-software/tf-issues#141 Change-Id: I9a727167bbc594454e81cf78a97ca899dfb11c27
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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97043ac98e13a726dbf8b3b41654dca759e3da2c |
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09-Apr-2014 |
Dan Handley <dan.handley@arm.com> |
Reduce deep nesting of header files Reduce the number of header files included from other header files as much as possible without splitting the files. Use forward declarations where possible. This allows removal of some unnecessary "#ifndef __ASSEMBLY__" statements. Also, review the .c and .S files for which header files really need including and reorder the #include statements alphabetically. Fixes ARM-software/tf-issues#31 Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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35e98e5588d09145f7d0d4d98624f6b75321a187 |
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09-Apr-2014 |
Dan Handley <dan.handley@arm.com> |
Make use of user/system includes more consistent Make codebase consistent in its use of #include "" syntax for user includes and #include <> syntax for system includes. Fixes ARM-software/tf-issues#65 Change-Id: If2f7c4885173b1fd05ac2cde5f1c8a07000c7a33
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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2bf28e620a6f05700753a2b45a888c6623e20723 |
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20-Mar-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Allocate single stacks for BL1 and BL2 The BL images share common stack management code which provides one coherent and one cacheable stack for every CPU. BL1 and BL2 just execute on the primary CPU during boot and do not require the additional CPU stacks. This patch provides separate stack support code for UP and MP images, substantially reducing the RAM usage for BL1 and BL2 for the FVP platform. This patch also provides macros for declaring stacks and calculating stack base addresses to improve consistency where this has to be done in the firmware. The stack allocation source files are now included via platform.mk rather than the common BLx makefiles. This allows each platform to select the appropriate MP/UP stack support for each BL image. Each platform makefile must be updated when including this commit. Fixes ARM-software/tf-issues#76 Change-Id: Ia251f61b8148ffa73eae3f3711f57b1ffebfa632
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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0a30cf54af7bb1f77b405062b1d5b44e809d0290 |
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18-Mar-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Place assembler functions in separate sections This extends the --gc-sections behaviour to the many assembler support functions in the firmware images by placing each function into its own code section. This is achieved by creating a 'func' macro used to declare each function label. Fixes ARM-software/tf-issues#80 Change-Id: I301937b630add292d2dec6d2561a7fcfa6fec690
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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d8b07aa03f209b6a8143816537105edc63553b8e |
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20-Mar-2014 |
Vikram Kanigiri <vikram.kanigiri@arm.com> |
Move per cpu exception stack in BL31 to tzfw_normal_stacks Fixes ARM-software/tf-issues#70 Change-Id: I7f024f173fbdecd315076f528b05d6295aff7276
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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a7934d69508872919787742c7680b68807c24361 |
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07-Feb-2014 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
Add exception vector guards This patch adds guards so that an exception vector exceeding 32 instructions will generate a compile-time error. This keeps the exception handlers in check from spilling over. Change-Id: I7aa56dd0071a333664e2814c656d3896032046fe
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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caa84939a4d8b1189dea8619ccc57bdb3026b125 |
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06-Feb-2014 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
Add support for handling runtime service requests This patch uses the reworked exception handling support to handle runtime service requests through SMCs following the SMC calling convention. This is a giant commit since all the changes are inter-related. It does the following: 1. Replace the old exception handling mechanism with the new one 2. Enforce that SP_EL0 is used C runtime stacks. 3. Ensures that the cold and warm boot paths use the 'cpu_context' structure to program an ERET into the next lower EL. 4. Ensures that SP_EL3 always points to the next 'cpu_context' structure prior to an ERET into the next lower EL 5. Introduces a PSCI SMC handler which completes the use of PSCI as a runtime service Change-Id: I661797f834c0803d2c674d20f504df1b04c2b852 Co-authored-by: Achin Gupta <achin.gupta@arm.com>
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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b739f22a99c96d5a295f083125505b5b5ec2f8b6 |
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18-Jan-2014 |
Achin Gupta <achin.gupta@arm.com> |
Setup VBAR_EL3 incrementally This patch ensures that VBAR_EL3 points to the simple stack-less 'early_exceptions' when the C runtime stack is not correctly setup to use the more complex 'runtime_exceptions'. It is initialised to 'runtime_exceptions' once this is done. This patch also moves all exception vectors into a '.vectors' section and modifies linker scripts to place all such sections together. This will minimize space wastage from alignment restrictions. Change-Id: I8c3e596ea3412c8bd582af9e8d622bb1cb2e049d
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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e83b0cadc67882c1ba7f430d16dab80c9b3a0228 |
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14-Jan-2014 |
Dan Handley <dan.handley@arm.com> |
Update year in copyright text to 2014 Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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4a826ddad8ea0fc5ce09709f534efb72cc33611c |
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25-Nov-2013 |
Achin Gupta <achin.gupta@arm.com> |
rework general purpose registers save and restore The runtime exception handling assembler code used magic numbers for saving and restoring the general purpose register context on stack memory. The memory is interpreted as a 'gp_regs' structure and the magic numbers are offsets to members of this structure. This patch replaces the magic number offsets with constants. It also adds compile time assertions to prevent an incorrect assembler view of this structure. Change-Id: Ibf125bfdd62ba3a33e58c5f1d71f8c229720781c
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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ab2d31edbd9dea69bd1ca495e3fce0511c9d42ff |
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02-Dec-2013 |
Dan Handley <dan.handley@arm.com> |
Enable third party contributions - Add instructions for contributing to ARM Trusted Firmware. - Update copyright text in all files to acknowledge contributors. Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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8d69a03f6a7db3c437b7cfdd15402627277d8cb4 |
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27-Nov-2013 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Various improvements/cleanups on the linker scripts - Check at link-time that bootloader images will fit in memory at run time and that they won't overlap each other. - Remove text and rodata orphan sections. - Define new linker symbols to remove the need for platform setup code to know the order of sections. - Reduce the size of the raw binary images by cutting some sections out of the disk image and allocating them at load time, whenever possible. - Rework alignment constraints on sections. - Remove unused linker symbols. - Homogenize linker symbols names across all BLs. - Add some comments in the linker scripts. Change-Id: I47a328af0ccc7c8ab47fcc0dc6e7dd26160610b9
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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4f6ad66ae9fcc8bcb3b0fcee10b7ab1ffcaf1a56 |
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25-Oct-2013 |
Achin Gupta <achin.gupta@arm.com> |
ARMv8 Trusted Firmware release v0.2
/device/linaro/bootloader/arm-trusted-firmware/bl31/aarch64/runtime_exceptions.S
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