| 881520ea6778953c57d975ca2a9cf3f2114f99c4 |
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30-Nov-2015 |
Yao, Jiewen <jiewen.yao@intel.com> |
UefiCpuPkg/PiSmmCpu: Always set RW+P bit for page table by default
So that we can use write-protection for code later.
This is REPOST.
It includes the bug fix from "Paolo Bonzini" <pbonzini@redhat.com>:
Title: fix generation of 32-bit PAE page tables
"Bits 1 and 2 are reserved in 32-bit PAE Page Directory Pointer Table
Entries (PDPTEs); see Table 4-8 in the SDM. With VMX extended page
tables, the processor notices and fails the VM entry as soon as CR0.PG
is set to 1."
And thanks "Laszlo Ersek" <lersek@redhat.com> to validate the fix.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Signed-off-by: "Paolo Bonzini" <pbonzini@redhat.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Cc: "Fan, Jeff" <jeff.fan@intel.com>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>
Cc: "Laszlo Ersek" <lersek@redhat.com>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19067 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
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| 21c1719318056691a3e5901c6e28e5ba2b70afe2 |
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27-Nov-2015 |
Yao, Jiewen <jiewen.yao@intel.com> |
UefiCpuPkg/PiSmmCpu: Update function call for 2 new APIs.
All page table allocation will use AllocatePageTableMemory().
Add SmmCpuFeaturesCompleteSmmReadyToLock() to PerformRemainingTasks()
and PerformPreTasks().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Kinney, Michael D" <michael.d.kinney@intel.com>
Cc: "Fan, Jeff" <jeff.fan@intel.com>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>
Cc: "Laszlo Ersek" <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18981 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
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| 118930fa2888a98ee966403d8ebba6085e52c58d |
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27-Nov-2015 |
Laszlo Ersek <lersek@redhat.com> |
Revert "Add 2 APIs in SmmCpuFeaturesLib."
This reverts SVN r18958 / git commit
9daa916dd1efe6443f9a66dfa882f3185d33ad28.
The patch series had been fully reviewed on edk2-devel, but it got
committed as a single squashed patch. Revert it for now.
Link: http://thread.gmane.org/gmane.comp.bios.edk2.devel/4951
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18978 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
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| fc8c919525d40dd332eef6adbc20bf93adb74227 |
|
27-Nov-2015 |
Laszlo Ersek <lersek@redhat.com> |
Revert "Always set WP in CR0."
This reverts SVN r18960 / git commit
8e496a7abcb78c36b0af47ed473096ef7f171606.
The patch series had been fully reviewed on edk2-devel, but it got
committed as a single squashed patch. Revert it for now.
Link: http://thread.gmane.org/gmane.comp.bios.edk2.devel/4951
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18977 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
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| 8e496a7abcb78c36b0af47ed473096ef7f171606 |
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26-Nov-2015 |
Yao, Jiewen <jiewen.yao@intel.com> |
Always set WP in CR0.
Always set RW+P bit for page table by default.
So that we can use write-protection for code later.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Kinney, Michael D" <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18960 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
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| 9daa916dd1efe6443f9a66dfa882f3185d33ad28 |
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26-Nov-2015 |
Yao, Jiewen <jiewen.yao@intel.com> |
Add 2 APIs in SmmCpuFeaturesLib.
Add NULL func for 2 new APIs in SmmCpuFeaturesLib.
SmmCpuFeaturesCompleteSmmReadyToLock() is a hook point to allow
CPU specific code to do more registers setting after
the gEfiSmmReadyToLockProtocolGuid notification is completely processed.
Add SmmCpuFeaturesCompleteSmmReadyToLock() to PerformRemainingTasks() and PerformPreTasks().
SmmCpuFeaturesAllocatePageTableMemory() is an API to allow
CPU to allocate a specific region for storing page tables.
All page table allocation will use AllocatePageTableMemory().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Kinney, Michael D" <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18958 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
|
| 9f419739d1ae849e0c4d75a131502f9367ca4a7d |
|
25-Nov-2015 |
Yao, Jiewen <jiewen.yao@intel.com> |
Move RestoreSmmConfigurationInS3 function to PerformPreTasks().
In this way, we can centralize the silicon configuration in
PerformRemainingTasks()/PerformPreTasks() function.
If there are more features need to be configured, they can put in
PerformRemainingTasks()/PerformPreTasks() only.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Kinney, Michael D" <michael.d.kinney@intel.com>
Reviewed-by: "Laszlo Ersek" <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18938 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
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| fe5f19494353421d3382f32f31a627e09724bbb2 |
|
25-Nov-2015 |
Yao, Jiewen <jiewen.yao@intel.com> |
Eliminate EFI_IMAGE_MACHINE_TYPE_SUPPORTED.
Move Gdt initialization from InitializeMpServiceData() to CPU Arch specific function.
We create SmmFuncsArch.c for hold CPU specific function, so that
EFI_IMAGE_MACHINE_TYPE_SUPPORTED(EFI_IMAGE_MACHINE_X64) can be removed.
For IA32 version, we always allocate new page for GDT entry, for easy maintenance.
For X64 version, we fixed TssBase in GDT entry to make sure TSS data is correct.
Remove TSS fixup for GDT in ASM file.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Fan, Jeff" <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18937 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
|
| c2e5e70a854552f91ae29e4b85dfc213dbaaca6d |
|
05-Nov-2015 |
Michael Kinney <michael.d.kinney@intel.com> |
UefiCpuPkg: PiSmmCpuDxeSmm: Remove Framework compatibility
The PiSmmCpuDxeSmm module is using PcdFrameworkCompatibilitySupport to
provide compatibility with the SMM support in the IntelFrameworkPkg.
This change removes the Framework compatibility and requires all SMM
modules that provide SMI handlers to follow the PI Specification.
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18726 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
|
| f40577c3563fcad7fc512617925d0574a7c64e2f |
|
26-Oct-2015 |
Michael Kinney <michael.d.kinney@intel.com> |
UefiCpuPkg: PiSmmCpuDxeSmm: Remove unused references to SmmLib
The PiSmmCpuDxeSmm module does not use any services from the SmmLib.
This change removes the SmmLib from PiSmmCpuDxeSmm module and also
removes the lib mapping in the UefiCpuPkg DSC file because no other
modules in the UefiCpuPkg use the SmmLib.
Removal of SmmLib is now possible because the only API call to it,
ClearSmi(), was ultimately removed from PiSmmCpuDxeSmm -- see the
"BUGBUG" comment in git commit 529a5a86.
Cc: "Yao, Jiewen" <jiewen.yao@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: "Yao, Jiewen" <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18673 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
|
| 529a5a860996b5e83941bab50a7b8604139264a1 |
|
19-Oct-2015 |
Michael Kinney <michael.d.kinney@intel.com> |
UefiCpuPkg: Add PiSmmCpuDxeSmm module no IA32/X64 files
Add module that initializes a CPU for the SMM environment and
installs the first level SMI handler. This module along with the
SMM IPL and SMM Core provide the services required for
DXE_SMM_DRIVERS to register hardware and software SMI handlers.
CPU specific features are abstracted through the SmmCpuFeaturesLib
Platform specific features are abstracted through the
SmmCpuPlatformHookLib
Several PCDs are added to enable/disable features and configure
settings for the PiSmmCpuDxeSmm module
Changes between [PATCH v1] and [PATCH v2]:
1) Swap PTE init order for QEMU compatibility.
Current PTE initialization algorithm works on HW but breaks QEMU
emulator. Update the PTE initialization order to be compatible
with both.
2) Update comment block that describes 32KB SMBASE alignment requirement
to match contents of Intel(R) 64 and IA-32 Architectures Software
Developer's Manual
3) Remove BUGBUG comment and call to ClearSmi() that is not required.
SMI should be cleared by root SMI handler.
[jeff.fan@intel.com: Fix code style issues reported by ECC]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
[pbonzini@redhat.com: InitPaging: prepare PT before filling in PDE]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18645 6f19259b-4bc3-4df7-8a09-765794883524
/device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
|