| 4967a710c84587c654b56c828382219c3937dacb |
|
20-Sep-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master Clang for rebase to r275480
Bug: http://b/31320715
This merges commit ac9cc4764cf47a6c3f031687d8592e080c9f5001 from
aosp/dev.
Test: Build AOSP and run RenderScript tests (host tests for slang and
libbcc, RsTest, CTS)
Change-Id: Ic2875e5c3673c83448cd7d1013861e42947b1b55
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| c568f1e98938584c0ef0b12ae5018ff7d90a4072 |
|
21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update Clang for rebase to r212749.
This also fixes a small issue with arm_neon.h not being generated always.
Includes a cherry-pick of:
r213450 - fixes mac-specific header issue
r213126 - removes a default -Bsymbolic on Android
Change-Id: I2a790a0f5d3b2aab11de596fc3a74e7cbc99081d
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 6bcf27bb9a4b5c3f79cb44c0e4654a6d7619ad89 |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update Clang for 3.5 rebase (r209713).
Change-Id: I8c9133b0f8f776dc915f270b60f94962e771bc83
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 651f13cea278ec967336033dd032faef0e9fc2ec |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Updated to Clang 3.5a.
Change-Id: I8127eb568f674c2e72635b639a3295381fe8af82
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| f5ad2eadeb5f2d7547663f2c12464ad0fdb91979 |
|
09-Dec-2013 |
Tim Northover <tnorthover@apple.com> |
Remove stray parts of (reverted on trunk) r196205 that are causing test
failures.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_34@196774 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 612f5bfeac5c4d923bb448b2f06e3aeab318130f |
|
08-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196359:
------------------------------------------------------------------------
r196359 | kevinqin | 2013-12-03 23:53:09 -0800 (Tue, 03 Dec 2013) | 1 line
[AArch64 NEON] Add missing compare intrinsics.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_34@196680 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 917b328a7f565f9f3f0ae2067a8b97732efaa9f8 |
|
08-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196211:
------------------------------------------------------------------------
r196211 | haoliu | 2013-12-02 22:07:13 -0800 (Mon, 02 Dec 2013) | 3 lines
[AArch64]Add missing floating point convert, round and misc intrinsics.
E.g. int64x1_t vcvt_s64_f64(float64x1_t a) -> FCVTZS Dd, Dn
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_34@196679 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| c5c84b8d634299f02b50ee0e36b58d53d5dd43b2 |
|
08-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196209:
------------------------------------------------------------------------
r196209 | haoliu | 2013-12-02 21:58:49 -0800 (Mon, 02 Dec 2013) | 3 lines
AArch64: add missing ACLE intrinsics mapping to general arithmetic operation from VFP instructions.
E.g. float64x1_t vadd_f64(float64x1_t a, float64x1_t b) -> FADD Dd, Dn, Dm.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_34@196678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| d93bc4320ac3b2035a542fcf2004fce0c91abd11 |
|
08-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196199:
------------------------------------------------------------------------
r196199 | haoliu | 2013-12-02 19:40:08 -0800 (Mon, 02 Dec 2013) | 3 lines
AArch64: Add missing scalar pair intrinsics.
E.g. "float32_t vaddv_f32(float32x2_t a)" to be matched into "faddp s0, v1.2s".
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_34@196676 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 1b2dde5fe25edb5dfd1708b2f33c793b6cdff75e |
|
08-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196191:
------------------------------------------------------------------------
r196191 | jiangning | 2013-12-02 17:33:16 -0800 (Mon, 02 Dec 2013) | 2 lines
Add some missing AArch64 Neon intrinsics like vuqadd_s64 and friends.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_34@196673 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 08efe365cc491ad289132cb9e286382eb0493753 |
|
01-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195942:
------------------------------------------------------------------------
r195942 | haoliu | 2013-11-28 18:13:17 -0800 (Thu, 28 Nov 2013) | 3 lines
Fix the problem that the range check for scalar narrow shift is too wide.
E.g. the immediate value of vshrns_n_s16 is [1,16], which should be [1,8].
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_34@196022 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 4bb8fe374570cc453f10935bdc81b4083f09d2ff |
|
01-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195940:
------------------------------------------------------------------------
r195940 | jiangning | 2013-11-28 17:38:49 -0800 (Thu, 28 Nov 2013) | 2 lines
Add missing intrinsic function vbsl_f64 for AArch64 NEON.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_34@196020 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 38750138231fbf4e9ef18ce93e55ee3bc6ac592d |
|
01-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195804:
------------------------------------------------------------------------
r195804 | mcrosier | 2013-11-26 17:46:19 -0800 (Tue, 26 Nov 2013) | 1 line
[AArch64] Add support for NEON scalar floating-point absolute difference.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_34@195995 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| dd12780e86575795fa912529a911b01e2abc4677 |
|
18-Nov-2013 |
Hao Liu <Hao.Liu@arm.com> |
Implement the newly added AArch64 ACLE functions for ld1/st1 with 2/3/4 vectors.
The functions are like: vst1_s8_x2 ...
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@194991 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 72dcd52331e1ac34e2899e7ee1736f25792865cd |
|
17-Nov-2013 |
Hao Liu <Hao.Liu@arm.com> |
Implement vreinterpret ACLE functions in Clang.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@194954 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 38e26aebf3d3db0b8126c912e385070256804d66 |
|
15-Nov-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
These ACLE tests no longer need to cast the return value.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@194854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| f46e56bf99384b742228a9be215f38bf107c1a3b |
|
14-Nov-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for legacy AArch32 NEON scalar shift right by immediate
and accumulate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@194732 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| a665321a6885ff659ae6d75bb2ee2f083f78ddd7 |
|
13-Nov-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Tests for legacy AArch32 NEON scalar shift by immediate instructions.
A number of non-overloaded intrinsics have been replaced by thier overloaded
counterparts.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@194599 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 2bd8af5888d8cad4b56185f2d38659eb3cb1272b |
|
11-Nov-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] The shift right/left and insert immediate builtins expect 3
source operands, a vector, an element to insert, and a shift amount.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@194407 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 9473c1945f9f1dfa143e172622f16e4264e2628b |
|
11-Nov-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar floating-point convert to fixed-point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@194395 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 6d61978fa2c07cb1311bb29f45481cf3f4dbb887 |
|
31-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar fixed-point convert to floating-point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@193817 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| f42727215f9fa38175d2e84a938c84122cd1e811 |
|
31-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar shift immediate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@193791 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 564020954e9eb01293d90802c89a02f87301e095 |
|
30-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar floating-point compare instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@193692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| fae3a1a40802cd4cc5b8d806e31da78ef3d83d13 |
|
21-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add the constraint to NEON scalar mla/mls instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@193118 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 4553a858e46299955333babfa052a512682869fd |
|
18-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar extract narrow instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192971 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| d867422c86914e055b8772ec1f22b349e15de94b |
|
17-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar three register different instruction
class. The instruction class includes the signed saturating doubling
multiply-add long, signed saturating doubling multiply-subtract long, and
the signed saturating doubling multiply long instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192909 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| cced97c345843a41ff68c9536bf54a0dfb772846 |
|
16-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar negate instruction.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 567fd23e1e108c8b3441ea01dd3e7453ea04acff |
|
16-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar absolute value instruction.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192844 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| a48c4a87034a9478b73c25dada9921d1aa16d318 |
|
16-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar signed saturating accumulated of unsigned
value and unsigned saturating accumulate of signed value instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192801 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 03c8276825ee44d29475023455a6888b73225ea4 |
|
15-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar signed saturating absolute value and
scalar signed saturating negate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192734 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| ad40008ed9e5f4d23972d09386997da5d1a835ee |
|
14-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar integer compare instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 5610fbdb9c257b0b0c9589f6d6cedb58ec397a30 |
|
10-Oct-2013 |
Hao Liu <Hao.Liu@arm.com> |
Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192362 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| db5cb0fa68313a43b12e9ad0285e430706fc8328 |
|
10-Oct-2013 |
Tim Northover <tnorthover@apple.com> |
Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). "
This reverts commit r192351. The LLVM side broke the build and the Clang tests
will inevitably fail without it.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192356 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 58b6ccfc8ef7be28bf081c1fd701e60b1f12fe17 |
|
10-Oct-2013 |
Hao Liu <Hao.Liu@arm.com> |
Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).
E.g. ld1(3 registers version) will load 32-bit elements {A, B, C, D, E, F} sequentially into the three 64-bit vectors list {BA, DC, FE}.
E.g. ld3 will load 32-bit elements {A, B, C, D, E, F} into the three 64-bit vectors list {DA, EB, FC}.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192351 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 3cb333070d35c9a6843e4211c9a74322f6c126ec |
|
09-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar floating-point reciprocal estimate,
reciprocal exponent, and reciprocal square root estimate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192243 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 6d048e1a9768b594513e2ec7a6d3579787eb2505 |
|
08-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar signed/unsigned integer to floating-point
convert instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192232 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 48f98fe7c1374bf416403bf82b29d4fc11011057 |
|
07-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar arithmetic instructions:
SQDMULH, SQRDMULH, FMULX, FRECPS, and FRSQRTS.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@192112 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| aee8e168112a3cbb6282ab4c6b5ae63933053ebf |
|
24-Sep-2013 |
Jiangning Liu <jiangning.liu@arm.com> |
Initial support for Neon scalar instructions.
Patch by Ana Pazos.
1.Added support for v1ix and v1fx types.
2.Added Scalar Pairwise Reduce instructions.
3.Added initial implementation of Scalar Arithmetic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@191264 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 43a8d85c2b25a8e21f99767680559316966cb57b |
|
18-Sep-2013 |
Amaury de la Vieuville <amaury.dlv@gmail.com> |
Add support for poly16 vtst and vtstq
vtst and vtstq currently support poly8 types, but they should also work on
poly16.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@190925 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 097a4b487897ca29f0f371c81b6a8b6c1ca599e4 |
|
09-Sep-2013 |
Jiangning Liu <jiangning.liu@arm.com> |
Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions,
SADDL, UADDL, SADDW, UADDW, SSUBL, USUBL, SSUBW, USUBW, ADDHN, RADDHN, SABAL, UABAL, SUBHN, RSUBHN, SABDL, UABDL, SMLAL, UMLAL, SMLSL, UMLSL, SQDMLAL, SQDMLSL, SMULL, UMULL, SQDMULL, PMULL
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@190289 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 912502b4996b14db31b498cb1eef2b17d7d66d57 |
|
04-Sep-2013 |
Hao Liu <Hao.Liu@arm.com> |
Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions:
sshr,ushr,ssra,usra,srshr,urshr,srsra,ursra,sri,shl,sli,sqshlu,sqshl,uqshl,shrn,sqrshr$
and 4 convert instructions:
scvtf,ucvtf,fcvtzs,fcvtzu
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@189926 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| 12cd6a83f280bcab0e80230e8c7b1f989f3b4889 |
|
15-Aug-2013 |
Hao Liu <Hao.Liu@arm.com> |
Clang and AArch64 backend patches to support shll/shl and vmovl instructions and ACLE functions
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@188452 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
|
| b793f0d3448a15277cd6b6cc4ba558ded39a8084 |
|
01-Aug-2013 |
Tim Northover <tnorthover@apple.com> |
AArch64: initial NEON support
Patch by Ana Pazos
- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise
- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic
- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same
- Intial implementation of instruction class:
Scalar Arithmetic
- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.
- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@187568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/test/CodeGen/aarch64-neon-intrinsics.c
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