d707e337f5f9a7b6ed465ade1b0b7c06606dde22 |
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14-Aug-2012 |
Eric Anholt <eric@anholt.net> |
i965: Fix bug in the old FS backend's projtex() calculation. In the old backend, we looked at any FS attribute's proj_attrib_mask bits, not just texcoords. Now that we have _mesa_vert_result_to_frag_attrib(), we can fill in the other FS inputs with correct proj_attrib_mask info. NOTE: This is a candidate for stable branches. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46644 Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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efdc8bf1894790a85c118881395a998cbae34c1a |
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06-Jan-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
i965: Don't calculate masks of used FS inputs This previously enabled some optimizations in the fragment shader (interpolation, etc.) if some input components were always 0.0 or 1.0. However, this data was generated by analyzing Mesa IR. The next patch in this series removes generation of Mesa IR for GLSL paths. When we detect that case, just set the used mask to ~0 and circumvent the optimizations. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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dca6a28a14f22d77273d79d44f57b0d853c0242d |
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31-Oct-2011 |
Mathias Fröhlich <Mathias.Froehlich@web.de> |
mesa: Make gl_program::InputsRead 64 bits. Make gl_program::InputsRead a 64 bits bitfield. Adapt the intel and radeon driver to handle a 64 bits InputsRead value. Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de> Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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bf11c9e4c1be307add4bb9355e6c0b5f4c44629f |
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22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i965: Move the WM input sizes calculation to emit() time. It's used for program compile. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
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07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h. I initially produced the patch using this bash command: for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i 's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i 's/GL_FALSE/false/g' $file; done Then I manually added #include <stdbool.h> to fix compilation errors, and converted a few functions back to GLboolean that were used in core Mesa's function pointer table to avoid "incompatible pointer" warnings. Finally, I cleaned up some whitespace issues introduced by the change. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Chad Versace <chad@chad-versace.us> Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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447c488d77ea9710e0ffc238953917189d3000c7 |
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09-Sep-2011 |
Eric Anholt <eric@anholt.net> |
i965/gen6+: Respect the VERTEX_PROGRAM_TWO_SIDE flag for shaders. Fixes piglit: vertex-program-two-side enabled front back front2 back2 vertex-program-two-side enabled front back vertex-program-two-side enabled front2 back2
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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51e7b058750cc480c296d45f773d7a5a662457f5 |
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06-Sep-2011 |
Brian Paul <brianp@vmware.com> |
mesa: put _mesa_ prefix on vert_result_to_frag_attrib()
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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6489a1d5bab75589569658d374257bf23cb67a23 |
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30-Aug-2011 |
Paul Berry <stereotype441@gmail.com> |
Refactor code that converts between gl_vert_result and gl_frag_attrib. Previously, this conversion was duplicated in several places in the i965 driver. This patch moves it to a common location in mtypes.h, near the declaration of gl_vert_result and gl_frag_attrib. I've also added comments to remind us that we may need to revisit the conversion code when adding elements to gl_vert_result and gl_frag_attrib. Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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652ef8569c923cf8e1e254dddc160c7995d258aa |
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23-Jul-2011 |
Eric Anholt <eric@anholt.net> |
Revert "i965: Don't compute brw->wm.input_size_masks when it's unused." This reverts commit 3412069e23b7fa5656262f3dd1aa86f66980594d. We're about to start using it in fragment shaders to handle avoiding projection for fixed function.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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3412069e23b7fa5656262f3dd1aa86f66980594d |
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28-Apr-2011 |
Eric Anholt <eric@anholt.net> |
i965: Don't compute brw->wm.input_size_masks when it's unused. It's only used in the old fragment program path, to avoid projection when w is always 1. We do want to do this in the new path pre-gen6 too, but we'll probably do it through the ir. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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f9995b30756140724f41daf963fa06167912be7f |
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12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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6b917d0b1787280f976c2f0d1ead0e5d7587a3e9 |
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17-Jun-2009 |
Brian Paul <brianp@vmware.com> |
i965: fix bugs in projective texture coordinates For the TXP instruction we check if the texcoord is really a 4-component atttibute which requires the divide by W step. This check involved the projtex_mask field. However, the projtex_mask field was being miscalculated because of some confusion between vertex program outputs and fragment program inputs. 1. Rework the size_masks calculation so we correctly set bits corresponding to fragment program input attributes. 2. Rename projtex_mask to proj_attrib_mask since we're interested in more than just texcoords (generic varying vars too). 3. Simply the indexing of the size_masks and proj_attrib_mask fields. 4. The tracker::active[] array was mis-dimensioned. Use MAX_PROGRAM_TEMPS instead of a magic number. 5. Update comments, add new assertions. With these changes the Lightsmark demo/benchmark renders correctly, until we eventually hit a GPU lockup...
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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7db7ff878d3e5a6b345228e6eaee4797bb68b360 |
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15-Apr-2009 |
Brian Paul <brianp@vmware.com> |
mesa: merge the prog_src_register::NegateBase and NegateAbs fields There's really no need for two negation fields. This came from the GL_NV_fragment_program extension. The new, unified Negate bitfield applies after the absolute value step.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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9c781de015f32b2caadd5a6d999cc6885188a4a4 |
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10-Mar-2009 |
Brian Paul <brianp@vmware.com> |
i965: use new cast wrappers
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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052c1d66a1ab1f2665870dc77dab28d20416cdf1 |
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30-Jan-2009 |
Eric Anholt <eric@anholt.net> |
i965: Remove brw->attribs now that we can just always look in the GLcontext.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
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18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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f75843a517bd188639e6866db2a7b04de3524e16 |
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24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'"" This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
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24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'" This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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d2796939f18815935c8fe1effb01fa9765d6c7d8 |
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08-Aug-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Update to new check_aperture API for classic mode. To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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008653ac55776d6b1c6d1627ad20937aa1c4dbda |
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17-Apr-2008 |
Dave Airlie <airlied@redhat.com> |
i965: initial attempt at fixing the aperture overflow Makes state emission into a 2 phase, prepare sets things up and accounts the size of all referenced buffer objects. The emit stage then actually does the batchbuffer touching for emitting the objects. There is an assert in dri_emit_reloc if a reloc occurs for a buffer that hasn't been accounted yet.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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064ae479a770bf434958d673baf6f7530f642697 |
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23-Feb-2007 |
Brian <brian@yutani.localnet.net> |
Update DRI drivers for new glsl compiler. Mostly: - update #includes - update STATE_* token code
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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f2eb6434ab1cf72e938956c82d2f530368a6be4a |
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31-Oct-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
cleanup code, compiles with vbo changes
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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14ec34d64733478b773190cb62be37b7b2871a7f |
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06-Sep-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
Simplify the immediate and displaylist code. Treat VertexAttrib*ARB as non-aliasing and cope with the >32 attributes that result, taking materials into account.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
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9f344b3e7d6e23674dd4747faec253f103563b36 |
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09-Aug-2006 |
Eric Anholt <anholt@FreeBSD.org> |
Add Intel i965G/Q DRI driver. This driver comes from Tungsten Graphics, with a few further modifications by Intel.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_constval.c
|