| c9a7dfcf92e6adb4b85338c2c8dbbfbaf39fbfe7 |
|
12-Jun-2012 |
Pauli Nieminen <pauli.nieminen@linux.intel.com> |
mesa: Remove unnecessary parameters from AllocTextureImageBuffer
Size and format information is always stored in gl_texture_image
structure. That makes it preferable to remove duplicate information from
parameters to make interface easier to understand.
Signed-off-by: Pauli Nieminen <pauli.nieminen@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| c5af8891805fc4f590c1371c098cdbc704c44e00 |
|
12-Jun-2012 |
Pauli Nieminen <pauli.nieminen@linux.intel.com> |
mesa: Remove unnecessary parameters from TexImage
gl_texture_image structure always holds size and internal format before
TexImage driver hook is called. Those passing same information in
function parameters only duplicates information making the interface
harder to understand.
Signed-off-by: Pauli Nieminen <pauli.nieminen@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1bd4d456cdecf7bea55f4e3dac574af54efad994 |
|
04-Jul-2012 |
Paul Berry <stereotype441@gmail.com> |
i965/msaa: Add an enum to describe MSAA layout.
From the Ivy Bridge PRM, Vol 1 Part 1, p112:
There are three types of multisampled surface layouts designated
as follows:
- IMS Interleaved Multisampled Surface
- CMS Compressed Mulitsampled Surface
- UMS Uncompressed Multisampled Surface
Previously, the i965 driver only used IMS and UMS formats, and
distinguished beetween them using the boolean
intel_mipmap_tree::msaa_is_interleaved. To facilitate adding support
for the CMS format, this patch replaces that boolean (and other
booleans derived from it) with an enum
INTEL_MSAA_LAYOUT_{IMS,CMS,UMS}. It also updates the terminology used
in comments throughout the driver to match the IMS/CMS/UMS terminology
used in the PRM. CMS layout is not yet used.
The enum has a fourth possible value, INTEL_MSAA_LAYOUT_NONE, which is
used for non-multisampled surfaces.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 95bc0527e9f81c62cbfe02dace94e73d9950d04d |
|
05-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement __DRIimage::createSubImage and bump supported version to 5
We use the new miptree offset to pick out the sub-image when we bind
the EGLImage to a texture.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 02ebad900db4ef1ac42cbfb41b433919a4c857a2 |
|
05-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Add offset field to miptree
This lets us specify an offset into the bo where the miptree starts,
which will let us set up a texture for a single plane in a planar buffer.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 8f5fffe75d2f8ae7c7ee706b53379a25bc673ae4 |
|
06-Jun-2012 |
Brian Paul <brianp@vmware.com> |
mesa: consolidate internal glTexImage1/2/3D code
The functions for handling 1D, 2D and 3D texture images were nearly
identical. This folds them all together.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 455ac562722f60ac9fb0c3d3c697fa339fa011ad |
|
08-May-2012 |
Paul Berry <stereotype441@gmail.com> |
i965/msaa: Properly handle sliced layout for Gen7.
Starting in Gen7, there are two possible layouts for MSAA surfaces:
- Interleaved, in which additional samples are accommodated by scaling
up the width and height of the surface. This is the only layout
available in Gen6. On Gen7 it is used for depth and stencil
surfaces only.
- Sliced, in which the surface is stored as a 2D array, with array
slice n containing all pixel data for sample n. On Gen7 this layout
is used for color surfaces.
The "Sliced" layout has an additional requirement: it must be used in
ARYSPC_LOD0 mode, which means that the surface doesn't leave any extra
room between array slices for miplevels other than 0.
This patch modifies the surface allocation functions to use the
correct layout when allocating MSAA surfaces in Gen7, and to set the
array offsets properly when using ARYSPC_LOD0 mode. It also modifies
the code that populates SURFACE_STATE structures to ensure that
ARYSPC_LOD0 mode is selected in the appropriate circumstances.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 19e9b24626c2b9d7abef054d57bb2a52106c545b |
|
30-Apr-2012 |
Paul Berry <stereotype441@gmail.com> |
i965/gen6: Initial implementation of MSAA.
This patch enables MSAA for Gen6, by modifying intel_mipmap_tree to
understand multisampled buffers, adapting the rendering pipeline setup
to enable multisampled rendering, and adding multisample resolve
operations to brw_blorp_blit.cpp. Some preparation work is also
included for Gen7, but it is not yet enabled.
MSAA support is still fairly preliminary. In particular, the
following are not yet supported:
- Fully general blits between MSAA and non-MSAA buffers.
- Formats other than RGBA8, DEPTH24, and STENCIL8.
- Centroid interpolation.
- Coverage parameters (glSampleCoverage, GL_SAMPLE_ALPHA_TO_COVERAGE,
GL_SAMPLE_ALPHA_TO_ONE, GL_SAMPLE_COVERAGE, GL_SAMPLE_COVERAGE_VALUE,
GL_SAMPLE_COVERAGE_INVERT).
Fixes piglit tests "EXT_framebuffer_multisample/accuracy" on
i965/Gen6.
v2:
- In intel_alloc_renderbuffer_storage(), quantize the requested number
of samples to the next higher sample count supported by the
hardware. This ensures that a query of GL_SAMPLES will return the
correct value. It also ensures that MSAA is fully disabled on Gen7
for now (since Gen7 MSAA support doesn't work yet).
- When reading from a non-MSAA surface, ensure that s_is_zero is true
so that we won't try to read from a nonexistent sample.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1c1040dcf02898fe99316ea2bf5482a5bb2356cf |
|
10-May-2012 |
Eric Anholt <eric@anholt.net> |
intel: Fix compile warning from 7b6424143d8bf572cadd46adcbaa91d2a5598635
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 7b6424143d8bf572cadd46adcbaa91d2a5598635 |
|
23-Mar-2012 |
Dave Airlie <airlied@gmail.com> |
intel: fix TFP at 16-bpp
don't ask why I had to debug this.
tested to fix g-s and kwin at 16-bpp on Ironlake.
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 892a2542a3f0753a7064c710b96f077dd5490624 |
|
04-Jan-2012 |
Brian Paul <brianp@vmware.com> |
mesa: remove unused _mesa_init_teximage_fields() target parameter
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 92c64624cd7533cde466dbec8722f7f72f275fd8 |
|
30-Dec-2011 |
Brian Paul <brianp@vmware.com> |
mesa: simplify Driver.TexImage() parameters
As with TexSubImage(), the target, level and texObj values can be obtained
through the texImage pointer.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 7420c9dab4aaf87e6b840410226c296c4668a48f |
|
22-Dec-2011 |
Chad Versace <chad.versace@linux.intel.com> |
i965: Create mock implementation of GL_OES_EGL_image_external
In Android IceCreamSandwich, SurfaceFlinger requires GL_OES_image_external
for basic compositing tasks. Without the extension, SurfaceFlinger fails
to start.
Despite the incompleteness of the extension's implementation introduced by
this patch, it is good enough to enable SurfaceFlinger and to unblock the
people who need to begin testing Mesa on IceCreamSandwich.
To enable the extension, set the environment variable
MESA_EXTENSION_OVERRIDE="+GL_OES_EGL_image_external". Ideally, Android
should set this in init.rc.
WARNING: This implementation of GL_OES_EGL_image_external is not complete.
Some of it is even incorrect. When we begin to really implement
GL_OES_EGL_image_external, much of the patch will need reverting.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 3eb12dfaeed03f77e31943eea164acb03e86bbc9 |
|
16-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Replace intel_texture_image::stencil_irb with intel_mipmap_tree::stencil_mt [v3]
For depthstencil textures using separate stencil, we embedded a stencil
buffer in intel_texture_image. The intention was that the embedded stencil
buffer would be the golden copy of the texture's stencil bits. When
necessary, we scattered/gathered the stencil bits between the texture
miptree and the embedded stencil buffer.
This approach had a serious deficiency for mipmapped or multi-layer
textures. Any given moment the embedded stencil buffer was consistent with
exactly one miptree slice, the most recent one to be scattered. This
permitted tests of type A to pass, but broke tests of type B.
Test A:
1. Create a depthstencil texture.
2. Upload data into (level=x1,layer=y1).
3. Read and test stencil data at (level=x1, layer=y1).
4. Upload data into (level=x2,layer=y2).
5. Read and test stencil data at (level=x2, layer=y2).
Test B:
1. Create a depthstencil texture.
2. Upload data into (level=x1,layer=y1).
3. Upload data into (level=x2,layer=y2).
4. Read and test stencil data at (level=x1, layer=y1).
5. Read and test stencil data at (level=x2, layer=y2).
v2:
Only allocate stencil miptree if intel->must_use_separate_stencil,
because we don't make the conversion from must_use_separate_stencil to
has_separate_stencil until commit
intel: Use separate stencil whenever possible
v3:
Don't call ChooseNewTexture in intel_renderbuffer_wrap_miptree() in
order to determine the renderbuffer format. Instead, pass the format as
a param to that function.
CC: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 3b38b33c1648b07e75dc4d8340758171e109c598 |
|
15-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Remove unneeded params from intel_renderbuffer_set_draw_offset()
Since the renderbuffer tracks the miptree level and layer that it wraps,
the 'tex_image' and 'zoffset' params are no longer needed to calculate the draw
offsets.
Not only are they no longer needed, but their presence would prevent
calculating the renderbuffer draw offsets in situations where there were
no texture image. Such situations will occur during the HiZ meta-op and
during scatter/gather of separate stencil textures.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| da2816a45e6e3a33246a341fee72e6f893f315d9 |
|
16-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Replace intel_renderbuffer::region with a miptree [v3]
Essentially, this patch just globally substitutes `irb->region` with
`irb->mt->region` and then does some minor cleanups to avoid segfaults
and other problems.
This is in preparation for
1. Fixing scatter/gather for mipmapped separate stencil textures.
2. Supporting HiZ for mipmapped depth textures.
As a nice benefit, this lays down some preliminary groundwork for easily
texturing from any renderbuffer, even those of the window system.
A future commit will replace intel_mipmap_tree::hiz_region with a miptree.
v2:
- Return early in intel_process_dri2_buffer_*() if region allocation
fails.
- Fix double semicolon.
- Fix miptree reference leaks in the following functions:
intel_process_dri2_buffer_with_separate_stencil()
intel_image_target_renderbuffer_storage()
v3:
- [anholt] Fix check for hiz allocation failure. Replace
``if (!irb->mt)` with ``if(!irb->mt->hiz_region)``.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 15b58d8c2233f0e67257cb907c7d90fa23c723a5 |
|
01-Nov-2011 |
Eric Anholt <eric@anholt.net> |
Revert "intel: Drop the immediate validation of the texture object in TFP."
This reverts commit abaebcee787eeb8a89bf7a82ed4d1532fcde5e39.
The assertion I made was that "the zero-copy code in validation" would
zero copy. Of course, I deleted that check back in January because
the two sites that would trigger it (glTexImage() and this one) both
immediately bound their mt to the object, making the other check
pointless.
Removes two extra blits in glx-tfp. Also fixed the Android home
screen, which wasn't rendering because the extra copy broke the
relationship between the texture and the eglimage.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42152
Tested-by: Chad Versace <chad@chad-versace.us>
Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 4ad8a0adec588b4c2c5a8f93265ed46cee5d3ff6 |
|
17-Oct-2011 |
Eric Anholt <eric@anholt.net> |
intel: Drop texture border support code.
Now that texture borders are gone, we never need to allocate our
textures through non-miptrees, which simplifies some irritating paths.
v2: Remove the !mt support case from intel_map_texture_image()
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| cf81f2349cd3152efdab06cdfa3ea6aca9801c35 |
|
23-Oct-2011 |
Brian Paul <brianp@vmware.com> |
intel: remove duplicated #include of texstore.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 66681b4c8cb1ef16f42c1591298cb30c83bca09b |
|
23-Oct-2011 |
Brian Paul <brianp@vmware.com> |
mesa: remove _mesa_alloc_texmemory(), _mesa_free_texmemory()
Core Mesa no longer does any texture memory allocation.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 6e0f9001fe3fb191c2928bd09aa9e9d05ddf4ea9 |
|
23-Oct-2011 |
Brian Paul <brianp@vmware.com> |
mesa: move gl_texture_image::Data, RowStride, ImageOffsets to swrast
Only swrast and the drivers that fall back to swrast need these fields now.
This removes the last of the fields related to software rendering from
gl_texture_image.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
|
07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h.
I initially produced the patch using this bash command:
for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i
's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i
's/GL_FALSE/false/g' $file; done
Then I manually added #include <stdbool.h> to fix compilation errors,
and converted a few functions back to GLboolean that were used in core
Mesa's function pointer table to avoid "incompatible pointer" warnings.
Finally, I cleaned up some whitespace issues introduced by the change.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad@chad-versace.us>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| fd99cd0e10849205749aad580fea8c970fb46a31 |
|
29-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add a helper function for getting miptree size from a texture image.
With 1D array textures, we no longer agree between the GL information
about width/height/depth of a texture and how we lay out a miptree.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 9aff2944a449f586e32f537350e590910d09d016 |
|
28-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Make PBO TexImage use AllocTextureImageBuffer like non-PBO does.
Now that whole block that also lives in AllocTextureImageBuffer can go
away.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 18198e299b52e0301e7264969fdb0351f7f29147 |
|
02-Aug-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rely on Mesa core for glTexImage storage.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| a73d56dce37ae13f422215de1bf1fdfb8e2f6ed7 |
|
28-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Allocate s8z24 separate renderbuffers from AllocTextureImageBuffer().
Before, we were only allocating these from our TexImage, so if the
texture image was set up in any other way (non-accelerated
glGenerateMipmaps()), they'd be missing or wrong.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| e928c34d3ec54bb8a6b80036e6b6a91977bf0865 |
|
21-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add an AllocTextureImageBuffer() implementation using miptrees.
Now we can rely on Mesa core for uploads of data without introducing
an extra copy at validate time.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 019c9ee2204723a9a041316e055e0602e514cad4 |
|
01-Aug-2011 |
Eric Anholt <eric@anholt.net> |
intel: Drop our custom glGetTexImage() code.
The mesa core code uses MapTextureImage() like we need now.
v2: Drop mapping around _mesa_generate_mipmap for compressed, since
the whole path ends up going through MapTextureImage(), and the
meta decompression code ended up causing us to lose track of the
region that was originally mapped and assertion fail.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 8df7ca71125ee0ad74260378ff7e185dcf66f3bc |
|
30-Jul-2011 |
Brian Paul <brianp@vmware.com> |
mesa: Convert GetCompressedTexImage to using MapTextureImage().
This changes drivers to not map the texture on their own before
calling _mesa_get_compressed_teximage().
Tested-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 8004a1cb95b8a195f3f4bbaa8d39d2f3297167de |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rename region->buffer to region->bo, and remove accessor function.
We call all the other drm_intel_bo pointers in intel/*.h "bo", so this
one was rather out of place.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| b4721bf711df5a18489939b373b5e3fa10d28daa |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Drop stale comment about CopyTexSubImage.
We get called for TexImage higher up, and in a relatively normal way
(pixels == NULL is common for FBO setup).
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 2ef77d1c74be936f7597d4f289c732c0db9e8687 |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rely on AllocTextureImageBuffer for our teximage fallbacks.
It will do a more reliable job at getting the image size for
_mesa_texstore right than us.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| d6b5e32f5f3ee7dcdfb525f378344c7a9be78a5f |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rely on mesa core for compressed texture image uploading.
There's nothing in our normal texture path we need for this. We don't
PBO upload blit it. We don't need to worry about flushing because
MapTextureImage handles it. hiz scattergather doesn't apply, but MTI
handles it too.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 32fe506ae14efa055f4773f422e2edd9fd1cffee |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Allow src == NULL and *dst != NULL in intel_miptree_reference().
This makes this API consistent with intel_region_reference, and the
consumers wanted it this way.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| db3ada6055814a4bd5aa95fc9505fc101864391d |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Drop the "intel" argument to intel_miptree_release().
We don't have it in the other refcounting functions, and it was
totally unused.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| abaebcee787eeb8a89bf7a82ed4d1532fcde5e39 |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Drop the immediate validation of the texture object in TFP.
It's totally gratuitous -- the image's miptree will be checked for
binding to the object later, anyway, with zero-copy or blitting as
appropriate.
Tested-by: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| d430e81c3287eba4ee84ca1639a23f92bbe22c8e |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Fix improper freeing of texture data in TFP.
If there happened to be ->Data present, we assertion failed instead of
handling it correctly.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35234
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| fdd4961443d0fbb968c07f5b693c45785ae416f5 |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Refactor texture_from_pixmap and EGL_image region binding.
Tested-by: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 86939e05d232d9b882f0b427b2efad9d754f463a |
|
21-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Unindent the blit call in PBO blit uploads.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 275ce9631b18ea77a160e3201fc3ba5549a462d3 |
|
21-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Drop gratuitous flush in PBO blit upload.
Since the blit gets sequenced after other batchbuffer rendering like
normal, there's no need to push things out early.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 3bb536e4c7b7fb0c0a9b18f5ca2d111996b0ddeb |
|
21-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Clean up check_pbo_format to ignore internalFormat.
All that matters here is the format of the texture, not the
internalformat (which might mean various different pixel formats). In
one case, the pbo upload for MESA_FORMAT_YCBCR would have swapped the
channels for MESA_FORMAT_YCBCR_REV.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 0ba23909475c085d81a5b181744c167ccbe53482 |
|
21-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Move more of the PBO blit upload logic into that function.
This also improves the debugging output in the failure paths so you
get more than just "failed", and don't get spammed with "failed" when
you didn't even have a PBO to try.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| bc0335fc0e0bd6a777ef16ad5245d35ccf7adcf6 |
|
21-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Remove the pbo zero-copy code.
There were notes about the possibility of slowdowns due to zcopy from
a PBO due to thrashing around of the region. Slowdowns are even more
likely now that textures are generally tiled, which a zcopy wouldn't
get. Additionally, there were no checks on the buffer size to ensure
that the hardware-required rounding was present, which could result in
GPU hangs on large zcopy PBOs.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 57024e084a26ce4b9555979b512945aa557cc37b |
|
21-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Remove extra FreeTextureImageBuffer() from glTexImage*.
The core code does this before calling in to us.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| fa2c886863492cc3eeee6d2059ae24edc1cb2bff |
|
17-Sep-2011 |
Brian Paul <brianp@vmware.com> |
intel: make intel_texture_image a subclass of swrast_texture_image
We need to subclass swrast_texture_image because if we use swrast for
fallback rendering, we'll need to have swrast_texture_image objects.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 4d5c820b4f1b5c8f182be98ae2f3cdc993025388 |
|
26-Aug-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Silence several "warning: unused parameter"
The internalFormat, format, and type parameters were not used by
either try_pbo_upload or try_pbo_zcopy, so remove them. The width
parameter was also not used by try_pbo_zcopy (because it doesn't
actually copy anything), so remove it too.
Eric Anholt notes:
The current structure of this code is so hateful I can't bring
myself to say anything about whether changing the current code is
good or bad.
I have a dream that one call would try to make a surface
(miptree/region) out of the PBO, then we'd see about whether it
matches up nicely and zero-copy/blit using that. That would be
reusable for texsubimage, which is currently awful in this
respect.
At some point we should revisit this code with pitchforks and torches.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 6f23d9b637602d9997896c6ca5cba0dfe36a092e |
|
26-Aug-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Silence "warning: unused parameter ‘depth0’"
The depth0 parameter was not used in intel_miptree_create_for_region,
so remove it. All of the places that call this function, pass 1 for
that parameter, and the place where it looks like it should have been
used (the call to intel_miptree_create_internal) also had 1 hard
coded.
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| bfc09e92ffbf3e03f5ea09421d2b8cbae1df53bf |
|
29-Jul-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add implementation of MapTextureImage/UnmapTextureImage.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 0bb29949ba8a9e5a15dc0640dbb0a4e7990a1d57 |
|
27-Jul-2011 |
Eric Anholt <eric@anholt.net> |
mesa: Rename FreeTexImageData to FreeTextureImageBuffer.
This was produced by sed, except for one hunk in driverfuncs.c where
trailing whitespace was dropped.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 7dae1aaf142999e3cfeafb13d30abda667d66d87 |
|
15-Jul-2011 |
Brian Paul <brianp@vmware.com> |
intel: use new gl_texture_image:Face, Level fields
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| aceb66951d467844f2d722cf5d6bd6c429207cd2 |
|
11-Jul-2011 |
Eric Anholt <eric@anholt.net> |
intel: Use _mesa_tex_target_to_face() helper function instead of our own.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| d09704b4e96ab333d567e3a60e77b4dba9be5e76 |
|
22-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: During glTexImage, allocate renderbuffers for faking s8z24 textures
... when using separate stencil.
Define function intel_tex_image_x8z24_create_renderbuffers and call it
in intelTexImage after the miptree has been created and filled with data.
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 951b75808eeac5fb97183ea8e653512bfa35fdb2 |
|
22-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Perform gather on s8z24 texture images during glGetTexImage
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 01e493980c133ad20f70d627dcc1b1900e3ebf44 |
|
22-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Define functions intel_texture_s8z24_scatter/gather
... which copy the stencil bits between intel_image->depth_rb and
intel_image->stencil_rb.
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1a062dfc6f6e872e18f048bb5a61709c36f22870 |
|
21-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add fields to intel_texture for faking s8z24 with separate stencil
Add the fields depth_rb and stencil_rb, and put hooks in place to
release the renderbuffers in intelFreeTextureImageData and
intelTexImage.
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| f94fef83db10f0c9327bd3dd43510ad31c94d82a |
|
09-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Drop the cpp argument to intel_miptree_create().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 6dcc398ac0837025cf60b4d6a056fa3b0a16466f |
|
09-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Calculate compress_byte in intel_miptree_create.
One less argument and thing to get wrong.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 9c5fdbb721147f7304faaa8960f5b64e25a8f673 |
|
09-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Use the gl_format to get the base_format for miptree create.
One less argument to this insanely long function call.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 9a523a48af05118424714f0a34ca3dda6861186a |
|
09-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Drop the internal_format field of the mipmap tree.
This has been replaced with the gl_format now.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| d5809115b568d8b74f47316607dce0730964517a |
|
09-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add the MESA_FORMAT as a field of the miptree.
We only had internal_format before, which is way more irritating to
work with.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| c1090f3019bbe0ff92455e4a9268f8957af9cda0 |
|
09-Jun-2011 |
Roland Scheidegger <sroland@vmware.com> |
mesa: get rid of homegrown logbase2 implementation in drivers
Some of the logbase2 functions did just the same as _mesa_logbase2,
though they were taking signed numbers (but it shouldn't matter for them).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| ecfaab88b2577bd0395bc05d75a036126806a9c4 |
|
10-Apr-2011 |
Brian Paul <brianp@vmware.com> |
mesa: move sampler state into new gl_sampler_object type
gl_texture_object contains an instance of this type for the regular
texture object sampling state. glGenSamplers() generates new instances
of gl_sampler_object which can override that state with glBindSampler().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| e21beaeb10711a38276d704c4e058cb07f9b23e6 |
|
28-Mar-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Don't leak the tex object miptree when replacing it
Eventually the miptree refcounting interface should be cleaned up.
The assymmetry dramatically increases the probability of bugs like
this. It should be made to like like libdrm refcounting or the
refcounting style used in other parts of Mesa.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=33046
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1546291e5b8d3ac02f5bee38252f9d479bcf95cc |
|
03-Mar-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
i965: Align index to type size and flush if the type changes
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| b70610b9823fc7dc3672735c11be1a75fbb1a2a4 |
|
01-Mar-2011 |
Brian Paul <brianp@vmware.com> |
mesa: move PBO-related functions into a new file
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 8d68a90e225d831a395ba788e425cb717eec1f9a |
|
10-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: use pwrite for batch
It's faster. Not only is the memcpy more efficiently performed in the
kernel (making up for the system call overhead), but by not using mmap
we remove the greater overhead of tracking the vma of every batch.
And it means we can read back from the batch buffer without incurring
the cost of a uncached read through the GTT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| e476e122207e6195a16a8c7d2cab90eeba227934 |
|
08-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: Pack dynamic draws together
Dynamic arrays have the tendency to be small and so allocating a bo for
each one is overkill and we can exploit many efficiency gains by packing
them together.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 48024fb44cbbccd0c688949084ef249d3c1208ab |
|
10-Jan-2011 |
Eric Anholt <eric@anholt.net> |
intel: When making a new teximage miptree, make a full one.
If we hit this path, we're level 1+ and the base level got allocated
as a single level instead of a full tree (so we don't match
intelObj->mt). This tries to recover from that so that we end up with
2 allocations and 1 validation blit (old -> new) instead of
allocations equal to number of levels and levels - 1 blits.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 5b3eb7538cd9ceb967b6e9e765896183e7c2c4d4 |
|
10-Jan-2011 |
Eric Anholt <eric@anholt.net> |
Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."
This reverts commit 7ce6517f3ac41bf770ab39aba4509d4f535ef663.
This reverts commit d60145d06d999c5c76000499e6fa9351e11d17fa.
I was wrong about which generations supported baselevel adjustment --
it's just gen4, nothing earlier. This meant that i915 would have
never used the mag filter when baselevel != 0. Not a severe bug, but
not an intentional regression. I think we can fix the performance
issue another way.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 45a56e4730a74a012ad712fd9b6013d900b04742 |
|
09-Jan-2011 |
Vinson Lee <vlee@vmware.com> |
intel: Include mfeatures.h in files that perform feature tests.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 7ce6517f3ac41bf770ab39aba4509d4f535ef663 |
|
06-Jan-2011 |
Eric Anholt <eric@anholt.net> |
intel: Always allocate miptrees from level 0, not tObj->BaseLevel.
BaseLevel/MaxLevel are mostly used for two things: clamping texture
access for FBO rendering, and limiting the used mipmap levels when
incrementally loading textures. By restricting our mipmap trees to
just the current BaseLevel/MaxLevel, we caused reallocation thrashing
in the common case, for a theoretical win if someone really did want
just levels 2..4 or whatever of their texture object.
Bug #30366
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 01b70c06284f3a0ab2de61228b73c78ed00a1a14 |
|
06-Jan-2011 |
Eric Anholt <eric@anholt.net> |
intel: Drop unused first/lastlevel args to miptree_create_for_region.
We're always making a single-level, 0-baselevel miptree.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 83e93b6008213ad86607027e8434ecaccc8b1a2c |
|
19-Nov-2010 |
Brian Paul <brianp@vmware.com> |
mesa: pass gl_format to _mesa_init_teximage_fields()
This should prevent the field going unset in the future. See bug
http://bugs.freedesktop.org/show_bug.cgi?id=31544 for background.
Also remove unneeded calls to clear_teximage_fields().
Finally, call _mesa_set_fetch_functions() from the
_mesa_init_teximage_fields() function so callers have one less
thing to worry about.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 5716ad24255a39f4fb91f9ca28ccfe29e3d4a4b9 |
|
03-Nov-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove duplicated teximage miptree to object miptree promotion.
intel_finalize_mipmap_tree() does this optimization too, just more
aggressively.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 0300c9ab54f80bb7f172672c8e748721c658f660 |
|
03-Nov-2010 |
Eric Anholt <eric@anholt.net> |
intel: Avoid taking logbase2 of several things that we max.
logbase2(max(width, height, depth)) ==
max(logbase2(width), logbase2(height), logbase2(depth)), but in 60
bytes less code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| f9995b30756140724f41daf963fa06167912be7f |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1a98a463043e1558b1ad6ebf79a1371d6218ac5a |
|
30-Sep-2010 |
Nicolas Kaiser <nikai@nikai.net> |
dri/intel: remove duplicated include
Remove duplicated include.
Signed-off-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 86ad797be4b9b2768f1c28bb5ac3ae6f9a41794a |
|
25-Sep-2010 |
Eric Anholt <eric@anholt.net> |
intel: More reverting of the sw fallback for depth texture border color.
The rest was done with 9aec1288eeae8e87adc9a99f377be536892941b2
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 2337f364b193c6379ecd5744743b26a5e75e73ae |
|
24-Sep-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove unnecessary minimum pitch alignment to 32 bytes.
This broke with the cleanup I did in convolution removal. It's
unnecessary anyway since region_alloc_tiled adjusts pitches for us (64
byte alignment)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| a62efdf82c20747feb11dfd7756f0579aa914b57 |
|
10-Sep-2010 |
Eric Anholt <eric@anholt.net> |
mesa: Remove EXT_convolution.
More optional code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 17eace581d25a626a7d75d9d1205d012cbb14a6e |
|
23-Sep-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
dri: Pass the __DRIscreen and the __DRIscreen private back to image lookup
We will typically have a current context when we need to lookup the image,
but the lookup implementation don't need it so drop it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
The slightly less mechanical change of converting the emit_reloc calls
will follow.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 61aa9c86c20b1bc9957aa9fe9976703a93cc4d3c |
|
13-May-2010 |
Eric Anholt <eric@anholt.net> |
intel: Don't update window system renderbuffers on TexImage.
While sometimes rendering occurs in the form of blits for TexImage, it
doesn't interact with the window system renderbuffers, so skip it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| f829e76d8835382b8a52224dfbb2556360e41ffc |
|
11-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Don't update renderbuffers in intelSetTexBuffer2 if we have invalidate
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| c4775a27e3aaa2006b98f225387499b79bc609ef |
|
10-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop intelFlush()
Now that intel_flush() deosn't use the needs_mi_flush argument, we can
finally drop one of the two flush functions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 06c72da97a1bce87bc4b3fb8e7e18bf966926acb |
|
04-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Update renderbuffers unconditionally in intelSetTexBuffer2()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 362c1bf75eb74de5b4655c481b74f79718ed4a34 |
|
17-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Replace mt->pitch with mt->region->pitch.
The pitch is not really an inherent part of the miptree, since it's
not part of any of the layout calculations, and it's dictated by the
libdrm-allocated region pitch now.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| a232cc59e3f8ac8462c23b1a83e0ba60b451e681 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove support for the DRI1 TFP extension.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 10e79627414bc2bbc72d68ed25fb9999948a294f |
|
12-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement GL_OES_EGL_image entrypoints
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| d449627829e1a4a3250a1a723af2f4e3cd5fd194 |
|
18-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement the DRI2 invalidate function properly
This uses a stamp mechanisms to mark the DRI drawable as invalid.
Instead of immediately updating the buffers we just bump the drawable
stamp and call out to DRI2GetBuffers "later".
"Later" used to be at LOCK_HARDWARE time, and this patch brings back
callouts at the points where we used to call LOCK_HARDWARE. A new function,
intel_prepare_render(), is called where we used to call LOCK_HARDWARE,
and if the buffers are invalid, we call out to DRI2GetBuffers there.
This lets us invalidate buffers only when notified instead of on
every glViewport() call. If the loader calls the DRI invalidate
entrypoint, we disable viewport triggered buffer invalidation.
Additionally, we can clean up the old viewport mechanism a bit,
since we can just invalidate the buffers and not worry about
reentrancy and whatnot.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 61d26bc82e7c4100acfb551cbb0ba9d84bbc4ba5 |
|
08-Feb-2010 |
Francisco Jerez <currojerez@riseup.net> |
dri2: Event driven buffer validation.
When a buffer invalidation event is received from the X server, the
"invalidate" hook of the DRI2 flush extension is executed: A generic
implementation (dri2InvalidateDrawable) is provided that just bumps
the "pStamp" sequence number in __DRIdrawableRec.
For old servers not supporting buffer invalidation events, the
invalidate hook will be called before flushing the fake front/back
buffer (that's typically once per frame -- not a lot worse than the
situation we were in before).
No effort has been made on preserving backwards compatibility with
version 2 of the flush extension, but I think it's acceptable because
AFAIK no released stack is making use of it.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| debf00e5fc3828f63e0f99d72c7fa6cd6ce012c5 |
|
09-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
dri_interface: Introduce DRI tokens for the texBuffer texture formats
This used to take GLX tokens, but the DRI interface can't depend on GLX
defines. We fix this by introducing DRI tokens that have the same value
as the GLX texture format tokens.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| fd2378e4b0630e26562f3d742b8b2d9a5d5844b0 |
|
06-Feb-2010 |
Damien Lespiau <damien.lespiau@intel.com> |
intel: Allow L8 PBO blit uploads.
Bug #32810
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 12d0721ae156bbb6c1bda1e28cfc71fe081a2a4c |
|
05-Feb-2010 |
Eric Anholt <eric@anholt.net> |
intel: Allow PBO acceleration for GL_RGBA8 MESA_FORMAT_ARGB8888.
This improves firefox-talos-svg runtimes on cairo-gl by 14%.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 22bbc979944084ddffbb2c42a8178e172beaece0 |
|
31-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Respect texture tiling when doing a PBO blit teximage upload.
Bug #26008. Fixes piglit pbo-teximage-tiling-2.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 9b22427911ad27efc1f36faee9462c6082d0417c |
|
25-Jan-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/mesa/drivers/dri/intel/intel_screen.c
src/mesa/drivers/dri/intel/intel_swapbuffers.c
src/mesa/drivers/dri/r300/r300_emit.c
src/mesa/drivers/dri/r300/r300_ioctl.c
src/mesa/drivers/dri/r300/r300_tex.c
src/mesa/drivers/dri/r300/r300_texstate.c
|
| fb6bff3712d71cfe131fbf70154d326cdf39e7c8 |
|
23-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
intel: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| c6ef705e414c8e93ee471f50d15ada3492a9b067 |
|
11-Jan-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
Merge branch 'master' of ssh://people.freedesktop.org/~jbarnes/mesa
Conflicts due to DRI1 removal:
src/mesa/drivers/dri/intel/intel_context.c
src/mesa/drivers/dri/intel/intel_screen.c
|
| 7c50d29f7ced3d60e52ee0146d982b49ea421de2 |
|
08-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel/DRI2: add DRI2flushExtension support with invalidate hook
Needed to support the SwapBuffers code properly.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| d282128ff68cc58bc3f5b808031c5fe7325bd69b |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove struct intel_framebuffer
With the vsync fields no longer relevant and by refactoring the code
to no longer use color_rb[0-1] we can just use struct gl_framebuffer
directly.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 01dc463e5d5513e059eea601710cd4babe02610d |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop LOCK/UNLOCK_HARDWARE()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| ee7dfbbd6cc85f221b371bf512bd1571744158e8 |
|
05-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Use _mesa_get_current_tex_object() to clean up TFP path.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 8f30ceaaefc33401b08739a16ce1c5638d6432fa |
|
04-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove duplicated arguments from intel_miptree_match_image().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 2073006c9566b08888b4338748a843c645bd0db1 |
|
30-Oct-2009 |
Eric Anholt <eric@anholt.net> |
intel: Set the texture format in the TFP path.
This fixes a regression in piglit's tfp test as of
11caea687e3f10ae12d33e44edf84635f73047dd. Additionally, set the texture
format for the RGB textures to MESA_FORMAT_XRGB8888 and support it in the
hw paths so that hopefully sw fallbacks involving TFP get better alpha
behavior.
The radeon drivers appear to need the same fix.
Bug #24803
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| d0b6147291fe42d7d733b3d0e5b10c4f4f08030f |
|
29-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove memcpy_get_tex_image() code
This has been lifted into core Mesa where it can be used for all drivers
that use the _mesa_get_teximage() fallback for ctx->Driver.GetTexImage().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| ea414e331802e49d59eb2ddd2466d58a383bc931 |
|
29-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: check for single memcpy() in memcpy_get_tex_image()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1596f714d2377036152bd126949c6526fdb06fbf |
|
29-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove debug code
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| dcb4716802878690908a101b1c196737851d4151 |
|
29-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: added fast memcpy path for glGetTexImage()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1f196b786d6bd0c6a5dbdc638574ff716cc3d4de |
|
29-Oct-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'texformat-rework'
Conflicts:
src/mesa/drivers/dri/radeon/radeon_fbo.c
src/mesa/drivers/dri/s3v/s3v_tex.c
src/mesa/drivers/dri/s3v/s3v_xmesa.c
src/mesa/drivers/dri/trident/trident_context.c
src/mesa/main/debug.c
src/mesa/main/mipmap.c
src/mesa/main/texformat.c
src/mesa/main/texgetimage.c
|
| 11caea687e3f10ae12d33e44edf84635f73047dd |
|
26-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: choose texture format in core mesa, not drivers
Call the ctx->Driver.ChooseTextureFormat() function from core Mesa's
_mesa_[Copy]TexImage functions instead of in the driver functions.
One less thing for drivers to do.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| e3f2efc4f14d6f0d06560d2acfac73628f5a74a6 |
|
26-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: remove calls to _mesa_compressed_row_stride()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 35efc6a1b3e3dada2cf9bd3a503c1b84f4bcb7f5 |
|
25-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: change compressed texture size calls
Replace calls to ctx->Driver.CompressedTextureSize with calls to
_mesa_format_image_size. The former always called the later.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 49d402e275cdaf46de8db5a475dfe00509141195 |
|
23-Oct-2009 |
Eric Anholt <eric@anholt.net> |
Merge remote branch 'origin/mesa_7_6_branch'
Conflicts:
src/mesa/drivers/dri/intel/intel_fbo.c
src/mesa/drivers/dri/intel/intel_mipmap_tree.c
src/mesa/drivers/dri/intel/intel_mipmap_tree.h
src/mesa/drivers/dri/intel/intel_tex_copy.c
src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 2d17dbfb5346b6d75e87c839148cbe125bf5cd6d |
|
09-Jul-2009 |
Eric Anholt <eric@anholt.net> |
intel: Keep track of x,y offsets in miptrees and use them for blitting.
By just using offsets, we confused the hardware's tiling calculations,
resulting in failures in miptree validation and blit clears.
Fixes piglit fbo-clearmipmap.
Bug #23552. (automatic mipmap generation)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| e6594a22f298833eeb6881795b24d03d2fd8e898 |
|
13-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: pass zslice to intel_miptree_image_offset()
This lets us get rid of intel_miptree_depth_offsets() and simplify all
of the calling code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 193dddb04e26d4e6ccefef03ce7a620606d6de5f |
|
02-Oct-2009 |
Eric Anholt <eric@anholt.net> |
intel: Use new drm_intel_bo_references() to avoid flushing.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 3e34a2a2b97e7c93955deedb7c12b73bccd6662d |
|
06-Oct-2009 |
Brian Paul <brianp@vmware.com> |
drivers: don't include texformat.h
And remove other unneeded #includes while we're at it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1a2bb37264b4448d33f2948fe1702c9dc936395d |
|
06-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: lift _mesa_set_fetch_functions() calls out of drivers
Call it from in the main Mesa glTexImage functions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 32aa40eee46fd0b15f3873069f2440ea2dd75408 |
|
02-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: removed gl_texture_image::CompressedSize field
Just call ctx->Driver.CompressedTextureSize() when we need to get
the compressed image size.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 4ca9ba254462b9be55b78df1d50519e10b2f4d73 |
|
02-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: move mesa_set_fetch_functions()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| b6bdafdf2cf1110b4a5ca7cf9e1c3dcb124b800f |
|
02-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: remove gl_texture_image::IsCompressed field
Use _mesa_is_format_compressed() instead.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1f7c914ad0beea8a29c1a171c7cd1a12f2efe0fa |
|
01-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: replace gl_texture_format with gl_format
Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum.
ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x.
gl_texture_format will go away next.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 0b1f4dc0fa62c46030b39a0f7027dd1b0ef966fd |
|
29-Sep-2009 |
Brian Paul <brianp@vmware.com> |
drivers: use new _mesa_texstore() function
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| ddffe4546a81216cde4376ee49cbaa021f4d04bb |
|
28-Sep-2009 |
Brian Paul <brianp@vmware.com> |
drivers: use more mesa format functions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 9fbb8884f034e0d691fed0e099d4d796f3b42848 |
|
28-Sep-2009 |
Brian Paul <brianp@vmware.com> |
mesa/drivers: use _mesa_get_format_bytes()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| e0bc4533ebccbfb844522e2b6ddd171b97d693e8 |
|
28-Sep-2009 |
Brian Paul <brianp@vmware.com> |
mesa/drivers: use _mesa_get_format_bytes()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| f782f90c45fc9a483483ebd36c1971ecd0c7988d |
|
28-Sep-2009 |
Brian Paul <brianp@vmware.com> |
mesa: use _mesa_get_texstore_func()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 2914f2b7fd9bd1082f8cce724d234208b900c3d4 |
|
16-Sep-2009 |
Brian Paul <brianp@vmware.com> |
mesa: move generate mipmap calls
Per the suggestion in the Intel driver, move the calls to
ctx->Driver.GenerateMipmap() into core Mesa so that drivers don't
have to worry about it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| e61215242b977f8422b3284b4b2b0c853daf50ca |
|
08-Sep-2009 |
Brian Paul <brianp@vmware.com> |
intel: #include clean-ups
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| ced699b37a048ea32434c222fcf83235048918bc |
|
08-Sep-2009 |
Brian Paul <brianp@vmware.com> |
i965: use _mesa_is_bufferobj()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 9c0ba017c8ff7caafc3ff94da3c035e687231596 |
|
23-Jun-2009 |
Eric Anholt <eric@anholt.net> |
i965: Fix depth-texture Y-tiling detection for sized internal formats.
Fixes assertion failure on norsetto shadow mapping demo.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 8f81a6468fdbc7320800ea497791e3e1b8f782ca |
|
22-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Avoid trying to do blits to Y tiled regions.
This is somewhat nasty, but we need to do Y-tiled depth for FBO support.
May help with corruption and hangs since enabling texture tiling, and
since switching depth textures to Y tiled.
Fixes piglit depthtex.c on 965.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 2c36ed90672720966c26a8c27e222ec14b23aae6 |
|
22-Jun-2009 |
Michel Dänzer <michel@daenzer.net> |
intel: Fix glReadPixels regression since changing context init order.
Fixes regression in dd26899ca39111e0866afed9df94bfb1618dd363 that also
affected some PBO operations.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| a03b349153660e449daf4f56d750f1caef23b1a5 |
|
09-Jun-2009 |
Brian Paul <brianp@vmware.com> |
i965: added intelFlush() call in intel_get_tex_image()
Fixes the render-to-texture test in progs/tests/getteximage.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| b38dbc51793b9007de147eff452d535410ef7c55 |
|
09-Jun-2009 |
Brian Paul <brianp@vmware.com> |
intel: use GLboolean, not int, for compressed parameter
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 89205a8760b8a4651962b1ff0206699cbcd78d75 |
|
09-Jun-2009 |
Brian Paul <brianp@vmware.com> |
intel: make a bunch of glTexImage-related functions static
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 4eb9e58bbb3b2b9db4c795134b2daa2ecf29fd20 |
|
09-Jun-2009 |
Brian Paul <brianp@vmware.com> |
intel: whitespace clean-ups
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 22690482e692cb5ed2f84d3e69545c09292e3484 |
|
16-May-2009 |
Eric Anholt <eric@anholt.net> |
intel: Don't complain on falling back from PBO fastpaths.
Instead, stash the debug info under the handy debug flag.
Bug #20053
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1d663ae2925ffadf419ddbea9eca8d5706ea6510 |
|
08-May-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add a metaops version of glGenerateMipmapEXT/SGIS_generate_mipmaps.
In addition to being HW accelerated, it avoids the incorrect
(black) rendering of the mipmaps that SW was doing in fbo-generatemipmap.
Improves the performance of the mipmap generation and drawing in
fbo-generatemipmap by 30%.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 69cbf3c68675915517ae64c81d7a8a42de4e01a3 |
|
16-Apr-2009 |
Roland Scheidegger <sroland@vmware.com> |
intel: fix small compressed texture upload
need to round up height for _mesa_copy_rect otherwise
textures with height smaller than 4 won't get copied to the miptree at all
Also fix up the confusing debug output (don't output unitialized values,
and output if data is present and the compressed flag)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 8bc3a6eb1918710eadecb9b8d28a4afa2150a257 |
|
09-Apr-2009 |
Eric Anholt <eric@anholt.net> |
intel: Fix segfault when doing SW mipmap generation with a PBO texture upload.
Triggered in test-fbo from clutter since
37fb2d9b23eab5dbbb43a212c3475cb8016837d8.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 4d363cc16d94b1e356b7cc23bb3b15ca0374d1e3 |
|
04-Apr-2009 |
Brian Paul <brianp@vmware.com> |
intel: #include texgetimage.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 37fb2d9b23eab5dbbb43a212c3475cb8016837d8 |
|
30-Mar-2009 |
Adam Jackson <ajax@redhat.com> |
intel: Avoid mapping the texture image for CopyTex{,Sub}Image
We don't upload the pixels with the CPU in that case, so the map will
only serve as a way of triggering cache flushes over a bunch of data we
don't touch.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 66175aac7609ad314f25fbdff0d3958af310dc24 |
|
18-Mar-2009 |
Eric Anholt <eric@anholt.net> |
Fix DRI2 accelerated EXT_texture_from_pixmap with GL_RGB format.
This requires upgrading the interface so that the argument to
glXBindTexImageEXT isn't just dropped on the floor. Note that this only
fixes the accelerated path on Intel, as Mesa's texture format support is
missing x8r8g8b8 support (right now, GL_RGB textures get uploaded as a8r8gb8,
but in this case we're not doing the upload so we can't really work around it
that way).
Fixes bugs with compositors trying to use shaders that use alpha channels, on
windows without a valid alpha channel. Bug #19910 and likely others as well.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 5b354d39d466e3a463c6766fe06f737aa6e6b7bd |
|
13-Feb-2009 |
Kristian Høgsberg <krh@redhat.com> |
intel: Fix intelSetTexBuffer miptree leak.
The intelImage also holds a reference to the miptree, so unref that as well.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 40dd024be618d805b3744e15d25e115018641324 |
|
18-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: tell libdrm whether we want a cpu-ready or gpu-ready BO for regions.
This lets us avoid allocing new buffers for renderbuffers, finalized miptrees,
and PBO-uploaded textures when there's an unreferenced but still active one
cached, while also avoiding CPU waits for batchbuffers and CPU-uploaded
textures. The size of BOs allocated for a desktop running current GL
cairogears on i915 is cut in half with this.
Note that this means we require libdrm 2.4.5.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 36daee1c7bec44b9d3641f056c84b3b2f39fabd9 |
|
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: asst. casts to silence warnings
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
|
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 8db761409dadc2e899d4e7107eff3aa07b07aa11 |
|
13-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Add a width field to regions, and use it for making miptrees in TFP.
Otherwise, we would use the pitch as width of the texture, and compiz would
render the pitch padding on the right hand side.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 34bba445a12f7b81654a416fd1630c8890cfc178 |
|
12-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Don't segfault on TFP from a bad drawable.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 35fd72756a05463568d94862f4fcd234903e1204 |
|
08-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track move of bo_exec from drivers to bufmgr.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
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| f56b569e9af356c11869ee49a4669bb01b75397e |
|
13-Aug-2008 |
Kristian Høgsberg <krh@redhat.com> |
DRI2: Drop sarea, implement swap buffers in the X server.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
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| f75843a517bd188639e6866db2a7b04de3524e16 |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
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| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 1e645b365900cf1c71ca5594bd6b549a1f203040 |
|
26-Jul-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'master' into drm-gem
Conflicts:
src/mesa/drivers/dri/common/dri_bufmgr.c
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
|
| ff60e3fa031504b403766324b1fae3ccacec6650 |
|
25-Jul-2008 |
Eric Anholt <eric@anholt.net> |
intel: If a tex image doesn't fit in the object's tree, make a temporary tree.
Previously, we would just store the data as malloced memory hanging off the
object, which would get memcpyed in at validate time. This broke an
oglconform render-to-texture test, since validate wasn't called but a miptree
was expected.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| b4b7326717d3253656f9702fc04f06f8d210a6aa |
|
18-Jul-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: fix texture border issue. (bug #16697)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 93f701bc3619864ac6f067d37212e96545a57e16 |
|
26-Jun-2008 |
Eric Anholt <eric@anholt.net> |
intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.
Most of these were to ensure that caches got synchronized between 2d (or meta)
rendering and later use of the target as a source, such as for texture
miptree setup. Those are replaced with intel_batchbuffer_emit_mi_flush(),
which just drops an MI_FLUSH. Most of the remainder were to ensure that
REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped.
Those are now replaced by automatically flushing those when dropping the lock.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 0dbd5c864047ad2ad3d459493c9e82be57427f83 |
|
09-May-2008 |
Dave Airlie <airlied@redhat.com> |
intel: use new mipmap generation hooks in driver.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 7c2a3fced8bbf0915ee4160c23b1752917c1e69d |
|
21-Apr-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: fix an assertion failure. fix bug #15575
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| e82dd8c6e1fa2fff5b960de26961080ba5e9651d |
|
27-Mar-2008 |
Kristian Høgsberg <krh@redhat.com> |
DRI interface changes and DRI2 direct rendering support.
Add DRI2 direct rendering support to libGL and add DRI2 client side
protocol code. Extend the GLX 1.3 create drawable functions in
glx_pbuffer.c to call into the DRI driver when possible.
Introduce __DRIconfig, opaque struct that represents a DRI driver
configuration. Get's rid of the open coded __GLcontextModes in the
DRI driver interface and the context modes create and destroy
functions that the loader was requires to provide. glcore.h is no
longer part of the DRI driver interface. The DRI config is GL binding
agnostic, that is, not specific to GLX, EGL or other bindings.
The core API is now also an extension, and the driver exports a list
of extensions as the symbol __driDriverExtensions, which the loader
must dlsym() for. The list of extension will always include the DRI
core extension, which allows creating and manipulating DRI screens,
drawables and contexts. The DRI legacy extension, when available,
provides alternative entry points for creating the DRI objects that
work with the XF86DRI infrastructure.
Change DRI2 client code to not use drm drawables or contexts. We
never used drm_drawable_t's and the only use for drm_context_t was as
a unique identifier when taking the lock. We now just allocate a
unique lock ID out of the DRILock sarea block. Once we get rid of the
lock entirely, we can drop this hack.
Change the interface between dri_util.c and the drivers, so that the
drivers now export the DriverAPI struct as driDriverAPI instead of the
InitScreen entry point. This lets us avoid dlsym()'ing for the DRI2
init screen function to see if DRI2 is supported by the driver.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 76430815a73559c55e2061ceb2634406d1284f03 |
|
26-Mar-2008 |
Michal Wajdeczko <Michal.Wajdeczko@intel.com> |
[intel] Use mesa texmemory functions to allocate teximage Data.
Failure to consistently do so resulted in mismatched aligned versus
unaligned alloc/free.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 4478926b3a6d15d079a44f6cebebc1db85d382f6 |
|
17-Mar-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: It is needed to allocating texture memory to accommodate
a texture when calling TexImage with pixels set to NULL pointer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| dcbe215c015c8dc48440f578023c2b9d12b934e4 |
|
10-Mar-2008 |
Kristian Høgsberg <krh@sasori.boston.redhat.com> |
DRI2: Make setTexBuffer take a __DRIdrawable instead of a BO handle.
This fixes a problem where texturing from the same Pixmap more than
once per batchbuffer would hang the DRI driver. We just use the region
associated with the front left renderbuffer of the __DRIdrawable for
texturing, which avoids creating different regions for the same BO.
This change also make GLX_EXT_texture_from_pixmap work for direct
rendering, since tracking the __DRIdrawable -> BO handle now uses
the standard DRI2 event buffer. Of course, DRI2 direct rendering
doesn't exist yet.
Finally, this commit bumps the DRI interface version again, accounting
for the change in the DRI_TEX_BUFFER extension and the change in
commit 0bba0e5be7a4a7275dad1edc34bdcc134ea1f424 to pass in the
event buffer head index on drawable creation.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 61c3c2c36301671b8f913cf739e13d049ef91868 |
|
25-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Change GetCompressedTexImage in dd_function_table to not take const pointers.
They're changed by the intel driver implementation and thus not const.
Fixes compilation warning.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 6d48779c7e5c9002d1bec4b1266ca05a474218ef |
|
15-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Add TTM buffer object based texture from pixmap implementation.
Currently only implemented for intel hw.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 746db75cfbdd760cb19d2dfd18b628aeb2fc3054 |
|
01-Feb-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
[intel] fix for previous fix
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| a9a483b43ec090408148d069bc184c0a21323654 |
|
01-Feb-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
[intel] use _mesa_copy_rect for upload compressed texture,
this fix bad texture issue in some games(UT and quake).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 101abee6c4fc2c9284ff2ba6f9f9138327d6963d |
|
19-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Fix and reenable (software) SGIS_generate_mipmap
The core problem was that _mesa_generate_mipmap was not respecting RowStride
of the source image. Additionally, the intel private data associated with the
images (level and face) was not being initialized for the
_mesa_generate_mipmap-generated images.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| c5456a6b24525e9307e58fc2a02a6f62ca507730 |
|
14-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Remove useless intel_region_idle.
The idling it was trying to ensure was covered by the
intel_miptree_image_map()->intel_region_map() that immediately followed it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 7c71ef3a3d0cf2620525f468960cdc76a0fb0d33 |
|
12-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move bufmgr back to context instead of screen, fixing glthreads.
Putting the bufmgr in the screen is not thread-safe since the emit_reloc
changes. It also led to a significant performance hit from pthread usage
for the attempted thread-safety (up to 12% of a cpu spent on refcounting
protection in single-threaded 965). The motivation had been to allow
multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| f00a64999c197e6a96e65fd00f64224a6f22c9fa |
|
17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Add 965 support to shared intel_blit.c
This requires that regions grow a marker of whether they are tiled or not,
because fence (surface) registers are ignored by the 965 2D engine.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|
| 77a5bcaff43df8d54e0e0ef833726e4b41d7eb36 |
|
07-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move over files that will be shared with 965-fbo work.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
|