| 25fc405cf79c5b1c0a3fa13c40d0909863062245 |
|
05-Sep-2014 |
carll <carll@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
The update fixes a format issue in the PPC test
none/tests/ppc32/jm-insns.c and none/tests/ppc64/jm-insns.c.
The BE and LE output expect files are updated as well.
There is no Bugzilla related to this update. The issue
was found and the initial patch and BE output update
was done by Florian Krohm <florian@eich-krohm.de>.
Carl Love <cel@us.ibm.com> added the LE output update.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14466 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| dd690bf8d81c9119a7228446be12e3366e202176 |
|
08-Aug-2014 |
carll <carll@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
This commit is for Bugzilla 334836. The Bugzilla contains patch 3 of 3
to add PPC64 LE support. The other two patches can be found in Bugzillas
334384 and 334834. Note, there are no VEX changes in this patch.
PP64 Little Endian test case fixes.
This patch adds new LE and BE expect files where needed. In other
cases, the test was fixed to run correctly on LE and BE using based on
testing to see which platform is being used.
Where practical, the test cases have been changed so that the output
produced for BE and LE will be identical. The test cases that require
a major rewrite to make the output identical for BE and LE simply
had an additional expect file added.
Signed-off-by: Carl Love <carll@us.ibm.com>
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14240 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 9237e27cb26897344d4707497180f78c80a3b0a2 |
|
20-Sep-2013 |
carll <carll@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Add test-cases for Power ISA 2.06 insns: divdo/divdo. and divduo/divduo.
The patch was supplied by Anmol P. Paralkar.
Valgrind Bugzilla 325110
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13574 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 7b8ef5e3d2b4757e0e19e6a446448315be189f84 |
|
18-Sep-2013 |
carll <carll@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Oops, commit 13562 said the patch was done by Amodra. It should have
said the patch was from Paralkar Anmol.
This is the fix for Bugzilla 324765.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13563 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| f13107a45926fa51c6eed7141192597077003d06 |
|
18-Sep-2013 |
carll <carll@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
The patch fixes the assembly of the Power dcbtst and dcbt instructions.
The assembly of these instructions is not alwasy being done correctly as
described in the following email reply.
Re: Assembling Power instructions: dcbtst/dcbt.
From: Peter Bergner <bergner at vnet dot ibm dot com>
To: Paralkar Anmol-B07584 <B07584 at freescale dot com>
Cc: "amodra at bigpond dot net dot au" <amodra at bigpond dot net dot au>, "binutils at sourceware dot org" <binutils at sourceware dot org>
Date: Fri, 13 Sep 2013 15:22:35 -0500
Subject: Re: Assembling Power instructions: dcbtst/dcbt.
Authentication-results: sourceware.org; auth=none
References: <DC6D7B34688246489A6578981A5ADEB9302A07 at 039-SN2MPN1-012 dot 039d dot mgd dot msft dot net>
On Fri, 2013-09-13 at 18:32 +0000, Paralkar Anmol-B07584 wrote:
> Hello,
>
> Per Power ISA Version 2.07 (May 3, 2013) "4.3.2 Data Cache Instructions",
> the assembly language syntax for the dcbtst instruction (pp. 771) is:
>
> dcbtst RA,RB,TH [Category: Server]
> dcbtst TH,RA,RB [Category: Embedded]
>
> and it's layout in the object code is:
>
> +------+------+------+------+------------+---+
> | 31 | TH | RA | RB | 246(0xF6) | / |
> |0 |6 |11 |16 |21 |31 |
> +------+------+------+------+------------+---+
>
> (Analogously: dcbt pp. 770)
>
> However, GAS (as of version 2.23.52.20130912) decides on the syntax to use based on
> processor/architecture dialect (not Power ISA Category), using the Server syntax in
> the case of POWER4 and the Embedded syntax for generic PPC or VLE.
That was a bug fixed here:
https://sourceware.org/ml/binutils/2012-11/msg00352.html
> Consequently (e.g.),
>
> dcbtst 17, 14, 6
>
> in the assembly file gets "misassembled" under -many for a user-space program on Linux:
When you only specify -many (and not one of -mpower4, -mpower5, etc.),
the assembler/disassembler will choose a default -m<CPU> value for
you. That has changed over time, but is generally one of the newer
server cpus. For example, for binutils trunk, the default is now
-mpower8 and for your 2.23.x binutils, it is -mpower7.
That should force the assembler and disassembler to assemble
the instruction using the server operand order you want, but the bug
above (which is in 2.23) basically resets it to an old cpu, so it
chooses to use the embedded/old cpu setting.
The patch from Amodra fixes the issue by manually generating the correct
hex value for the instruction rather then leaving it to the assembler to
generate the hex value from the symbolic assembly instruction name.
This is the fix for Bugzilla 324765.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13562 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 2cc17eaccf56353d5028b99a105cfcec854dae1d |
|
07-Sep-2013 |
carll <carll@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
The existing overflow detection in VEX/priv/guest_ppc_toIR.c/set_XER_OV_64()
under the case PPCG_FLAG_OP_MULLW: does not apply to the mulldo as we need to
detect overflow when performing a Multiply Low Doubleword (not Multiply Low
Word). Hence, we added a new enumeration value PPCG_FLAG_OP_MULLD in
VEX/priv/guest_ppc_defs.h and a corresponding new case under which the
computation for detecting overflow for mulldo/mulldo. is added in
set_XER_OV_64(). The tests have been added to: none/tests/ppc32/jm-insns.c
Vex commit 2754 for the source code fix
This commit adds the test cases.
Bugzilla 324594, submitted by Anmol P. Paralkar
Patch reviewed and tested by Carl Love
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13537 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 074637e5b8af220614f9727bccc177e482b7ddc5 |
|
05-Sep-2013 |
carll <carll@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
The current VEX code is not properly handling a non-zero TH field in the
dcbt instruction, which is valid for several forms of data cache block
touch instructions. The VEX commit 2761 fixed the missing support in
VEX/priv/guest_ppc_toIR.c. This commit adds tests for the the non-zero
fields to the test cases for 32 and 64-bit modes.
Bugzilla 324518
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13534 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 32b4a4264d671d072f57190fe88262ae698f6fa3 |
|
07-Jul-2012 |
philippe <philippe@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
fix 303127 Power test suite fixes for frsqrte, vrefp, and vrsqrtefp instructions
The frsqrte and vrefp instructions produce an approximate result.
According to the ISA document for the POWER processor, the result will
vary in its precision for different processor implementations. This patch
fixes the masks to be applied to the results to remove the variability
in the results. The expected output files are also updated to reflect the
change in the result given the new masking of the result.
patch from Carl Love <cel@us.ibm.com>
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12720 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| a6be8b1a7dd8b02ba74d7865430aa8ec44b4a79c |
|
06-Jul-2012 |
philippe <philippe@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
fix 303116 - Add support for the POWER instruction popcntb (Valgrind side)
patch from carll@us.ibm.com
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12719 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| b0e5b69e93fc6525194079347fb5e8d611c99ebd |
|
06-Jul-2012 |
philippe <philippe@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
fix 302918 Enable testing of the vmaddfp and vnsubfp instructions in the testsuite
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12718 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 7ea7aa23b433745c5ba163add38415aa79c92344 |
|
23-Jun-2012 |
bart <bart@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Fix compiler warnings for ppc test cases. Patch from Carl Love (carll@us.ibm.com). See also #302205.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12663 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 63b52cfe3df319eac28ad8c8b40adde62079e07f |
|
05-Jul-2011 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Enable testing of fres{.} and frsqrt{.} instructions. Fixes #275308.
Based on a patch by Maynard Johnson <maynardj@us.ibm.com>.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11857 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 9f4e472e71cf49860745eaf439a021f00ddc2c7c |
|
27-Apr-2011 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Fix bogus asm constraints in jm-insns.c. Fixes #263919.
(Maynard Johnson, maynardj@us.ibm.com)
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11712 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 2762a738523d6f37cab30c4b1fae6a30414a81f6 |
|
27-Apr-2011 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Fix a bunch of printf format-string warnings when compiling this "-m64".
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11710 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| ad69807130f312d8714f40214aab43bee38d0747 |
|
11-Oct-2010 |
bart <bart@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
none/tests/ppc*/jm-insns.c: Minor simplification.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11425 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| e4f74838b9b2bbaaaca08117214194ec368caf95 |
|
06-Oct-2010 |
bart <bart@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
ppc/jm-insns.c: Use proper integer types.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11401 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 482d35c0fad2f5452db44154f3740838f49e4c76 |
|
14-Sep-2010 |
bart <bart@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
PowerPC, Altivec: avoid using typedefs in combination with the vector keyword.
Patch by Maynard Johnson (see also #247526).
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11358 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 0e342a0c84f17f2e5ca3e244db36dba074fdd5d0 |
|
04-Sep-2010 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Add tests for new PowerISA_2.05 instructions available on Power6 CPUs.
(Maynard Johnson, maynardj@us.ibm.com and Pete Eberlein, eberlein@us.ibm.com)
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11338 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| f9fe602a426e4ec8e8ca18f0005af7319a566858 |
|
03-Sep-2010 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Followup to r11333: rename HAVE_ALTIVEC back to HAS_ALTIVEC, since the
symbol is used in more places than those addressed by r11333.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11335 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 6467a15a56f58e1007dc9cf26bee3de17606417b |
|
03-Sep-2010 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Un-break feature detection for Altivec, so that the Altivec tests
get built properly.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11333 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 83b62cbbab29bde83eba40231f307c2a311e73c8 |
|
15-Apr-2009 |
njn <njn@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Merge r9533..9536 (add tests/{asm.h,sys_mman.h,malloc.h} from the DARWIN
branch.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@9537 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| c8741428225d78e61dc5315515f92f0faa666440 |
|
25-May-2008 |
bart <bart@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
#define HAS_ALTIVEC is now fetched from config.h instead of from Makefile.am.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@8128 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 0b21412e4daca69e48895a713111fe906133cd53 |
|
27-Dec-2006 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Test lvxl and stvxl.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@6447 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| e1494c6807bd1744d615ce52d97599168eddb2ed |
|
16-Dec-2006 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
64-bit followup to r6404: fix and simplify the inline assembly, so it
works right when compiled by gcc-4.1.0. Also add a new flag, -A, to
test all available instructions.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@6405 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 5f2d97bcb4eddb73852d231e3940dee16f09e8c4 |
|
16-Dec-2006 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Fix and simplify the inline assembly, so it works right when compiled
by gcc-4.1.0.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@6404 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| b5b6311a5312378c0129587d0dc0b255188a1d53 |
|
24-Jan-2006 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Don't build the Altivec constant tables unless Altivec instruction
tests have been requested.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5592 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 7c01859c190613f313f57fc4b1c6bb14124b00c7 |
|
19-Jan-2006 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
- Make this work on systems where the stack is non executable:
put the to-be-modified insns in an mmap'd page
- Clarify init_function a bit (does not change what it does)
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5567 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| a2a583876ee4197d0284960aeb594dc75bce2f09 |
|
03-Jan-2006 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Update ppc32 jm-insns regtest to test ppc64 insns, if built with -m64.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5487 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| b8efd2a1d18b2e2293527db3c8262f196008ffbe |
|
03-Jan-2006 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
regtest none::ppc32
- More cleanup
- Fixed rlwimi test - init r_dst to zero.
- Fixed load/store tests - print change in updated base reg, not actual value.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5486 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 52675269f43c06380b04bf502c509cca4ee643b6 |
|
24-Dec-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Tidy up ppc32 jm-insns test some more.
In particular, hide the function pointer setup stuff, for the test loops, in init_function()
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5428 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 8a43f81f6e42d3407ae9649a5b5c9ff801abdbe0 |
|
23-Dec-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Tidied up jm-insns.c test a little.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5417 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 586fb038935723146cb6950b38911aeb9fc12765 |
|
14-Dec-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Added fp regtest
- needed some hackery to get around VEX's loss of accuracy.
------------------------------
Added test for fsqrt (fp square root)
Enabled stfs(u)(x) (fp single-precision stores)
- VEX implementation not great: ends up rounding twice, losing
accuracy, but is good enough for this test's small fp argument array.
Changed fp arg setup
- no denormals (for VEX inaccuracy)
All fp tests
- don't print CR, XER flags, as VEX doesn't set them.
3 arg fp arith tests (fp 'multiply and add' etc)
- no 'special' fp vals (for VEX inaccuracy)
- zap lo byte (for VEX inaccuracy)
fctiw, fctiwz (fp convert to int)
- zap high 32bits of result (is undefined)
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5344 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| 57c3e5d80627eb327f15e059f85ecef735159ab5 |
|
14-Dec-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Changed jm_insns.c usage to use one of flags 'i|f|a' to run int|fp|av insns respectively.
Removed integer test insns for jm-vmx.vgtest - already tested in jm-int.vgtest
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5343 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| cfe949112586ed0423a6064ae91ad3046f282869 |
|
02-Dec-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Added explanation of insn patching used in ppc32 test jm-insns.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5272 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| c08c8c576fc16d32e6e572927d06b6dfae476e4d |
|
02-Dec-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Added tests for ppc32 floating point load/stores
- not yet set to run in automated test.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5267 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
|
| f811097dbc6be6e2f38b314ea8b41932e82dcbde |
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29-Nov-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Stop gcc4 complaints re ppc32 test - Moved all declarations in front of statements.
Based on patch from Yao Qi <qiyaoltc@cn.ibm.com>.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5247 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| 664c85989cc01a6885489b299d849eecab53abbe |
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19-Nov-2005 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Don't test division by zero; 7400 doesn't do what 970/7447 do.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5214 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| fdeaa95698883fa09d0abefa4511cfab6466e316 |
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19-Nov-2005 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Another m{t,f}{xer,lr,ctr} simplification.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5212 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| 941051f9c5677a9ab62f9ccf82a124cbc0bbb5ba |
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19-Nov-2005 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Test m{t,f}{xer,lr,ctr} in a simpler way.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5211 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| e70e7c28cdbc784bc1d2eec15513fd56af0f780d |
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19-Nov-2005 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
If we're doing an estimation operation, arrange to zap the bottom byte
of the result as it's basically garbage, and differs between cpus.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5210 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| 81aab3c751b11fcfa6629b449c92bd7e3f459567 |
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19-Nov-2005 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Fix up the test program so it behaves the same on different CPUs (when run
natively):
- register_vfarg: stuff bits directly into vector, don't go via float
as that screws up NaNs somehow on MPC7447
- test_av_int_ld_two_regs: lve{b,h,w}x: mask off bits of the result
register which are undefined after the load
- test_av_int_st_three_regs: fix result vector size
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5208 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| 57778621b9d85c82fcb5185ba146add1715c5432 |
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19-Nov-2005 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Fix this so that it compiles with gcc4 by writing the test fns
completely in assembly (for those that require literals to be
changed).
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5207 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| 1b6b2b3e62549edc02744bbc149c74bcc043835e |
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18-Nov-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Changed altivec floating point setup to Java/IEEE mode
- Non-Java mode is the system default, but was causing some accuracy problems by rounding off intermediate denormalised results to zero.
We now have some small errors (lowest bit only) due to using greater accuracy than the system default, but is better overall.
Also expanded dispatcher check of FPSCR to include all contol bits
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5196 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| 8f5fc19da719edcd8dfca920837bde7ce1d3acca |
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16-Nov-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Added tests for latest altivec fp insns
Fixed fp nan argument values
Fixed setting of non-java bit in VSCR to be on for all cases.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5151 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| 05cf1ebf06561a8b59adae508e7c4bf6c028ee5b |
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14-Nov-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Added tests for altivec load/stores
Enabled altivec float tests
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5122 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| b3eb91bab95bd2d521848510e0b59b4daa49fe73 |
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14-Nov-2005 |
cerion <cerion@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
comment out altivec tests for unsupported insns
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5120 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| 530f73578552bc876a51fbf90cb6be29769bb362 |
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11-Nov-2005 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Stop gcc4 complaining about pointer signedness mismatches.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5085 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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| a29a9081631d4af1d07e5e66cdfc870e971f998f |
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10-Nov-2005 |
sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> |
Add instruction-set tests for ppc32 (integer, FP, altivec).
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5075 a5019735-40e9-0310-863c-91ae7b9d1cf9
/external/valgrind/none/tests/ppc32/jm-insns.c
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