| fb8e3dfec6597f1859df1bda4f89e7104b353702 |
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03-Nov-2016 |
Martyn Capewell <martyn.capewell@arm.com> |
Fix remaining AArch64 UBSan errors.
Change-Id: I51e830076b5978aaf3920c1be1e406964ff20c46
/external/vixl/src/aarch64/instructions-aarch64.h
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| b953ea8255b36e27834f17941429cd17af12f6f2 |
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20-Oct-2016 |
Martyn Capewell <martyn.capewell@arm.com> |
Fix simulation of NEON min/maxp and tbl
The simulation of [su](min|max)p, tbl and tbx was broken when source and
destination registers aliased. Fix these and add regression tests.
Change-Id: I3945e520df7a1f9453595c9941bdfbb3447ae581
/external/vixl/src/aarch64/instructions-aarch64.h
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| 491a575777fe21edc15bedd877a288a7f042bf48 |
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18-Oct-2016 |
Martyn Capewell <martyn.capewell@arm.com> |
Fix NEON 'across' instruction simulation
The simulation of NEON instructions that operate across a vector, eg. uminv,
was incorrectly clearing its destination register, which was a problem when
source and destination registers aliased.
Fix the simulation and improve the tests to check instances of aliased
registers.
Change-Id: I65717c472e5bfc85258952002b571597d554270d
/external/vixl/src/aarch64/instructions-aarch64.h
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| b49bdb7996e603555eba4c8b56c7325e3e737ab6 |
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26-Sep-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Improve include directives in `src/aarch64`.
Some `aarch64` files had include directives such as:
#include "globals-vixl.h"
#include "aarch64/other-aarch64.h"
This required users of VIXL to compile with `-I<path/to/vixl/src>`.
Change-Id: Ie0d1d39d1d8eb4a0e6b4b96af95a352b16043003
/external/vixl/src/aarch64/instructions-aarch64.h
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| d3832965c62a8ad461b9ea9eb0994ca6b0a3da2c |
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04-Jul-2016 |
Alexandre Rames <alexandre.rames@linaro.org> |
Update naming to `aarch32` and `aarch64`.
Change-Id: I40a929b1095ee3e1b2ca5ef879c7006d8b59acc9
/external/vixl/src/aarch64/instructions-aarch64.h
|