Searched defs:DL (Results 101 - 125 of 412) sorted by relevance

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/external/llvm/lib/Analysis/
H A DAliasAnalysisEvaluator.cpp97 const DataLayout &DL = F.getParent()->getDataLayout(); local
147 if (I1ElTy->isSized()) I1Size = DL.getTypeStoreSize(I1ElTy);
152 if (I2ElTy->isSized()) I2Size = DL.getTypeStoreSize(I2ElTy);
244 if (ElTy->isSized()) Size = DL.getTypeStoreSize(ElTy);
H A DIVUsers.cpp120 const DataLayout &DL = I->getModule()->getDataLayout(); local
140 if (Width > 64 || !DL.isLegalInteger(Width))
H A DTargetLibraryInfo.cpp492 const DataLayout *DL) const {
495 Type *SizeTTy = DL ? DL->getIntPtrType(Ctx, /*AS=*/0) : nullptr;
996 const DataLayout *DL = local
999 isValidProtoForLibFunc(*FDecl.getFunctionType(), F, DL);
/external/llvm/lib/CodeGen/
H A DLexicalScopes.cpp109 LexicalScope *LexicalScopes::findLexicalScope(const DILocation *DL) { argument
110 DILocalScope *Scope = DL->getScope();
118 if (auto *IA = DL->getInlinedAt()) {
271 const DILocation *DL, SmallPtrSetImpl<const MachineBasicBlock *> &MBBs) {
273 LexicalScope *Scope = getOrCreateLexicalScope(DL);
294 bool LexicalScopes::dominates(const DILocation *DL, MachineBasicBlock *MBB) { argument
295 LexicalScope *Scope = getOrCreateLexicalScope(DL);
270 getMachineBasicBlocks( const DILocation *DL, SmallPtrSetImpl<const MachineBasicBlock *> &MBBs) argument
H A DStackMaps.cpp97 auto &DL = AP.MF->getDataLayout(); local
99 unsigned Size = DL.getPointerSizeInBits();
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSDNodeDbgValue.h49 DebugLoc DL; member in class:llvm::SDDbgValue
59 : Var(Var), Expr(Expr), Offset(off), DL(std::move(dl)), Order(O),
69 : Var(Var), Expr(Expr), Offset(off), DL(std::move(dl)), Order(O),
78 : Var(Var), Expr(Expr), Offset(off), DL(std::move(dl)), Order(O),
112 DebugLoc getDebugLoc() const { return DL; }
/external/llvm/lib/IR/
H A DDataLayout.cpp40 StructLayout::StructLayout(StructType *ST, const DataLayout &DL) { argument
50 unsigned TyAlign = ST->isPacked() ? 1 : DL.getABITypeAlignment(Ty);
62 StructSize += DL.getTypeAllocSize(Ty); // Consume space for this data item
/external/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.cpp329 DebugLoc DL; // Defaults to "unknown" local
331 DL = Ins->getDebugLoc();
340 BuildMI(*MBB, Ins, DL, MCID, BaseReg)
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.cpp42 const DataLayout &DL = BB->getModule()->getDataLayout(); local
50 dyn_cast<AllocaInst>(GetUnderlyingObject(Ptr, DL));
115 EVT OrigTy = TLI->getValueType(DL, Ty);
122 std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, Ty);
H A DR600InstrInfo.cpp44 const DebugLoc &DL, unsigned DestReg,
773 const DebugLoc &DL) const {
778 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(TBB);
786 BuildMI(&MBB, DL, get(AMDGPU::JUMP_COND))
801 BuildMI(&MBB, DL, get(AMDGPU::JUMP_COND))
804 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(FBB);
42 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument
H A DR600OptimizeVectorRegisters.cpp185 DebugLoc DL = Pos->getDebugLoc(); local
197 MachineInstr *Tmp = BuildMI(MBB, Pos, DL, TII->get(AMDGPU::INSERT_SUBREG),
215 BuildMI(MBB, Pos, DL, TII->get(AMDGPU::COPY), Reg).addReg(SrcVec);
H A DSIFrameLowering.cpp97 DebugLoc DL; local
107 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::FLAT_SCR_LO)
114 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADD_U32), FlatScrInitLo)
119 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_LSHR_B32), AMDGPU::FLAT_SCR_HI)
212 DebugLoc DL; local
217 BuildMI(MBB, I, DL, SMovB32, ScratchWaveOffsetReg)
235 BuildMI(MBB, I, DL, SMovB64, Rsrc01)
237 BuildMI(MBB, I, DL, SMovB64, Rsrc23)
247 BuildMI(MBB, I, DL, SMovB32, Rsrc0)
251 BuildMI(MBB, I, DL, SMovB3
308 DebugLoc DL; local
[all...]
/external/llvm/lib/Target/ARM/
H A DThumb2InstrInfo.cpp114 const DebugLoc &DL, unsigned DestReg,
118 return ARMBaseInstrInfo::copyPhysReg(MBB, I, DL, DestReg, SrcReg, KillSrc);
120 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
129 DebugLoc DL; local
130 if (I != MBB.end()) DL = I->getDebugLoc();
141 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2STRi12))
156 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2STRDi8));
177 DebugLoc DL; local
178 if (I != MBB.end()) DL = I->getDebugLoc();
183 AddDefaultPred(BuildMI(MBB, I, DL, ge
112 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument
[all...]
/external/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp43 const DebugLoc &DL, unsigned DestReg,
59 BuildMI(MBB, MI, DL, get(Opc), DestReg)
109 DebugLoc DL; local
111 DL = MI->getDebugLoc();
130 BuildMI(MBB, MI, DL, get(Opcode))
142 DebugLoc DL; local
144 DL = MI->getDebugLoc();
166 BuildMI(MBB, MI, DL, get(Opcode), DestReg)
380 const DebugLoc &DL) const {
388 BuildMI(&MBB, DL, ge
41 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument
[all...]
/external/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp199 const DebugLoc &DL = MI.getDebugLoc(); local
200 BuildMI(MB, II, DL, HII.get(Hexagon::A2_addi), TmpR)
/external/llvm/lib/Target/Mips/
H A DMips16ISelDAGToDAG.cpp46 Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, const SDLoc &DL, EVT Ty, argument
49 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0),
55 Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag);
60 Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag);
75 DebugLoc DL; local
83 BuildMI(MBB, I, DL, TII.get(Mips::GotPrologue16), V0)
88 BuildMI(MBB, I, DL, TII.get(Mips::SllX16), V2).addReg(V0).addImm(16);
89 BuildMI(MBB, I, DL, TII.get(Mips::AdduRxRyRz16), GlobalBaseReg)
100 SDLoc DL(Addr);
107 Offset = CurDAG->getTargetConstant(0, DL, ValT
[all...]
H A DMipsInstrInfo.cpp53 DebugLoc DL; local
54 BuildMI(MBB, MI, DL, get(Mips::NOP));
98 const DebugLoc &DL,
102 MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID);
119 const DebugLoc &DL) const {
133 BuildCondBr(MBB, TBB, DL, Cond);
134 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(FBB);
141 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(TBB);
143 BuildCondBr(MBB, TBB, DL, Cond);
97 BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, const DebugLoc &DL, ArrayRef<MachineOperand> Cond) const argument
H A DMipsLongBranch.cpp84 void replaceBranch(MachineBasicBlock &MBB, Iter Br, const DebugLoc &DL,
218 const DebugLoc &DL,
225 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc);
258 DebugLoc DL = I.Br->getDebugLoc(); local
298 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
300 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)).addReg(Mips::RA)
319 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT)
322 .append(BuildMI(*MF, DL, TII->get(BalOp)).addMBB(BalTgtMBB))
323 .append(BuildMI(*MF, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT)
330 BuildMI(*BalTgtMBB, Pos, DL, TI
217 replaceBranch(MachineBasicBlock &MBB, Iter Br, const DebugLoc &DL, MachineBasicBlock *MBBOpnd) argument
453 DebugLoc DL = MBB.findDebugLoc(MBB.begin()); local
[all...]
/external/llvm/lib/Target/NVPTX/
H A DNVPTXLowerAggrCopies.cpp245 const DataLayout &DL = F.getParent()->getDataLayout(); local
256 if (DL.getTypeStoreSize(LI->getType()) < MaxAggrCopySize)
289 unsigned NumLoads = DL.getTypeStoreSize(LI->getType());
/external/llvm/lib/Target/Sparc/
H A DLeonPasses.cpp81 DebugLoc DL = DebugLoc(); local
91 BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP));
99 BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP));
131 DebugLoc DL = DebugLoc(); local
194 BuildMI(MBB, MBBI, DL, TII.get(SP::FSTOD))
199 BuildMI(MBB, MBBI, DL, TII.get(SP::FSTOD))
204 BuildMI(MBB, MBBI, DL, TII.get(SP::FMULD))
244 DebugLoc DL = DebugLoc(); local
305 BuildMI(MBB, MBBI, DL, TII.get(SP::FSTOD))
310 BuildMI(MBB, MBBI, DL, TI
357 DebugLoc DL = DebugLoc(); local
514 DebugLoc DL = DebugLoc(); local
643 DebugLoc DL = DebugLoc(); local
756 DebugLoc DL = DebugLoc(); local
826 DebugLoc DL = DebugLoc(); local
[all...]
/external/llvm/lib/Target/SystemZ/
H A DSystemZLongBranch.cpp353 DebugLoc DL = MI->getDebugLoc(); local
354 BuildMI(*MBB, MI, DL, TII->get(AddOpcode))
358 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL))
372 DebugLoc DL = MI->getDebugLoc(); local
373 BuildMI(*MBB, MI, DL, TII->get(CompareOpcode))
376 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL))
H A DSystemZSelectionDAGInfo.cpp26 static SDValue emitMemMem(SelectionDAG &DAG, const SDLoc &DL, unsigned Sequence, argument
42 return DAG.getNode(Loop, DL, MVT::Other, Chain, Dst, Src,
43 DAG.getConstant(Size, DL, PtrVT),
44 DAG.getConstant(Size / 256, DL, PtrVT));
45 return DAG.getNode(Sequence, DL, MVT::Other, Chain, Dst, Src,
46 DAG.getConstant(Size, DL, PtrVT));
50 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src,
57 return emitMemMem(DAG, DL, SystemZISD::MVC, SystemZISD::MVC_LOOP,
65 static SDValue memsetStore(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, argument
71 return DAG.getStore(Chain, DL,
49 EmitTargetCodeForMemcpy( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool IsVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
77 EmitTargetCodeForMemset( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Byte, SDValue Size, unsigned Align, bool IsVolatile, MachinePointerInfo DstPtrInfo) const argument
149 emitCLC(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, SDValue Src2, uint64_t Size) argument
173 addIPMSequence(const SDLoc &DL, SDValue Glue, SelectionDAG &DAG) argument
183 EmitTargetCodeForMemcmp( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
197 EmitTargetCodeForMemchr( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue Char, SDValue Length, MachinePointerInfo SrcPtrInfo) const argument
224 EmitTargetCodeForStrcpy( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest, SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo, bool isStpcpy) const argument
234 EmitTargetCodeForStrcmp( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, SDValue Src2, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
251 getBoundedStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue Limit) argument
264 EmitTargetCodeForStrlen( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, MachinePointerInfo SrcPtrInfo) const argument
271 EmitTargetCodeForStrnlen( SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue MaxLength, MachinePointerInfo SrcPtrInfo) const argument
[all...]
/external/llvm/lib/Target/
H A DTarget.cpp52 void LLVMSetModuleDataLayout(LLVMModuleRef M, LLVMTargetDataRef DL) { argument
53 unwrap(M)->setDataLayout(*unwrap(DL));
H A DTargetLoweringObjectFile.cpp274 const DataLayout &DL, SectionKind Kind, const Constant *C,
273 getSectionForConstant( const DataLayout &DL, SectionKind Kind, const Constant *C, unsigned &Align) const argument
/external/llvm/lib/Target/X86/
H A DX86AsmPrinter.cpp560 const DataLayout &DL = MF->getDataLayout(); local
561 SectionKind Kind = CPE.getSectionKind(&DL);
565 getObjFileLowering().getSectionForConstant(DL, Kind, C, Align))) {

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