/external/llvm/lib/Target/X86/ |
H A D | X86CallFrameOptimization.cpp | 460 DebugLoc DL = FrameSetup->getDebugLoc(); local 485 Push = BuildMI(MBB, Context.Call, DL, TII->get(PushOpcode)) 497 BuildMI(MBB, Context.Call, DL, TII->get(X86::IMPLICIT_DEF), UndefReg); 498 BuildMI(MBB, Context.Call, DL, TII->get(X86::INSERT_SUBREG), Reg) 513 Push = BuildMI(MBB, Context.Call, DL, TII->get(PushOpcode)); 522 Push = BuildMI(MBB, Context.Call, DL, TII->get(PushOpcode)) 534 MBB, std::next(Push), DL,
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H A D | X86ExpandPseudo.cpp | 75 DebugLoc DL = MBBI->getDebugLoc(); local 112 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); 125 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); 129 BuildMI(MBB, MBBI, DL, 133 BuildMI(MBB, MBBI, DL, TII->get(X86::TAILJMPr)) 152 BuildMI(MBB, MBBI, DL, 163 BuildMI(MBB, MBBI, DL, 173 MIB = BuildMI(MBB, MBBI, DL, 176 MIB = BuildMI(MBB, MBBI, DL, 184 BuildMI(MBB, MBBI, DL, TI [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreAsmPrinter.cpp | 117 const DataLayout &DL = getDataLayout(); local 123 unsigned Align = (unsigned)DL.getPreferredTypeAlignmentShift(C->getType()); 156 unsigned Size = DL.getTypeAllocSize(C->getType()); 164 EmitGlobalConstant(DL, C); 210 const DataLayout &DL = getDataLayout(); local 226 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
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H A D | XCoreInstrInfo.cpp | 276 const DebugLoc &DL) const { 285 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(TBB); 289 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) 298 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) 300 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(FBB); 330 const DebugLoc &DL, unsigned DestReg, 336 BuildMI(MBB, I, DL, get(XCore::ADD_2rus), DestReg) 343 BuildMI(MBB, I, DL, get(XCore::LDAWSP_ru6), DestReg).addImm(0); 348 BuildMI(MBB, I, DL, get(XCore::SETSP_1r)) 362 DebugLoc DL; local 328 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 384 DebugLoc DL; local [all...] |
/external/llvm/lib/Transforms/Scalar/ |
H A D | CorrelatedValuePropagation.cpp | 149 const DataLayout &DL = BB->getModule()->getDataLayout(); local 150 if (Value *V = SimplifyInstruction(P, DL)) {
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H A D | LoadCombine.cpp | 96 auto &DL = LI.getModule()->getDataLayout(); local 100 unsigned BitWidth = DL.getPointerSizeInBits(LI.getPointerAddressSpace()); 106 if (!GEP->accumulateConstantOffset(DL, POP.Offset)) {
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H A D | LoopDataPrefetch.cpp | 118 const DataLayout *DL; member in class:__anon13362::LoopDataPrefetch 156 DL = &F.getParent()->getDataLayout();
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H A D | NaryReassociate.cpp | 106 DL = &M.getDataLayout(); 177 const DataLayout *DL; member in class:__anon13398::NaryReassociate 330 DL->getPointerSizeInBits(GEP->getType()->getPointerAddressSpace()); 342 if (isKnownNonNegative(ZExt->getOperand(0), *DL, 0, AC, GEP, DT)) 351 computeOverflowForSignedAdd(AO, *DL, AC, GEP, DT) != 379 if (isKnownNonNegative(LHS, *DL, 0, AC, GEP, DT) && 380 DL->getTypeSizeInBits(LHS->getType()) < 381 DL->getTypeSizeInBits(GEP->getOperand(I)->getType())) { 405 uint64_t IndexedSize = DL->getTypeAllocSize(IndexedType); 407 uint64_t ElementSize = DL [all...] |
/external/llvm/lib/Transforms/Utils/ |
H A D | SymbolRewriter.cpp | 232 RewriteDescriptorList *DL) { 240 if (!parse(*Mapping, DL)) 247 RewriteDescriptorList *DL) { 265 if (!parseEntry(YS, Descriptor, DL)) 273 RewriteDescriptorList *DL) { 293 return parseRewriteFunctionDescriptor(YS, Key, Value, DL); 295 return parseRewriteGlobalVariableDescriptor(YS, Key, Value, DL); 297 return parseRewriteGlobalAliasDescriptor(YS, Key, Value, DL); 306 RewriteDescriptorList *DL) { 364 DL 231 parse(const std::string &MapFile, RewriteDescriptorList *DL) argument 246 parse(std::unique_ptr<MemoryBuffer> &MapFile, RewriteDescriptorList *DL) argument 272 parseEntry(yaml::Stream &YS, yaml::KeyValueNode &Entry, RewriteDescriptorList *DL) argument 304 parseRewriteFunctionDescriptor(yaml::Stream &YS, yaml::ScalarNode *K, yaml::MappingNode *Descriptor, RewriteDescriptorList *DL) argument 372 parseRewriteGlobalVariableDescriptor(yaml::Stream &YS, yaml::ScalarNode *K, yaml::MappingNode *Descriptor, RewriteDescriptorList *DL) argument 434 parseRewriteGlobalAliasDescriptor(yaml::Stream &YS, yaml::ScalarNode *K, yaml::MappingNode *Descriptor, RewriteDescriptorList *DL) argument 517 RewriteSymbols(SymbolRewriter::RewriteDescriptorList &DL) argument 547 createRewriteSymbolsPass(SymbolRewriter::RewriteDescriptorList &DL) argument [all...] |
/external/llvm/unittests/IR/ |
H A D | IRBuilderTest.cpp | 124 DataLayout* DL = new DataLayout(M.get()); local 125 IntegerType *IntPtrTy = Builder.getIntPtrTy(*DL); 126 unsigned IntPtrBitSize = DL->getPointerSizeInBits(0); 128 delete DL;
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/external/llvm/unittests/Transforms/Utils/ |
H A D | MemorySSA.cpp | 34 DataLayout DL; member in class:MemorySSATest 50 BAA(Test.DL, Test.TLI, AC, &DT), MSSA(*Test.F, &AA, &DT) { 65 : M("MemorySSATest", C), B(C), DL(DLString), TLI(TLII), F(nullptr) {}
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 53 DebugLoc DL, SelectionDAG &DAG, 70 DebugLoc DL, SelectionDAG &DAG) const 72 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain); 105 DebugLoc DL = Op.getDebugLoc(); local 113 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1)); 115 return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1)); 119 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1)); 121 return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1), 124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1), 127 return DAG.getNode(AMDGPUISD::SMAX, DL, V 48 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 64 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, DebugLoc DL, SelectionDAG &DAG) const argument 153 DebugLoc DL = Op.getDebugLoc(); local 166 DebugLoc DL = Op.getDebugLoc(); local 183 DebugLoc DL = Op.getDebugLoc(); local [all...] |
H A D | R600ISelLowering.cpp | 278 DebugLoc DL = Op.getDebugLoc(); local 288 return LowerImplicitParameter(DAG, VT, DL, 0); 290 return LowerImplicitParameter(DAG, VT, DL, 1); 292 return LowerImplicitParameter(DAG, VT, DL, 2); 294 return LowerImplicitParameter(DAG, VT, DL, 3); 296 return LowerImplicitParameter(DAG, VT, DL, 4); 298 return LowerImplicitParameter(DAG, VT, DL, 5); 300 return LowerImplicitParameter(DAG, VT, DL, 6); 302 return LowerImplicitParameter(DAG, VT, DL, 7); 304 return LowerImplicitParameter(DAG, VT, DL, 357 LowerImplicitParameter(SelectionDAG &DAG, EVT VT, DebugLoc DL, unsigned DwordOffset) const argument 376 DebugLoc DL = Op.getDebugLoc(); local 389 DebugLoc DL = Op.getDebugLoc(); local 505 DebugLoc DL = Op.getDebugLoc(); local [all...] |
H A D | SIISelLowering.cpp | 297 DebugLoc DL = Op.getDebugLoc(); local 299 SDValue OpNode = DAG.getNode(VCCNode, DL, MVT::i64, 300 DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i64, 302 DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i64, 305 return DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i1, OpNode); 382 DebugLoc DL = Op.getDebugLoc(); local 384 SDValue Cond = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, CC); 385 return DAG.getNode(ISD::SELECT, DL, VT, Cond, True, False); 395 DebugLoc DL = N->getDebugLoc(); local 409 return DAG.getNode(ISD::SETCC, DL, V [all...] |
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
H A D | GCMetadata.h | 65 GCPoint(GC::PointKind K, MCSymbol *L, DebugLoc DL) argument 66 : Kind(K), Label(L), Loc(DL) {} 127 void addSafePoint(GC::PointKind Kind, MCSymbol *Label, DebugLoc DL) { argument 128 SafePoints.push_back(GCPoint(Kind, Label, DL));
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H A D | LexicalScopes.h | 71 void getMachineBasicBlocks(DebugLoc DL, 76 bool dominates(DebugLoc DL, MachineBasicBlock *MBB); 80 LexicalScope *findLexicalScope(DebugLoc DL); 94 LexicalScope *findInlinedScope(DebugLoc DL) { argument 95 return InlinedLexicalScopeMap.lookup(DL); 110 LexicalScope *getOrCreateLexicalScope(DebugLoc DL);
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H A D | MachineCodeEmitter.h | 248 virtual void processDebugLoc(DebugLoc DL, bool BeforePrintintInsn) {} argument
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H A D | MachineInstrBuilder.h | 182 DebugLoc DL, 184 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL)); 191 DebugLoc DL, 194 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL)) 204 DebugLoc DL, 207 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); 218 DebugLoc DL, 220 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); 230 DebugLoc DL, 232 return BuildMI(*BB, BB->end(), DL, MCI 181 BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID) argument 190 BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID, unsigned DestReg) argument 202 BuildMI(MachineBasicBlock &BB, MachineBasicBlock::iterator I, DebugLoc DL, const MCInstrDesc &MCID, unsigned DestReg) argument 216 BuildMI(MachineBasicBlock &BB, MachineBasicBlock::iterator I, DebugLoc DL, const MCInstrDesc &MCID) argument 229 BuildMI(MachineBasicBlock *BB, DebugLoc DL, const MCInstrDesc &MCID) argument 239 BuildMI(MachineBasicBlock *BB, DebugLoc DL, const MCInstrDesc &MCID, unsigned DestReg) argument [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | LexicalScopes.cpp | 116 LexicalScope *LexicalScopes::findLexicalScope(DebugLoc DL) { argument 119 DL.getScopeAndInlinedAt(Scope, IA, MF->getFunction()->getContext()); 135 LexicalScope *LexicalScopes::getOrCreateLexicalScope(DebugLoc DL) { argument 138 DL.getScopeAndInlinedAt(Scope, InlinedAt, MF->getFunction()->getContext()); 268 getMachineBasicBlocks(DebugLoc DL, argument 271 LexicalScope *Scope = getOrCreateLexicalScope(DL); 292 bool LexicalScopes::dominates(DebugLoc DL, MachineBasicBlock *MBB) { argument 293 LexicalScope *Scope = getOrCreateLexicalScope(DL);
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 269 DebugLoc DL = Op.getDebugLoc(); local 287 Op1 = DAG.getNode(ISD::BITCAST, DL, VT, Op1); 288 Op2 = DAG.getNode(ISD::BITCAST, DL, VT, Op2); 292 SDValue NotMask = DAG.getNode(ISD::XOR, DL, VT, Mask, AllOnes); 294 Op1 = DAG.getNode(ISD::AND, DL, VT, Op1, Mask); 295 Op2 = DAG.getNode(ISD::AND, DL, VT, Op2, NotMask); 296 return DAG.getNode(ISD::OR, DL, VT, Op1, Op2); 301 DebugLoc DL = Op.getDebugLoc(); local 325 SDValue HI = DAG.getNode(ISD::SRL, DL, VT, Op.getOperand(0), HalfWord); 326 SDValue LO = DAG.getNode(ISD::AND, DL, V [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | Thumb1FrameLowering.cpp | 296 DebugLoc DL; 300 if (MI != MBB.end()) DL = MI->getDebugLoc(); 302 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH)); 340 DebugLoc DL = MI->getDebugLoc(); local 341 MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP));
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
H A D | SPUInstrInfo.cpp | 125 MachineBasicBlock::iterator I, DebugLoc DL, 134 BuildMI(MBB, I, DL, get(SPU::LRr128), DestReg) 167 DebugLoc DL; local 168 if (MI != MBB.end()) DL = MI->getDebugLoc(); 169 addFrameReference(BuildMI(MBB, MI, DL, get(opc)) 202 DebugLoc DL; local 203 if (MI != MBB.end()) DL = MI->getDebugLoc(); 204 addFrameReference(BuildMI(MBB, MI, DL, get(opc), DestReg), FrameIdx); 354 DebugLoc DL) const { 368 MIB = BuildMI(&MBB, DL, ge 124 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
H A D | MBlazeFrameLowering.cpp | 349 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); local 367 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADDIK), MBlaze::R1) 372 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI)) 378 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI)) 382 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADD), MBlaze::R19)
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
H A D | MipsFrameLowering.cpp | 122 DebugLoc DL = I->getDebugLoc(); local 128 BuildMI(MBB, I, DL, TII->get(Mips::NOAT)); 129 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::AT).addImm(ImmHi); 130 BuildMI(MBB, I, DL, TII->get(Mips::ADDu), Mips::AT).addReg(OrigReg)
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H A D | MipsInstrInfo.cpp | 97 DebugLoc DL; local 98 BuildMI(MBB, MI, DL, get(Mips::NOP)); 103 MachineBasicBlock::iterator I, DebugLoc DL, 153 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc)); 170 DebugLoc DL; local 171 if (I != MBB.end()) DL = I->getDebugLoc(); 186 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)) 196 DebugLoc DL; local 197 if (I != MBB.end()) DL = I->getDebugLoc(); 212 BuildMI(MBB, I, DL, ge 102 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 355 BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, DebugLoc DL, const SmallVectorImpl<MachineOperand>& Cond) const argument [all...] |