/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXPrologEpilogPass.cpp | 83 AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx, argument 88 Offset += MFI->getObjectSize(FrameIdx); 90 unsigned Align = MFI->getObjectAlignment(FrameIdx); 100 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n"); 101 MFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset 103 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n"); 104 MFI->setObjectOffset(FrameIdx, Offset); 105 Offset += MFI->getObjectSize(FrameIdx);
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430FrameLowering.cpp | 296 int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4, true); local 297 (void)FrameIdx; 298 assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() &&
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H A D | MSP430InstrInfo.cpp | 39 unsigned SrcReg, bool isKill, int FrameIdx, 48 MachinePointerInfo::getFixedStack(MF, FrameIdx), 49 MachineMemOperand::MOStore, MFI.getObjectSize(FrameIdx), 50 MFI.getObjectAlignment(FrameIdx)); 54 .addFrameIndex(FrameIdx).addImm(0) 58 .addFrameIndex(FrameIdx).addImm(0) 66 unsigned DestReg, int FrameIdx, 75 MachinePointerInfo::getFixedStack(MF, FrameIdx), 76 MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIdx), 77 MFI.getObjectAlignment(FrameIdx)); 37 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 64 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
H A D | AlphaInstrInfo.cpp | 145 unsigned SrcReg, bool isKill, int FrameIdx, 149 // << FrameIdx << "\n"; 158 .addFrameIndex(FrameIdx).addReg(Alpha::F31); 162 .addFrameIndex(FrameIdx).addReg(Alpha::F31); 166 .addFrameIndex(FrameIdx).addReg(Alpha::F31); 174 unsigned DestReg, int FrameIdx, 178 // << FrameIdx << "\n"; 184 .addFrameIndex(FrameIdx).addReg(Alpha::F31); 187 .addFrameIndex(FrameIdx).addReg(Alpha::F31); 190 .addFrameIndex(FrameIdx) 143 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 172 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.cpp | 37 unsigned SrcReg, bool isKill, int FrameIdx, 47 MachinePointerInfo(PseudoSourceValue::getFixedStack(FrameIdx)), 49 MFI.getObjectSize(FrameIdx), 50 MFI.getObjectAlignment(FrameIdx)); 54 .addFrameIndex(FrameIdx).addImm(0) 58 .addFrameIndex(FrameIdx).addImm(0) 66 unsigned DestReg, int FrameIdx, 76 MachinePointerInfo(PseudoSourceValue::getFixedStack(FrameIdx)), 78 MFI.getObjectSize(FrameIdx), 79 MFI.getObjectAlignment(FrameIdx)); 35 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 64 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument [all...] |
H A D | MSP430RegisterInfo.cpp | 229 int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4, true); local 230 (void)FrameIdx; 231 assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() &&
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 45 unsigned SrcReg, bool isKill, int FrameIdx, 69 addFrameReference(BuildMI(MBB, MI, DL, get(Opc)), FrameIdx) 75 unsigned DestReg, int FrameIdx, 99 addFrameReference(BuildMI(MBB, MI, DL, get(Opc), DestReg), FrameIdx); local 43 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 73 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
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/external/llvm/lib/CodeGen/ |
H A D | LocalStackSlotAllocation.cpp | 53 int FrameIdx; // The frame index member in class:__anon12562::FrameRef 56 MI(I), LocalOffset(Offset), FrameIdx(Idx) {} 62 int getFrameIndex() const { return FrameIdx; } 70 void AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx, int64_t &Offset, 135 int FrameIdx, int64_t &Offset, 140 Offset += MFI->getObjectSize(FrameIdx); 142 unsigned Align = MFI->getObjectAlignment(FrameIdx); 152 DEBUG(dbgs() << "Allocate FI(" << FrameIdx << ") to local offset " 155 LocalOffsets[FrameIdx] = LocalOffset; 157 MFI->mapLocalFrameObject(FrameIdx, LocalOffse 134 AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx, int64_t &Offset, bool StackGrowsDown, unsigned &MaxAlign) argument 334 int FrameIdx = FR.getFrameIndex(); local [all...] |
H A D | RegAllocFast.cpp | 212 int FrameIdx = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(), local 216 StackSlotForVirtReg[VirtReg] = FrameIdx; 217 return FrameIdx;
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.cpp | 322 /// Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx 326 int FrameIdx, 341 .addFrameIndex(FrameIdx) 324 materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const argument
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H A D | AArch64FrameLowering.cpp | 877 int FrameIdx; member in struct:RegPairInfo 938 RPI.FrameIdx = CSI[i].getFrameIdx(); 944 assert(MFI->getObjectAlignment(RPI.FrameIdx) <= 16); 945 MFI->setObjectAlignment(RPI.FrameIdx, 16); 995 dbgs() << ") -> fi#(" << RPI.FrameIdx; 997 dbgs() << ", " << RPI.FrameIdx+1; 1006 MachinePointerInfo::getFixedStack(MF, RPI.FrameIdx + 1), 1014 MachinePointerInfo::getFixedStack(MF, RPI.FrameIdx), 1056 dbgs() << ") -> fi#(" << RPI.FrameIdx; 1058 dbgs() << ", " << RPI.FrameIdx [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | LocalStackSlotAllocation.cpp | 61 void AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx, int64_t &Offset, 119 int FrameIdx, int64_t &Offset, 124 Offset += MFI->getObjectSize(FrameIdx); 126 unsigned Align = MFI->getObjectAlignment(FrameIdx); 136 DEBUG(dbgs() << "Allocate FI(" << FrameIdx << ") to local offset " 139 LocalOffsets[FrameIdx] = LocalOffset; 141 MFI->mapLocalFrameObject(FrameIdx, LocalOffset); 144 Offset += MFI->getObjectSize(FrameIdx); 287 int FrameIdx = MI->getOperand(idx).getIndex(); local 289 assert(MFI->isObjectPreAllocated(FrameIdx) 118 AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx, int64_t &Offset, bool StackGrowsDown, unsigned &MaxAlign) argument [all...] |
H A D | TargetInstrInfoImpl.cpp | 381 int FrameIdx = 0; local 382 if (TII.isLoadFromStackSlot(MI, FrameIdx) && 383 MF.getFrameInfo()->isImmutableObjectIndex(FrameIdx))
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H A D | PrologEpilogInserter.cpp | 255 int FrameIdx; local 256 if (RegInfo->hasReservedSpillSlot(Fn, Reg, FrameIdx)) { 257 I->setFrameIdx(FrameIdx); 277 FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); 278 if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx; 279 if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx; 282 FrameIdx = MFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset, true); 285 I->setFrameIdx(FrameIdx); 467 AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx, bool StackGrowsDown, int64_t &Offset, unsigned &MaxAlign) argument [all...] |
H A D | RegAllocFast.cpp | 183 int FrameIdx = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(), local 187 StackSlotForVirtReg[VirtReg] = FrameIdx; 188 return FrameIdx;
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H A D | VirtRegRewriter.cpp | 340 int FrameIdx; local 342 (TII->isLoadFromStackSlot(NewInsertLoc, FrameIdx) || 1540 int FrameIdx; 1541 unsigned DestReg = TII->isLoadFromStackSlot(ReloadMI, FrameIdx); 1542 if (DestReg != SrcReg || FrameIdx != SS) 2354 int FrameIdx; 2355 unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx); 2356 if (DestReg && FrameIdx == SS) { 2532 int FrameIdx; 2533 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) { [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
H A D | SPUInstrInfo.cpp | 141 unsigned SrcReg, bool isKill, int FrameIdx, 146 bool isValidFrameIdx = (FrameIdx < SPUFrameLowering::maxFrameOffset()); 170 .addReg(SrcReg, getKillRegState(isKill)), FrameIdx); 176 unsigned DestReg, int FrameIdx, 181 bool isValidFrameIdx = (FrameIdx < SPUFrameLowering::maxFrameOffset()); 204 addFrameReference(BuildMI(MBB, MI, DL, get(opc), DestReg), FrameIdx); local 139 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 174 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 333 int FrameIdx, 342 FrameIdx)); 351 FrameIdx)); 358 FrameIdx)); 367 FrameIdx)); 373 FrameIdx)); 378 FrameIdx)); 386 FrameIdx)); 415 FrameIdx)); 448 return StoreRegToStackSlot(MF, Reg, isKill, FrameIdx, 331 StoreRegToStackSlot(MachineFunction &MF, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, SmallVectorImpl<MachineInstr*> &NewMIs) const argument 471 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 498 LoadRegFromStackSlot(MachineFunction &MF, DebugLoc DL, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, SmallVectorImpl<MachineInstr*> &NewMIs) const argument 596 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 351 int FrameIdx; local 354 FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0, true); 356 FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment(), 359 XFI->setUsesLR(FrameIdx); 360 XFI->setLRSpillSlot(FrameIdx);
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/external/llvm/lib/CodeGen/MIRParser/ |
H A D | MIRParser.cpp | 117 int FrameIdx); 121 int FrameIdx); 555 const yaml::StringValue &RegisterSource, int FrameIdx) { 562 CSIInfo.push_back(CalleeSavedInfo(Reg, FrameIdx)); 582 const yaml::MachineStackObject &Object, int FrameIdx) { 585 assert(FrameIdx >= 0 && "Expected a stack object frame index"); 600 PFS.MF.getMMI().setVariableDbgInfo(DIVar, DIExpr, unsigned(FrameIdx), DILoc); 553 parseCalleeSavedRegister(PerFunctionMIParsingState &PFS, std::vector<CalleeSavedInfo> &CSIInfo, const yaml::StringValue &RegisterSource, int FrameIdx) argument 581 parseStackObjectsDebugInfo(PerFunctionMIParsingState &PFS, const yaml::MachineStackObject &Object, int FrameIdx) argument
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/external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
H A D | PTXInstrInfo.cpp | 302 unsigned SrcReg, bool isKill, int FrameIdx, 310 unsigned DestReg, int FrameIdx, 300 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MII, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 308 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MII, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
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/external/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.cpp | 273 int FrameIdx, 287 .addFrameIndex(FrameIdx); 300 .addFrameIndex(FrameIdx); 271 materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.cpp | 583 /// be a pointer to FrameIdx at the beginning of the basic block. 586 unsigned BaseReg, int FrameIdx, 604 .addFrameIndex(FrameIdx).addImm(Offset); 585 materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 958 int FrameIdx, 971 FrameIdx)); 977 FrameIdx)); 982 FrameIdx)); 987 FrameIdx)); 992 FrameIdx)); 998 FrameIdx)); 1004 FrameIdx)); 1010 FrameIdx)); 1016 FrameIdx)); 956 StoreRegToStackSlot(MachineFunction &MF, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, SmallVectorImpl<MachineInstr*> &NewMIs, bool &NonRI, bool &SpillsVRS) const argument 1058 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 1091 LoadRegFromStackSlot(MachineFunction &MF, const DebugLoc &DL, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, SmallVectorImpl<MachineInstr *> &NewMIs, bool &NonRI, bool &SpillsVRS) const argument 1167 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument [all...] |
H A D | PPCRegisterInfo.cpp | 725 unsigned Reg, int &FrameIdx) const { 729 // For 64-bit, the CR save area is at SP+8; the value of FrameIdx = 0 731 // previously created the stack slot if needed, so return its FrameIdx. 734 FrameIdx = 0; 737 FrameIdx = FI->getCRSpillFrameIndex(); 1003 /// be a pointer to FrameIdx at the beginning of the basic block. 1006 unsigned BaseReg, int FrameIdx, 1023 .addFrameIndex(FrameIdx).addImm(Offset); 1005 materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const argument
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