| /art/compiler/linker/arm64/ |
| H A D | relative_patcher_arm64.h | 35 static uint32_t EncodeBakerReadBarrierFieldData(uint32_t base_reg, uint32_t holder_reg) { argument
36 CheckValidReg(base_reg);
39 BakerReadBarrierFirstRegField::Encode(base_reg) |
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| H A D | relative_patcher_arm64.cc | 314 // LDR (immediate) with correct base_reg.
316 CHECK_EQ(next_insn & 0xffc003e0u, 0xb9400000u | (key.GetOffsetParams().base_reg << 5));
347 params.offset_params.base_reg = BakerReadBarrierFirstRegField::Decode(value);
348 CheckValidReg(params.offset_params.base_reg);
376 vixl::aarch64::Register base_reg,
397 __ Add(base_reg, base_reg, Operand(vixl::aarch64::ip0, LSR, 32));
423 auto base_reg = Register::GetXRegFromCode(key.GetOffsetParams().base_reg); local
426 // If base_reg differ
375 EmitGrayCheckAndFastPath(arm64::Arm64Assembler& assembler, vixl::aarch64::Register base_reg, vixl::aarch64::MemOperand& lock_word, vixl::aarch64::Label* slow_path) argument
[all...] |
| H A D | relative_patcher_arm64_test.cc | 466 std::vector<uint8_t> CompileBakerOffsetThunk(uint32_t base_reg, uint32_t holder_reg) { argument
468 0u, Arm64RelativePatcher::EncodeBakerReadBarrierFieldData(base_reg, holder_reg));
900 for (uint32_t base_reg : valid_regs) {
902 uint32_t ldr = kLdrWInsn | (offset << (10 - 2)) | (base_reg << 5) | root_reg;
907 Arm64RelativePatcher::EncodeBakerReadBarrierFieldData(base_reg, holder_reg);
920 for (uint32_t base_reg : valid_regs) {
925 uint32_t ldr = kLdrWInsn | (offset << (10 - 2)) | (base_reg << 5) | root_reg;
931 std::vector<uint8_t> expected_thunk = CompileBakerOffsetThunk(base_reg, holder_reg);
942 if (holder_reg == base_reg) {
965 (base_reg <<
[all...] |
| /art/compiler/linker/arm/ |
| H A D | relative_patcher_arm_base.h | 51 uint32_t base_reg; // Base register, different from holder for large offset. member in struct:art::linker::ArmBaseRelativePatcher::BakerReadBarrierOffsetParams
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| /art/compiler/utils/arm/ |
| H A D | assembler_thumb2.cc | 3040 void Thumb2Assembler::vldmiad(Register base_reg, DRegister reg, int nregs, Condition cond) { argument
3045 base_reg,
3052 void Thumb2Assembler::vstmiad(Register base_reg, DRegister reg, int nregs, Condition cond) { argument
3057 base_reg,
3999 JumpTable* Thumb2Assembler::CreateJumpTable(std::vector<Label*>&& labels, Register base_reg) { argument
4004 bool use32bit = IsForced32Bit() || IsHighRegister(base_reg);
4007 FixupId fixup_id = AddFixup(Fixup::LoadLiteralAddress(location, base_reg, size));
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| /art/compiler/optimizing/ |
| H A D | code_generator_arm.cc | 8276 Register base_reg = GetInvokeStaticOrDirectExtraParameter(invoke, local
8279 __ LoadFromOffset(kLoadWord, temp.AsRegister<Register>(), base_reg, offset);
8631 Register base_reg = base->GetLocations()->Out().AsRegister<Register>();
8635 __ movw(base_reg, /* placeholder */ 0u);
8637 __ movt(base_reg, /* placeholder */ 0u);
8639 __ add(base_reg, base_reg, ShifterOperand(PC));
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| H A D | code_generator_arm_vixl.cc | 8371 vixl32::Register base_reg = GetInvokeStaticOrDirectExtraParameter(invoke, RegisterFrom(temp)); local
8373 GetAssembler()->LoadFromOffset(kLoadWord, RegisterFrom(temp), base_reg, offset);
8781 vixl32::Register base_reg = OutputRegister(base);
8784 codegen_->EmitMovwMovtPlaceholder(labels, base_reg);
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| H A D | code_generator_x86.cc | 4541 Register base_reg = GetInvokeStaticOrDirectExtraParameter(invoke, local
4543 __ movl(temp.AsRegister<Register>(), Address(base_reg, kDummy32BitOffset));
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| H A D | code_generator_x86_64.cc | 6786 CpuRegister base_reg = locations->GetTemp(1).AsRegister<CpuRegister>(); local
6849 __ leaq(base_reg, codegen_->LiteralCaseTable(switch_instr));
6852 __ movsxd(temp_reg, Address(base_reg, value_reg, TIMES_4, 0));
6855 __ addq(temp_reg, base_reg);
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| /art/compiler/utils/mips/ |
| H A D | assembler_mips.cc | 1967 Register base_reg,
1973 rhs_reg_(base_reg),
1978 CHECK_EQ(base_reg, ZERO);
1980 CHECK_NE(base_reg, ZERO);
2580 void MipsAssembler::LoadLabelAddress(Register dest_reg, Register base_reg, MipsLabel* label) { argument
2583 branches_.emplace_back(IsR6(), buffer_.Size(), dest_reg, base_reg, Branch::kLabel); local
2593 void MipsAssembler::LoadLiteral(Register dest_reg, Register base_reg, Literal* literal) { argument
2598 branches_.emplace_back(IsR6(), buffer_.Size(), dest_reg, base_reg, Branch::kLiteral); local
1964 Branch(bool is_r6, uint32_t location, Register dest_reg, Register base_reg, Type label_or_literal_type) argument
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