/external/llvm/test/MC/ARM/ |
H A D | arm-arithmetic-aliases.s | 46 eor r2, r2, #6 label 47 eor r2, #6 label 48 eor r2, r2, r3 label 49 eor r2, r3 label 51 @ CHECK: eor r2, r2, #6 @ encoding: [0x06,0x20,0x22,0xe2] 52 @ CHECK: eor r2, r2, #6 @ encoding: [0x06,0x20,0x22,0xe2] 53 @ CHECK: eor r2, r2, r3 @ encoding: [0x03,0x20,0x22,0xe0] 54 @ CHECK: eor r2, r2, r3 @ encoding: [0x03,0x20,0x22,0xe0]
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
H A D | arm-arithmetic-aliases.s | 46 eor r2, r2, #6 label 47 eor r2, #6 label 48 eor r2, r2, r3 label 49 eor r2, r3 label 51 @ CHECK: eor r2, r2, #6 @ encoding: [0x06,0x20,0x22,0xe2] 52 @ CHECK: eor r2, r2, #6 @ encoding: [0x06,0x20,0x22,0xe2] 53 @ CHECK: eor r2, r2, r3 @ encoding: [0x03,0x20,0x22,0xe0] 54 @ CHECK: eor r2, r2, r3 @ encoding: [0x03,0x20,0x22,0xe0]
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/external/llvm/test/MC/AArch64/ |
H A D | arm64-diags.s | 262 eor w0, w0, w0, lsl #32 label 264 ; CHECK-ERRORS: eor w0, w0, w0, lsl #32
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/external/boringssl/src/crypto/curve25519/asm/ |
H A D | x25519-asm-arm.S | 238 eor r4,r4,r2 label
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/external/syslinux/gpxe/src/drivers/net/ |
H A D | sis190.c | 180 u32 eor = le32_to_cpu(desc->size) & RingEnd; local 183 desc->size = cpu_to_le32((RX_BUF_SIZE & RX_BUF_MASK) | eor);
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/external/vixl/src/aarch64/ |
H A D | assembler-aarch64.cc | 540 void Assembler::eor(const Register& rd, function in class:vixl::aarch64::Assembler 2690 V(eor, NEON_EOR, vd.Is8B() || vd.Is16B()) \
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H A D | logic-aarch64.cc | 1253 LogicVRegister Simulator::eor(VectorFormat vform, function in class:vixl::aarch64::Simulator
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/external/icu/icu4c/source/common/ |
H A D | ubidi.c | 1611 until proven that there is L or sor/eor on both sides. AN is handled like EN. 2104 DirProp sor, DirProp eor) { 2168 gprop=eor; 2206 /* there is an unprocessed sequence if its property == eor */ 2240 eor=firstStrong; 2255 processPropertySeq(pBiDi, &levState, eor, limit, limit); 2725 /* sor, eor: start and end types of same-level-run */ 2729 DirProp sor, eor; local 2731 /* determine the first sor and set eor to it because of the loop body (sor=eor ther 2102 resolveImplicitLevels(UBiDi *pBiDi, int32_t start, int32_t limit, DirProp sor, DirProp eor) argument [all...] |
/external/icu/android_icu4j/src/main/java/android/icu/text/ |
H A D | Bidi.java | 2915 until proven that there is L or sor/eor on both sides. AN is handled like EN. 3342 private void resolveImplicitLevels(int start, int limit, short sor, short eor) argument 3407 gprop = eor; 3444 /* there is an unprocessed sequence if its property == eor */ 3477 eor = firstStrong; 3497 processPropertySeq(levState, eor, limit, limit); 4093 /* sor, eor: start and end types of same-level-run */ 4096 short sor, eor; 4098 /* determine the first sor and set eor to it because of the loop body (sor=eor ther [all...] |
/external/icu/icu4j/main/classes/core/src/com/ibm/icu/text/ |
H A D | Bidi.java | 2950 until proven that there is L or sor/eor on both sides. AN is handled like EN. 3377 private void resolveImplicitLevels(int start, int limit, short sor, short eor) argument 3442 gprop = eor; 3479 /* there is an unprocessed sequence if its property == eor */ 3512 eor = firstStrong; 3532 processPropertySeq(levState, eor, limit, limit); 4131 /* sor, eor: start and end types of same-level-run */ 4134 short sor, eor; 4136 /* determine the first sor and set eor to it because of the loop body (sor=eor ther [all...] |
/external/v8/src/arm/ |
H A D | assembler-arm.cc | 1534 void Assembler::eor(Register dst, Register src1, const Operand& src2, function in class:v8::internal::Assembler
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/external/v8/src/arm64/ |
H A D | assembler-arm64.cc | 1230 void Assembler::eor(const Register& rd, function in class:v8::internal::Assembler
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/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.cc | 3827 void Assembler::eor(Condition cond, function in class:vixl::aarch32::Assembler 3908 Delegate(kEor, &Assembler::eor, cond, size, rd, rn, operand);
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H A D | assembler-aarch32.h | 2146 void eor(Condition cond, 2151 void eor(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler 2152 eor(al, Best, rd, rn, operand); 2154 void eor(Condition cond, Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler 2155 eor(cond, Best, rd, rn, operand); 2157 void eor(EncodingSize size, function in class:vixl::aarch32::Assembler 2161 eor(al, size, rd, rn, operand);
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H A D | disasm-aarch32.cc | 1453 void Disassembler::eor(Condition cond, function in class:vixl::aarch32::Disassembler 7335 eor(CurrentCond(), 8680 eor(CurrentCond(), Best, Register(rd), Register(rn), imm); 19161 eor(CurrentCond(), 19190 eor(CurrentCond(), 19201 eor(CurrentCond(), [all...] |
/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/ |
H A D | com.ibm.icu_4.2.1.v20100412.jar | META-INF/MANIFEST.MF META-INF/ECLIPSEF.SF META-INF/ECLIPSEF.RSA META ... |