/external/v8/src/arm64/ |
H A D | macro-assembler-arm64-inl.h | 1083 unsigned fbits) { 1085 scvtf(fd, rn, fbits); 1187 unsigned fbits) { 1189 ucvtf(fd, rn, fbits); 1081 Scvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument 1185 Ucvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument
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H A D | assembler-arm64.cc | 2096 unsigned fbits) { 2097 if (fbits == 0) { 2100 Emit(SF(rn) | FPType(fd) | SCVTF_fixed | FPScale(64 - fbits) | Rn(rn) | 2108 unsigned fbits) { 2109 if (fbits == 0) { 2112 Emit(SF(rn) | FPType(fd) | UCVTF_fixed | FPScale(64 - fbits) | Rn(rn) | 2094 scvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument 2106 ucvtf(const FPRegister& fd, const Register& rn, unsigned fbits) argument
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/external/vixl/src/aarch64/ |
H A D | logic-aarch64.cc | 86 double Simulator::FixedToDouble(int64_t src, int fbits, FPRounding round) { argument 88 return UFixedToDouble(src, fbits, round); 90 return -UFixedToDouble(src, fbits, round); 92 return -UFixedToDouble(-src, fbits, round); 97 double Simulator::UFixedToDouble(uint64_t src, int fbits, FPRounding round) { argument 107 const int64_t exponent = highest_significant_bit - fbits; 113 float Simulator::FixedToFloat(int64_t src, int fbits, FPRounding round) { argument 115 return UFixedToFloat(src, fbits, round); 117 return -UFixedToFloat(src, fbits, round); 119 return -UFixedToFloat(-src, fbits, roun 124 UFixedToFloat(uint64_t src, int fbits, FPRounding round) argument 4461 fcvts(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, FPRounding rounding_mode, int fbits) argument 4483 fcvtu(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, FPRounding rounding_mode, int fbits) argument 4921 scvtf(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int fbits, FPRounding round) argument 4940 ucvtf(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int fbits, FPRounding round) argument [all...] |
H A D | simulator-aarch64.cc | 2435 int fbits = 64 - instr->GetFPScale(); local 2443 WriteDRegister(dst, FixedToDouble(ReadXRegister(src), fbits, round)); 2446 WriteDRegister(dst, FixedToDouble(ReadWRegister(src), fbits, round)); 2449 WriteDRegister(dst, UFixedToDouble(ReadXRegister(src), fbits, round)); 2454 fbits, 2459 WriteSRegister(dst, FixedToFloat(ReadXRegister(src), fbits, round)); 2462 WriteSRegister(dst, FixedToFloat(ReadWRegister(src), fbits, round)); 2465 WriteSRegister(dst, UFixedToFloat(ReadXRegister(src), fbits, round)); 2470 fbits, 2476 FPToInt64(ReadDRegister(src) * std::pow(2.0, fbits), [all...] |
/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.cc | 15126 int32_t fbits) { 15133 // VCVT{<c>}{<q>}.<dt>.<dt> <Dd>, <Dm>, #<fbits> ; T1 15134 if (encoded_dt.IsValid() && (fbits >= 1) && (fbits <= 32)) { 15136 uint32_t fbits_ = 64 - fbits; 15144 // VCVT{<c>}{<q>}.F64.<dt> <Ddm>, <Ddm>, #<fbits> ; T1 15146 (((dt2.Is(S16) || dt2.Is(U16)) && (fbits <= 16)) || 15147 ((dt2.Is(S32) || dt2.Is(U32)) && (fbits >= 1) && (fbits <= 32)))) { 15152 uint32_t fbits_ = offset - fbits; 15121 vcvt(Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) argument 15225 vcvt(Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) argument 15261 vcvt(Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) argument [all...] |
H A D | assembler-aarch32.h | 400 int32_t fbits); 406 int32_t fbits); 412 int32_t fbits); 1266 int32_t /*fbits*/) { 1278 int32_t /*fbits*/) { 1290 int32_t /*fbits*/) { 4159 int32_t fbits); 4161 DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) { 4162 vcvt(al, dt1, dt2, rd, rm, fbits); 4170 int32_t fbits); 4160 vcvt( DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) argument 4171 vcvt( DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) argument 4182 vcvt( DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) argument [all...] |
H A D | disasm-aarch32.cc | 4462 int32_t fbits) { 4466 << "#" << fbits; local 4474 int32_t fbits) { 4478 << "#" << fbits; local 4486 int32_t fbits) { 4490 << "#" << fbits; local 4457 vcvt(Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) argument 4469 vcvt(Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) argument 4481 vcvt(Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) argument 24041 uint32_t fbits = local 24050 fbits); local 24129 uint32_t fbits = local 24138 fbits); local 24442 uint32_t fbits = local 24451 fbits); local 24530 uint32_t fbits = local 24539 fbits); local 36413 uint32_t fbits = local 36421 fbits); local 38579 uint32_t fbits = local 38587 fbits); local 48057 uint32_t fbits = 64 - ((instr >> 16) & 0x3f); local 49772 uint32_t fbits = 64 - ((instr >> 16) & 0x3f); local 66832 uint32_t fbits = offset - (((instr >> 5) & 0x1) | local 66935 uint32_t fbits = offset - (((instr >> 5) & 0x1) | local 67301 uint32_t fbits = offset - (((instr >> 5) & 0x1) | local 67404 uint32_t fbits = offset - (((instr >> 5) & 0x1) | local [all...] |
H A D | macro-assembler-aarch32.h | 6406 int32_t fbits) { 6413 vcvt(cond, dt1, dt2, rd, rm, fbits); 6416 DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) { 6417 Vcvt(al, dt1, dt2, rd, rm, fbits); 6425 int32_t fbits) { 6432 vcvt(cond, dt1, dt2, rd, rm, fbits); 6435 DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) { 6436 Vcvt(al, dt1, dt2, rd, rm, fbits); 6444 int32_t fbits) { 6451 vcvt(cond, dt1, dt2, rd, rm, fbits); 6401 Vcvt(Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) argument 6415 Vcvt( DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) argument 6420 Vcvt(Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) argument 6434 Vcvt( DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) argument 6439 Vcvt(Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) argument 6453 Vcvt( DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) argument [all...] |
/external/valgrind/VEX/priv/ |
H A D | guest_arm64_toIR.c | 9389 UInt fbits = 0; local 9390 Bool ok = getLaneInfo_IMMH_IMMB(&fbits, &size, immh, immb); 9397 vassert(fbits >= 1 && fbits <= (isD ? 64 : 32)); 9398 Double scale = two_to_the_minus(fbits); 9419 ch, dd, ch, nn, fbits); 9427 UInt fbits = 0; local 9428 Bool ok = getLaneInfo_IMMH_IMMB(&fbits, &size, immh, immb); 9435 vassert(fbits >= 1 && fbits < 10744 UInt fbits = 0; local 10790 UInt fbits = 0; local 13415 Int fbits = 64 - sc; local 13466 Int fbits = 64 - sc; local [all...] |