| /art/compiler/jni/quick/ |
| H A D | jni_compiler.cc | 258 FrameOffset handle_scope_offset = main_jni_conv->CurrentParamHandleScopeEntryOffset(); local
260 CHECK_LT(handle_scope_offset.Uint32Value(), frame_size);
269 __ StoreRef(handle_scope_offset, main_jni_conv->InterproceduralScratchRegister());
281 FrameOffset handle_scope_offset = main_jni_conv->CurrentParamHandleScopeEntryOffset(); local
283 CHECK_LT(handle_scope_offset.Uint32Value(), frame_size);
284 CHECK_NE(handle_scope_offset.Uint32Value(),
293 __ StoreRef(handle_scope_offset, in_reg);
297 __ CopyRef(handle_scope_offset, in_off,
474 FrameOffset handle_scope_offset = main_jni_conv->CurrentParamHandleScopeEntryOffset(); local
477 __ CreateHandleScopeEntry(out_off, handle_scope_offset,
[all...] |
| /art/compiler/utils/arm/ |
| H A D | jni_macro_assembler_arm.cc | 473 FrameOffset handle_scope_offset,
485 __ LoadFromOffset(kLoadWord, out_reg.AsCoreRegister(), SP, handle_scope_offset.Int32Value());
495 __ AddConstant(out_reg.AsCoreRegister(), SP, handle_scope_offset.Int32Value(), NE);
497 __ AddConstant(out_reg.AsCoreRegister(), SP, handle_scope_offset.Int32Value(), AL);
502 FrameOffset handle_scope_offset,
508 __ LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, handle_scope_offset.Int32Value());
511 // e.g. scratch = (scratch == 0) ? 0 : (SP+handle_scope_offset)
514 __ AddConstant(scratch.AsCoreRegister(), SP, handle_scope_offset.Int32Value(), NE);
516 __ AddConstant(scratch.AsCoreRegister(), SP, handle_scope_offset.Int32Value(), AL);
472 CreateHandleScopeEntry(ManagedRegister mout_reg, FrameOffset handle_scope_offset, ManagedRegister min_reg, bool null_allowed) argument
501 CreateHandleScopeEntry(FrameOffset out_off, FrameOffset handle_scope_offset, ManagedRegister mscratch, bool null_allowed) argument
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| H A D | jni_macro_assembler_arm_vixl.cc | 435 FrameOffset handle_scope_offset,
452 handle_scope_offset.Int32Value());
459 if (asm_.ShifterOperandCanHold(ADD, handle_scope_offset.Int32Value(), kCcDontCare)) {
466 asm_.AddConstantInIt(out_reg.AsVIXLRegister(), sp, handle_scope_offset.Int32Value(), ne);
472 asm_.AddConstantInIt(out_reg.AsVIXLRegister(), sp, handle_scope_offset.Int32Value(), ne);
479 asm_.AddConstant(out_reg.AsVIXLRegister(), sp, handle_scope_offset.Int32Value());
484 FrameOffset handle_scope_offset,
492 asm_.LoadFromOffset(kLoadWord, scratch.AsVIXLRegister(), sp, handle_scope_offset.Int32Value());
495 // e.g. scratch = (scratch == 0) ? 0 : (SP+handle_scope_offset)
498 if (asm_.ShifterOperandCanHold(ADD, handle_scope_offset
434 CreateHandleScopeEntry(ManagedRegister mout_reg, FrameOffset handle_scope_offset, ManagedRegister min_reg, bool null_allowed) argument
483 CreateHandleScopeEntry(FrameOffset out_off, FrameOffset handle_scope_offset, ManagedRegister mscratch, bool null_allowed) argument
[all...] |
| /art/compiler/utils/x86/ |
| H A D | jni_macro_assembler_x86.cc | 424 FrameOffset handle_scope_offset,
439 __ leal(out_reg.AsCpuRegister(), Address(ESP, handle_scope_offset));
442 __ leal(out_reg.AsCpuRegister(), Address(ESP, handle_scope_offset));
447 FrameOffset handle_scope_offset,
454 __ movl(scratch.AsCpuRegister(), Address(ESP, handle_scope_offset));
457 __ leal(scratch.AsCpuRegister(), Address(ESP, handle_scope_offset));
460 __ leal(scratch.AsCpuRegister(), Address(ESP, handle_scope_offset));
423 CreateHandleScopeEntry(ManagedRegister mout_reg, FrameOffset handle_scope_offset, ManagedRegister min_reg, bool null_allowed) argument
446 CreateHandleScopeEntry(FrameOffset out_off, FrameOffset handle_scope_offset, ManagedRegister mscratch, bool null_allowed) argument
|
| /art/compiler/utils/x86_64/ |
| H A D | jni_macro_assembler_x86_64.cc | 475 FrameOffset handle_scope_offset,
484 __ movl(in_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
496 __ leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
499 __ leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
504 FrameOffset handle_scope_offset,
511 __ movl(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
514 __ leaq(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
517 __ leaq(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
474 CreateHandleScopeEntry(ManagedRegister mout_reg, FrameOffset handle_scope_offset, ManagedRegister min_reg, bool null_allowed) argument
503 CreateHandleScopeEntry(FrameOffset out_off, FrameOffset handle_scope_offset, ManagedRegister mscratch, bool null_allowed) argument
|
| /art/compiler/utils/arm64/ |
| H A D | jni_macro_assembler_arm64.cc | 587 FrameOffset handle_scope_offset,
594 handle_scope_offset.Int32Value());
597 // e.g. scratch = (scratch == 0) ? 0 : (SP+handle_scope_offset)
600 AddConstant(scratch.AsXRegister(), SP, handle_scope_offset.Int32Value(), ne);
602 AddConstant(scratch.AsXRegister(), SP, handle_scope_offset.Int32Value(), al);
586 CreateHandleScopeEntry(FrameOffset out_off, FrameOffset handle_scope_offset, ManagedRegister m_scratch, bool null_allowed) argument
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| /art/compiler/utils/mips/ |
| H A D | assembler_mips.cc | 3648 FrameOffset handle_scope_offset,
3662 SP, handle_scope_offset.Int32Value());
3669 Addiu32(out_reg.AsCoreRegister(), SP, handle_scope_offset.Int32Value());
3672 Addiu32(out_reg.AsCoreRegister(), SP, handle_scope_offset.Int32Value());
3677 FrameOffset handle_scope_offset,
3684 LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, handle_scope_offset.Int32Value());
3687 // E.g. scratch = (scratch == 0) ? 0 : (SP+handle_scope_offset).
3689 Addiu32(scratch.AsCoreRegister(), SP, handle_scope_offset.Int32Value());
3692 Addiu32(scratch.AsCoreRegister(), SP, handle_scope_offset.Int32Value());
3647 CreateHandleScopeEntry(ManagedRegister mout_reg, FrameOffset handle_scope_offset, ManagedRegister min_reg, bool null_allowed) argument
3676 CreateHandleScopeEntry(FrameOffset out_off, FrameOffset handle_scope_offset, ManagedRegister mscratch, bool null_allowed) argument
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