Searched defs:method_reg (Results 1 - 12 of 12) sorted by relevance
| /art/compiler/utils/x86_64/ |
| H A D | assembler_x86_64_test.cc | 1908 x86_64::X86_64ManagedRegister method_reg = ManagedFromCpu(x86_64::RDI); local
1911 assembler->BuildFrame(10 * kStackAlignment, method_reg, spill_regs, entry_spills);
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| H A D | jni_macro_assembler_x86_64.cc | 39 ManagedRegister method_reg,
76 __ movq(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister());
38 BuildFrame(size_t frame_size, ManagedRegister method_reg, ArrayRef<const ManagedRegister> spill_regs, const ManagedRegisterEntrySpills& entry_spills) argument
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| /art/compiler/utils/arm/ |
| H A D | jni_macro_assembler_arm.cc | 89 ManagedRegister method_reg,
94 CHECK_EQ(R0, method_reg.AsArm().AsCoreRegister());
88 BuildFrame(size_t frame_size, ManagedRegister method_reg, ArrayRef<const ManagedRegister> callee_save_regs, const ManagedRegisterEntrySpills& entry_spills) argument
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| H A D | jni_macro_assembler_arm_vixl.cc | 58 ManagedRegister method_reg,
62 CHECK(r0.Is(method_reg.AsArm().AsVIXLRegister()));
57 BuildFrame(size_t frame_size, ManagedRegister method_reg, ArrayRef<const ManagedRegister> callee_save_regs, const ManagedRegisterEntrySpills& entry_spills) argument
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| /art/compiler/utils/x86/ |
| H A D | jni_macro_assembler_x86.cc | 45 ManagedRegister method_reg,
66 __ pushl(method_reg.AsX86().AsCpuRegister());
44 BuildFrame(size_t frame_size, ManagedRegister method_reg, ArrayRef<const ManagedRegister> spill_regs, const ManagedRegisterEntrySpills& entry_spills) argument
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| /art/compiler/utils/arm64/ |
| H A D | jni_macro_assembler_arm64.cc | 688 ManagedRegister method_reg,
718 DCHECK(X0 == method_reg.AsArm64().AsXRegister());
687 BuildFrame(size_t frame_size, ManagedRegister method_reg, ArrayRef<const ManagedRegister> callee_save_regs, const ManagedRegisterEntrySpills& entry_spills) argument
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| /art/compiler/optimizing/ |
| H A D | code_generator_arm64.cc | 4483 Register method_reg; local
4485 method_reg = XRegisterFrom(current_method);
4489 method_reg = reg;
4495 MemOperand(method_reg.X(),
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| H A D | code_generator_arm.cc | 8284 Register method_reg; local
8287 method_reg = current_method.AsRegister<Register>();
8291 method_reg = reg;
8297 method_reg,
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| H A D | code_generator_arm_vixl.cc | 8378 vixl32::Register method_reg; local
8381 method_reg = RegisterFrom(current_method);
8385 method_reg = reg;
8392 method_reg,
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| H A D | code_generator_x86.cc | 4554 Register method_reg; local
4557 method_reg = current_method.AsRegister<Register>();
4561 method_reg = reg;
4565 __ movl(reg, Address(method_reg,
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| H A D | code_generator_x86_64.cc | 1007 Register method_reg; local
1010 method_reg = current_method.AsRegister<Register>();
1014 method_reg = reg.AsRegister();
1019 Address(CpuRegister(method_reg),
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| /art/compiler/utils/mips/ |
| H A D | assembler_mips.cc | 3309 ManagedRegister method_reg,
3330 StoreToOffset(kStoreWord, method_reg.AsMips().AsCoreRegister(), SP, 0);
3308 BuildFrame(size_t frame_size, ManagedRegister method_reg, ArrayRef<const ManagedRegister> callee_save_regs, const ManagedRegisterEntrySpills& entry_spills) argument
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