Searched defs:movt (Results 1 - 8 of 8) sorted by relevance

/external/llvm/test/MC/ARM/
H A Dthumb2be-movt-encoding.s4 movt r9, :upper16:(_bar) label
5 @ CHECK-LE: movt r9, :upper16:_bar @ encoding: [0xc0'A',0xf2'A',0b0000AAAA,0x09]
7 @ CHECK-BE: movt r9, :upper16:_bar @ encoding: [0xf2,0b1100AAAA,0x09'A',A]
H A Dthumbv8m.s94 // CHECK: movt r1, #65535 @ encoding: [0xcf,0xf6,0xff,0x71]
95 movt r1, #0xffff label
/external/v8/src/arm/
H A Dassembler-arm.cc328 // specially coded on ARM means that it is a movw/movt instruction, or is an
950 // movt dst, #target16_1
968 // Patch with movw/movt.
979 patcher.masm()->movt(dst, target16_1);
1197 // Otherwise, use immediate load if movw / movt is available.
1215 // A movw / movt or mov / orr immediate load.
1254 // Make sure the movw/movt doesn't get separated.
1258 movt(target, imm32 >> 16, cond);
1280 movt(target, 0, cond);
1630 // sequence of movw/movt o
1663 void Assembler::movt(Register reg, uint32_t immediate, Condition cond) { function in class:v8::internal::Assembler
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/external/v8/src/mips/
H A Dassembler-mips.cc2114 void Assembler::movt(Register rd, Register rs, uint16_t cc) { function in class:v8::Assembler
/external/v8/src/mips64/
H A Dassembler-mips64.cc2334 void Assembler::movt(Register rd, Register rs, uint16_t cc) { function in class:v8::internal::Assembler
/external/vixl/src/aarch32/
H A Dassembler-aarch32.cc6695 void Assembler::movt(Condition cond, Register rd, const Operand& operand) { function in class:vixl::aarch32::Assembler
6719 Delegate(kMovt, &Assembler::movt, cond, rd, operand);
H A Dassembler-aarch32.h2583 void movt(Condition cond, Register rd, const Operand& operand);
2584 void movt(Register rd, const Operand& operand) { movt(al, rd, operand); } function in class:vixl::aarch32::Assembler
H A Ddisasm-aarch32.cc1924 void Disassembler::movt(Condition cond, Register rd, const Operand& operand) { function in class:vixl::aarch32::Disassembler
9282 movt(CurrentCond(), Register(rd), imm);
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